From: Ard Biesheuvel Date: Tue, 8 Dec 2015 07:35:30 +0000 (+0000) Subject: ArmPkg/PrePeiCore: adhere to architectural stack alignment requirement X-Git-Tag: edk2-stable201903~8342 X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=7945b29c51f35e5fd8a6434bb6adde3cdb2d8b1c ArmPkg/PrePeiCore: adhere to architectural stack alignment requirement Instead of using fuzzy arithmetic with a hardcoded stack alignment value of 0x4, use the symbolic constant CPU_STACK_ALIGNMENT (which is at least 8 bytes, btw) to round the temporary stack base and size. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19163 6f19259b-4bc3-4df7-8a09-765794883524 --- diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c index a86f739fd1..46f5806f1d 100644 --- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c +++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c @@ -130,14 +130,10 @@ PrimaryMain ( // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at // the base of the primary core stack - PpiListSize = ALIGN_VALUE(PpiListSize, 0x4); + PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT); TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize; TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize; - // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned - // to ensure the stack pointer is 4-byte aligned. - TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1)); - // // Bind this information into the SEC hand-off state // Note: this must be in sync with the stuff in the asm file @@ -149,8 +145,8 @@ PrimaryMain ( SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack) SecCoreData.TemporaryRamSize = TemporaryRamSize; SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase; - SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2; - SecCoreData.StackBase = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4); + SecCoreData.PeiTemporaryRamSize = ALIGN_VALUE (SecCoreData.TemporaryRamSize / 2, CPU_STACK_ALIGNMENT); + SecCoreData.StackBase = SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize; SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase; // Jump to PEI core entry point diff --git a/ArmPlatformPkg/PrePeiCore/MainUniCore.c b/ArmPlatformPkg/PrePeiCore/MainUniCore.c index 6317f178ca..e4bbca4cb4 100644 --- a/ArmPlatformPkg/PrePeiCore/MainUniCore.c +++ b/ArmPlatformPkg/PrePeiCore/MainUniCore.c @@ -39,14 +39,10 @@ PrimaryMain ( // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at // the base of the primary core stack - PpiListSize = ALIGN_VALUE(PpiListSize, 0x4); + PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT); TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize; TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize; - // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned - // to ensure the stack pointer is 4-byte aligned. - TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1)); - // // Bind this information into the SEC hand-off state // Note: this must be in sync with the stuff in the asm file @@ -58,8 +54,8 @@ PrimaryMain ( SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack) SecCoreData.TemporaryRamSize = TemporaryRamSize; SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase; - SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2; - SecCoreData.StackBase = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4); + SecCoreData.PeiTemporaryRamSize = ALIGN_VALUE (SecCoreData.TemporaryRamSize / 2, CPU_STACK_ALIGNMENT); + SecCoreData.StackBase = SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize; SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase; // Jump to PEI core entry point