From: Laszlo Ersek <lersek@redhat.com>
Date: Mon, 23 Feb 2015 16:03:37 +0000 (+0000)
Subject: ArmVirtualizationPkg/PciHostBridgeDxe: add room for PCI resource allocation
X-Git-Tag: edk2-stable201903~10264
X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=807c26d306fc3d5f8bb3330f280a0f1f00ad964d

ArmVirtualizationPkg/PciHostBridgeDxe: add room for PCI resource allocation

VirtFdtDxe parses the following address space properties from the DTB (and
saves them in PCDs) :

  ProcessPciHost: Config[0x3F000000+0x1000000)
                  Bus[0x0..0xF]
                  Io[0x0+0x10000)@0x3EFF0000
                  Mem[0x10000000+0x2EFF0000)@0x0

In order to allow PCI enumeration to allocate IO and MMIO resources from
the above ranges for devices, we must add the ranges to the Global
Coherency Domain.

There are two ways for that:
- building resource descriptor HOBs in the HOB producer phase (basically,
  PEI), and letting the DXE core process them,
- calling gDS->AddIoSpace() and gDS->AddMemorySpace() during DXE.

We opt for the second method for simplicity.

In the address space maps, the corresponding ranges change from
"nonexistent" to "IO" and "MMIO", from which the gDS->AllocateIoSpace()
and gDS->AllocateMemorySpace() services can later allocate PCI BARs.

   GCD:AddIoSpace(Base=0000000000000000,Length=0000000000010000)
     GcdIoType    = I/O
     Status = Success
   GCDIoType  Range
   ========== =================================
-> I/O        0000000000000000-000000000000FFFF

   GCD:AddMemorySpace(Base=0000000010000000,Length=000000002EFF0000)
     GcdMemoryType   = MMIO
     Capabilities    = 0000000000000001
     Status = Success
   GCDMemType Range                             Capabilities     Attributes
   ========== ================================= ================ ================
   NonExist   0000000000000000-0000000003FFFFFF 0000000000000000 0000000000000000
   MMIO       0000000004000000-0000000007FFFFFF C000000000000001 8000000000000001
   NonExist   0000000008000000-000000000900FFFF 0000000000000000 0000000000000000
   MMIO       0000000009010000-0000000009010FFF C000000000000001 8000000000000001
   NonExist   0000000009011000-000000000FFFFFFF 0000000000000000 0000000000000000
-> MMIO       0000000010000000-000000003EFEFFFF C000000000000001 0000000000000000
   NonExist   000000003EFF0000-000000003FFFFFFF 0000000000000000 0000000000000000
   SystemMem  0000000040000000-00000000BFFFFFFF 800000000000000F 0000000000000008*
   NonExist   00000000C0000000-0000FFFFFFFFFFFF 0000000000000000 0000000000000000

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16903 6f19259b-4bc3-4df7-8a09-765794883524
---

diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
index 50f61cbfff..452465afa8 100644
--- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
+++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
@@ -122,6 +122,28 @@ InitializePciHostBridge (
                                      PcdGet64 (PcdPciIoSize) - 1;
   mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
 
+  //
+  // Add IO and MMIO memory space, so that resources can be allocated in the
+  // EfiPciHostBridgeAllocateResources phase.
+  //
+  Status = gDS->AddIoSpace (
+                  EfiGcdIoTypeIo,
+                  PcdGet64 (PcdPciIoBase),
+                  PcdGet64 (PcdPciIoSize)
+                  );
+  ASSERT_EFI_ERROR (Status);
+
+  Status = gDS->AddMemorySpace (
+                  EfiGcdMemoryTypeMemoryMappedIo,
+                  PcdGet32 (PcdPciMmio32Base),
+                  PcdGet32 (PcdPciMmio32Size),
+                  EFI_MEMORY_UC
+                  );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "%a: AddMemorySpace: %r\n", __FUNCTION__, Status));
+    return Status;
+  }
+
   //
   // Create Host Bridge Device Handle
   //