From: Leahy, Leroy P Date: Mon, 9 May 2016 17:56:55 +0000 (-0700) Subject: CorebootModulePkg/BaseSerialPortLib16550: Remove white-space X-Git-Tag: edk2-stable201903~7092^2~12 X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=b08993bd13578b081f7c416efe932be6b73194b2 CorebootModulePkg/BaseSerialPortLib16550: Remove white-space Remove trailing white space. Change-Id: I73c3a3e1e55eec20b09443de1966573c97fa74f8 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy Reviewed-by: Prince Agyeman --- diff --git a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c index 25ca822eb7..45056363c3 100644 --- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c +++ b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c @@ -62,11 +62,11 @@ typedef struct { } PCI_UART_DEVICE_INFO; /** - Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from + Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The - parameter Offset is added to the base address of the 16550 registers that is specified - by PcdSerialRegisterBase. - + parameter Offset is added to the base address of the 16550 registers that is specified + by PcdSerialRegisterBase. + @param Base The base address register of UART device. @param Offset The offset of the 16550 register to read. @@ -89,9 +89,9 @@ SerialPortReadRegister ( /** Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The - parameter Offset is added to the base address of the 16550 registers that is specified - by PcdSerialRegisterBase. - + parameter Offset is added to the base address of the 16550 registers that is specified + by PcdSerialRegisterBase. + @param Base The base address register of UART device. @param Offset The offset of the 16550 register to write. @param Value The value to write to the 16550 register specified by Offset. @@ -114,11 +114,11 @@ SerialPortWriteRegister ( } /** - Update the value of an 16-bit PCI configuration register in a PCI device. If the - PCI Configuration register specified by PciAddress is already programmed with a - non-zero value, then return the current value. Otherwise update the PCI configuration + Update the value of an 16-bit PCI configuration register in a PCI device. If the + PCI Configuration register specified by PciAddress is already programmed with a + non-zero value, then return the current value. Otherwise update the PCI configuration register specified by PciAddress with the value specified by Value and return the - value programmed into the PCI configuration register. All values must be masked + value programmed into the PCI configuration register. All values must be masked using the bitmask specified by Mask. @param PciAddress PCI Library address of the PCI Configuration register to update. @@ -134,7 +134,7 @@ SerialPortLibUpdatePciRegister16 ( ) { UINT16 CurrentValue; - + CurrentValue = PciRead16 (PciAddress) & Mask; if (CurrentValue != 0) { return CurrentValue; @@ -143,11 +143,11 @@ SerialPortLibUpdatePciRegister16 ( } /** - Update the value of an 32-bit PCI configuration register in a PCI device. If the - PCI Configuration register specified by PciAddress is already programmed with a - non-zero value, then return the current value. Otherwise update the PCI configuration + Update the value of an 32-bit PCI configuration register in a PCI device. If the + PCI Configuration register specified by PciAddress is already programmed with a + non-zero value, then return the current value. Otherwise update the PCI configuration register specified by PciAddress with the value specified by Value and return the - value programmed into the PCI configuration register. All values must be masked + value programmed into the PCI configuration register. All values must be masked using the bitmask specified by Mask. @param PciAddress PCI Library address of the PCI Configuration register to update. @@ -165,7 +165,7 @@ SerialPortLibUpdatePciRegister32 ( ) { UINT32 CurrentValue; - + CurrentValue = PciRead32 (PciAddress) & Mask; if (CurrentValue != 0) { return CurrentValue; @@ -174,11 +174,11 @@ SerialPortLibUpdatePciRegister32 ( } /** - Retrieve the I/O or MMIO base address register for the PCI UART device. - - This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART - Device if they are not already enabled. - + Retrieve the I/O or MMIO base address register for the PCI UART device. + + This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART + Device if they are not already enabled. + @return The base address register of the UART device. **/ @@ -207,10 +207,10 @@ GetSerialRegisterBase ( // Get PCI Device Info // DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo); - + // // If PCI Device Info is empty, then assume fixed address UART and return PcdSerialRegisterBase - // + // if (DeviceInfo->Device == 0xff) { return (UINTN)PcdGet64 (PcdSerialRegisterBase); } @@ -222,17 +222,17 @@ GetSerialRegisterBase ( ParentMemoryLimit = 0xfff00000 >> 16; ParentIoBase = 0 >> 12; ParentIoLimit = 0xf000 >> 12; - + // // Enable I/O and MMIO in PCI Bridge - // Assume Root Bus Numer is Zero. + // Assume Root Bus Numer is Zero. // for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) { // // Compute PCI Lib Address to PCI to PCI Bridge // PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0); - + // // Retrieve and verify the bus numbers in the PCI to PCI Bridge // @@ -255,10 +255,10 @@ GetSerialRegisterBase ( if (MemoryLimit < MemoryBase) { return 0; } - + // // If PCI Bridge MMIO window is not in the address range decoded by the parent PCI Bridge, then return 0 - // + // if (MemoryBase < ParentMemoryBase || MemoryBase > ParentMemoryLimit || MemoryLimit > ParentMemoryLimit) { return 0; } @@ -277,17 +277,17 @@ GetSerialRegisterBase ( } else { IoBase = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBaseUpper16)) << 4) | (IoBase >> 4); } - + // // If PCI Bridge I/O window is disabled, then return 0 // if (IoLimit < IoBase) { return 0; } - + // // If PCI Bridge I/O window is not in the address range decoded by the parent PCI Bridge, then return 0 - // + // if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) { return 0; } @@ -300,7 +300,7 @@ GetSerialRegisterBase ( // Compute PCI Lib Address to PCI UART // PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0); - + // // Find the first IO or MMIO BAR // @@ -333,16 +333,16 @@ GetSerialRegisterBase ( // // Program UART BAR - // + // SerialRegisterBase = SerialPortLibUpdatePciRegister32 ( PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4, - (UINT32)PcdGet64 (PcdSerialRegisterBase), + (UINT32)PcdGet64 (PcdSerialRegisterBase), RegisterBaseMask ); // // Verify that the UART BAR is in the address range decoded by the parent PCI Bridge - // + // if (PcdGetBool (PcdSerialUseMmio)) { if (((SerialRegisterBase >> 16) & 0xfff0) < ParentMemoryBase || ((SerialRegisterBase >> 16) & 0xfff0) > ParentMemoryLimit) { return 0; @@ -352,7 +352,7 @@ GetSerialRegisterBase ( return 0; } } - + // // Enable I/O and MMIO in PCI UART Device if they are not already enabled // @@ -373,7 +373,7 @@ GetSerialRegisterBase ( SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64))); } } - + // // Get PCI Device Info // @@ -381,22 +381,22 @@ GetSerialRegisterBase ( // // Enable I/O or MMIO in PCI Bridge - // Assume Root Bus Numer is Zero. + // Assume Root Bus Numer is Zero. // for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) { // // Compute PCI Lib Address to PCI to PCI Bridge // PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0); - + // // Enable the I/O or MMIO decode windows in the PCI to PCI Bridge // PciOr16 ( - PciLibAddress + PCI_COMMAND_OFFSET, + PciLibAddress + PCI_COMMAND_OFFSET, PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE ); - + // // Force D0 state if a Power Management and Status Register is specified // @@ -405,10 +405,10 @@ GetSerialRegisterBase ( PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1)); } } - + BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET); } - + return SerialRegisterBase; } @@ -442,7 +442,7 @@ SerialPortWritable ( return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS)); } else { // - // Wait for both DSR and CTS to be set OR for DSR to be clear. + // Wait for both DSR and CTS to be set OR for DSR to be clear. // DSR is set if a cable is connected. // CTS is set if it is ok to transmit data // @@ -462,11 +462,11 @@ SerialPortWritable ( /** Initialize the serial device hardware. - + If no initialization is required, then return RETURN_SUCCESS. If the serial device was successfully initialized, then return RETURN_SUCCESS. If the serial device could not be initialized, then return RETURN_DEVICE_ERROR. - + @retval RETURN_SUCCESS The serial device was initialized. @retval RETURN_DEVICE_ERROR The serial device could not be initialized. @@ -480,7 +480,7 @@ SerialPortInitialize ( RETURN_STATUS Status; UINTN SerialRegisterBase; UINT32 Divisor; - UINT32 CurrentDivisor; + UINT32 CurrentDivisor; BOOLEAN Initialized; // @@ -532,7 +532,7 @@ SerialPortInitialize ( // Verify that both the transmit FIFO and the shift register are empty. // while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)); - + // // Configure baud rate // @@ -555,20 +555,20 @@ SerialPortInitialize ( // // Put Modem Control Register(MCR) into its reset state of 0x00. - // + // SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, 0x00); return RETURN_SUCCESS; } /** - Write data from buffer to serial device. + Write data from buffer to serial device. - Writes NumberOfBytes data bytes from Buffer to the serial device. + Writes NumberOfBytes data bytes from Buffer to the serial device. The number of bytes actually written to the serial device is returned. If the return value is less than NumberOfBytes, then the write operation failed. - If Buffer is NULL, then ASSERT(). + If Buffer is NULL, then ASSERT(). If NumberOfBytes is zero, then return 0. @@ -576,7 +576,7 @@ SerialPortInitialize ( @param NumberOfBytes Number of bytes to written to the serial device. @retval 0 NumberOfBytes is 0. - @retval >0 The number of bytes written to the serial device. + @retval >0 The number of bytes written to the serial device. If this value is less than NumberOfBytes, then the write operation failed. **/ @@ -600,7 +600,7 @@ SerialPortWrite ( if (SerialRegisterBase ==0) { return 0; } - + if (NumberOfBytes == 0) { // // Flush the hardware @@ -663,7 +663,7 @@ SerialPortWrite ( @param NumberOfBytes Number of bytes to read from the serial device. @retval 0 NumberOfBytes is 0. - @retval >0 The number of bytes read from the serial device. + @retval >0 The number of bytes read from the serial device. If this value is less than NumberOfBytes, then the read operation failed. **/ @@ -688,7 +688,7 @@ SerialPortRead ( } Mcr = (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS); - + for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) { // // Wait for the serial port to have some data. @@ -707,13 +707,13 @@ SerialPortRead ( // SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr); } - + // // Read byte from the receive buffer. // *Buffer = SerialPortReadRegister (SerialRegisterBase, R_UART_RXBUF); } - + return Result; } @@ -736,7 +736,7 @@ SerialPortPoll ( ) { UINTN SerialRegisterBase; - + SerialRegisterBase = GetSerialRegisterBase (); if (SerialRegisterBase ==0) { return FALSE; @@ -753,15 +753,15 @@ SerialPortPoll ( SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS)); } return TRUE; - } - + } + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { // // Set RTS to let the peer send some data // SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) | B_UART_MCR_RTS)); } - + return FALSE; } diff --git a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf index e8b340cf91..cd758ae4bf 100644 --- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +++ b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf @@ -33,7 +33,7 @@ [Sources] BaseSerialPortLib16550.c - + [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES