From: Olivier Martin <olivier.martin@arm.com>
Date: Wed, 26 Mar 2014 19:29:31 +0000 (+0000)
Subject: ArmPkg/Chipset: Added ARMv8 CPU's PartNum
X-Git-Tag: edk2-stable201903~11583
X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=b7dd4dbd26b122a2972a150bfee1cff66ec283c0

ArmPkg/Chipset: Added ARMv8 CPU's PartNum

PartNum is the field of MIDR that returns the CPU name.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15395 6f19259b-4bc3-4df7-8a09-765794883524
---

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index e011588509..3e5b55bfd7 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -1,7 +1,7 @@
 /** @file
 
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -45,10 +45,15 @@
 // MIDR - Main ID Register definitions
 #define ARM_CPU_TYPE_MASK       0xFFF
 #define ARM_CPU_TYPE_AEMv8      0xD0F
+#define ARM_CPU_TYPE_A53        0xD03
+#define ARM_CPU_TYPE_A57        0xD07
 #define ARM_CPU_TYPE_A15        0xC0F
 #define ARM_CPU_TYPE_A9         0xC09
 #define ARM_CPU_TYPE_A5         0xC05
 
+#define ARM_CPU_REV_MASK        ((0xF << 20) | (0xF) )
+#define ARM_CPU_REV(rn, pn)     ((((rn) & 0xF) << 20) | ((pn) & 0xF))
+
 // Hypervisor Configuration Register
 #define ARM_HCR_FMO				BIT3
 #define ARM_HCR_IMO				BIT4
@@ -116,7 +121,6 @@ ArmDisableAlignmentCheck (
   VOID
   );
 
-
 VOID
 EFIAPI
 ArmEnableAlignmentCheck (
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index 3fcc4264fc..345554eb28 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -1,7 +1,7 @@
 /** @file
 
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -71,10 +71,16 @@
 
 // MIDR - Main ID Register definitions
 #define ARM_CPU_TYPE_MASK       0xFFF
+#define ARM_CPU_TYPE_AEMv8      0xD0F
+#define ARM_CPU_TYPE_A53        0xD03
+#define ARM_CPU_TYPE_A57        0xD07
 #define ARM_CPU_TYPE_A15        0xC0F
 #define ARM_CPU_TYPE_A9         0xC09
 #define ARM_CPU_TYPE_A5         0xC05
 
+#define ARM_CPU_REV_MASK        ((0xF << 20) | (0xF) )
+#define ARM_CPU_REV(rn, pn)     ((((rn) & 0xF) << 20) | ((pn) & 0xF))
+
 #define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
 
 VOID