From: Olivier Martin Date: Mon, 17 Feb 2014 16:01:41 +0000 (+0000) Subject: Add flag to make UEFI run from DRAM or FLASH for FVPs X-Git-Tag: edk2-stable201903~11712 X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=da5ae569b9be641b80fa30184021aea3f907635d Add flag to make UEFI run from DRAM or FLASH for FVPs - By setting the 'ARM_FVP_RUN_NORFLASH' flag at compile time UEFI will be linked to run from NOR FLASH0 on FVPs. - The RAM load location is currently set to 128MB from base of DRAM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15245 6f19259b-4bc3-4df7-8a09-765794883524 --- diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc index e39ce19692..789fb58b90 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc @@ -27,6 +27,11 @@ SKUID_IDENTIFIER = DEFAULT FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf +!ifndef ARM_FVP_RUN_NORFLASH + DEFINE EDK2_SKIP_PEICORE=1 +!endif + + !include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc [LibraryClasses.common] @@ -101,7 +106,7 @@ # Non-Trusted SRAM gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000 # System Memory (2GB) gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 @@ -193,6 +198,16 @@ # # PEI Phase modules # +!ifdef EDK2_SKIP_PEICORE + # UEFI is placed in RAM by bootloader + ArmPlatformPkg/PrePi/PeiMPCore.inf { + + ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf + ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf + } +!else + # UEFI lives in FLASH and copies itself to RAM ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf { ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf @@ -212,6 +227,7 @@ NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf } +!endif # # DXE diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf index 36bb06a371..b9b7c45f75 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -54,7 +54,11 @@ gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize FV = FVMAIN_SEC [FD.FVP_AARCH64_EFI] +!ifdef ARM_FVP_RUN_NORFLASH BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0. +!else +BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB. +!endif Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB). ErasePolarity = 1 @@ -212,6 +216,9 @@ READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE +!if $(EDK2_SKIP_PEICORE) == 1 + INF ArmPlatformPkg/PrePi/PeiMPCore.inf +!else INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf INF MdeModulePkg/Core/Pei/PeiMain.inf INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf @@ -221,6 +228,7 @@ READ_LOCK_STATUS = TRUE INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +!endif FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {