From: Ard Biesheuvel Date: Mon, 9 Nov 2015 13:26:52 +0000 (+0000) Subject: ArmPkg/ArmLib: retrieve cache line length from CTR not CCSIDR X-Git-Tag: edk2-stable201903~8611 X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=fbf658ebc8e2e9340b036b16f2c94403696df1c0 ArmPkg/ArmLib: retrieve cache line length from CTR not CCSIDR The stride used by the cache maintenance by MVA instructions should be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values reflect the actual geometry of the caches. Using CCSIDR for this purpose violates the architecture. Also, move the line length accessors to common code, since there is no need to keep them separate between ARMv7 and AArch64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Mark Rutland Reviewed-by: Leif Lindholm git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18754 6f19259b-4bc3-4df7-8a09-765794883524 --- diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index 4bea20356f..dec125f248 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -21,31 +21,6 @@ #include "AArch64Lib.h" #include "ArmLibPrivate.h" -UINTN -EFIAPI -ArmDataCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (0) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; -} - -UINTN -EFIAPI -ArmInstructionCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (1) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; -} - - VOID AArch64DataCacheOperation ( IN AARCH64_CACHE_OPERATION DataCacheOperation diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c index 44edff869e..b53f455bfa 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c @@ -20,33 +20,6 @@ #include "ArmV7Lib.h" #include "ArmLibPrivate.h" -UINTN -EFIAPI -ArmDataCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (0) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; -} - -UINTN -EFIAPI -ArmInstructionCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (1) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; - -// return 64; -} - - VOID ArmV7DataCacheOperation ( IN ARM_V7_CACHE_OPERATION DataCacheOperation diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c index 4febc45220..ad0a265e9f 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLib.c +++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c @@ -70,3 +70,21 @@ ArmUnsetCpuActlrBit ( Value &= ~Bits; ArmWriteCpuActlr (Value); } + +UINTN +EFIAPI +ArmDataCacheLineLength ( + VOID + ) +{ + return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine +} + +UINTN +EFIAPI +ArmInstructionCacheLineLength ( + VOID + ) +{ + return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine +}