mirror_edk2.git
2 years agoShellPkg/map: Recognize CDROM change
Ruiyu Ni [Tue, 25 Jul 2017 07:30:23 +0000 (15:30 +0800)]
ShellPkg/map: Recognize CDROM change

The patch adds logic to probe the media change for physical
block devices. So that when media change happens, the BlockIo
is re-installed again.

It fixes the issue when CDROM is removed UEFI Shell still shows
the BlockIo in the output of "map -r".

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoMdeModulePkg Xhci: Also RecoverHaltedEndpoint for BABBLE_ERROR
Star Zeng [Tue, 25 Jul 2017 03:24:01 +0000 (11:24 +0800)]
MdeModulePkg Xhci: Also RecoverHaltedEndpoint for BABBLE_ERROR

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=644

According to XHCI spec:
4.10.2.1 Stall Error

4.10.2.4 Babble Detected Error
When a device transmits more data on the USB than the host controller
is expecting for a transaction, it is defined to be babbling.
In general, this is called a Babble Error. When a device sends more
data than the TD Transfer Size bytes (TD Babble), unexpected activity
that persists beyond a specified point in a (micro)frame (Frame Babble),
or a packet greater than Max Packet Size (Packet Babble), the host
controller shall set the Babble Detected Error in the Completion Code
field of the TRB, generate an Error Event, and halt the endpoint
(refer to Section 4.10.2.1).

This patch is to also check for EFI_USB_ERR_BABBLE error returned as
a TransferResult and then proceed to XhcRecoverhaltedEndPoint.

Cc: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoMdeModulePkg SmmLockBoxDxeLib: Get SmmCommRegion for COMM buffer
Star Zeng [Fri, 21 Jul 2017 03:36:29 +0000 (11:36 +0800)]
MdeModulePkg SmmLockBoxDxeLib: Get SmmCommRegion for COMM buffer

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=593

Currently, SmmCommunciate fails in RestoreLockBox after
SmmReadyToLock since COMM buffer is in stack instead of
using SmmCommRegion by gEdkiiPiSmmCommunicationRegionTableGuid.

This patch is to get SmmCommRegion by
gEdkiiPiSmmCommunicationRegionTableGuid for COMM buffer

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Baraneedharan Anbazhagan <anbazhagan@hp.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2 years agoMdePkg/ResetNotification: Rename to UnregisterResetNotify
Ruiyu Ni [Wed, 19 Jul 2017 09:14:28 +0000 (17:14 +0800)]
MdePkg/ResetNotification: Rename to UnregisterResetNotify

UEFI Spec uses UnRegisterResetNotify in protocol structure
definition but uses UnregisterResetNotify in the function
prototype definition.

By searching the entire spec, Unregister* is used for
SIMPLE_TEXT_INPUT_EX_PROTOCOL.UnregisterKeyNotify(). So choose
to use UnregisterResetNotify for consistency.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoNt32Pkg: Add the ResetSystemLib in Nt32 Platform.
HuajingLi [Sat, 22 Jul 2017 07:40:53 +0000 (15:40 +0800)]
Nt32Pkg: Add the ResetSystemLib in Nt32 Platform.

Signed-off-by: Huajing Li <huajing.li@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoMdePkg: Add UEFI 2.7 defined GUID and structure for KMS protocol.
Fu Siyuan [Wed, 19 Jul 2017 06:24:22 +0000 (14:24 +0800)]
MdePkg: Add UEFI 2.7 defined GUID and structure for KMS protocol.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
2 years agoShellPkg/ls: Display the file time in local time.
Li Huajing [Mon, 24 Jul 2017 07:46:03 +0000 (15:46 +0800)]
ShellPkg/ls: Display the file time in local time.

Signed-off-by: Li Huajing <huajing.li@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoNt32Pkg/WinNtSimpleFileSystemDxe: Change GetInfo() to get TimeZone.
Li Huajing [Mon, 24 Jul 2017 07:31:42 +0000 (15:31 +0800)]
Nt32Pkg/WinNtSimpleFileSystemDxe: Change GetInfo() to get TimeZone.

Signed-off-by: Huajing Li <huajing.li@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoBaseTools: Fix the bug that warn() function with only 1 argument
Yonghong Zhu [Tue, 25 Jul 2017 05:38:30 +0000 (13:38 +0800)]
BaseTools: Fix the bug that warn() function with only 1 argument

In the definition, the warn() function takes at least 2 arguments.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools: add some comment for .PrebuildEnv file's usage
Yonghong Zhu [Tue, 25 Jul 2017 05:56:53 +0000 (13:56 +0800)]
BaseTools: add some comment for .PrebuildEnv file's usage

This patch add some comments to explain why we use .PrebuildEnv file to
save environment variable settings set by the prebuild script.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoUefiCpuPkg: Update RegisterCpuFeaturesLib to consume PcdGetSize with UINTN
Liming Gao [Tue, 11 Jul 2017 03:33:58 +0000 (11:33 +0800)]
UefiCpuPkg: Update RegisterCpuFeaturesLib to consume PcdGetSize with UINTN

PcdGetSize() returns UINTN data type. The consumer code should use UINTN data
to get its size.

This issue is found when PcdCpuFeaturesSupport is configured as patchable.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoUefiCpuPkg: Update RegisterCpuFeaturesLib module UNI to match it
Liming Gao [Tue, 11 Jul 2017 03:32:40 +0000 (11:32 +0800)]
UefiCpuPkg: Update RegisterCpuFeaturesLib module UNI to match it

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoMdeModulePkg: Update NonDiscoverableDeviceRegistrationLib file header format
Liming Gao [Tue, 11 Jul 2017 03:32:12 +0000 (11:32 +0800)]
MdeModulePkg: Update NonDiscoverableDeviceRegistrationLib file header format

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdePkg UsbFunctionIo.h: Update comments for GetDeviceInfo return status
Star Zeng [Wed, 19 Jul 2017 10:16:31 +0000 (18:16 +0800)]
MdePkg UsbFunctionIo.h: Update comments for GetDeviceInfo return status

UEFI spec 2.6 errata B update Status Codes Returned table of the
EFI_USBFN_IO_PROTOCOL.GetDeviceInfo function as follows:

1. Update EFI_INVALID_PARAMETER description:
Original text:
A parameter is invalid.
New text:
One or more of the following conditions is TRUE:
BufferSize is NULL.
*BufferSize is not 0 and Buffer is NULL.
Id in invalid.

2. Update EFI_BUFFER_TOO_SMALL description:
Original text:
Supplied buffer isn’t large enough to hold the request string.
New text:
The buffer is too small to hold the buffer.
*BufferSize has been updated with the size needed to hold the
request string.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoUefiCpuPkg: Remove deprecated CPU feature.
Eric Dong [Thu, 20 Jul 2017 05:46:12 +0000 (13:46 +0800)]
UefiCpuPkg: Remove deprecated CPU feature.

Senter feature could not be a single feature,
it has been merge to Smx feature, so remove it.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoMdeModulePkg SmmAccess: Update comments to follow PI spec.
Eric Dong [Wed, 19 Jul 2017 02:34:59 +0000 (10:34 +0800)]
MdeModulePkg SmmAccess: Update comments to follow PI spec.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoMdePkg SmmAccess2: Update comments to follow PI spec.
Eric Dong [Wed, 19 Jul 2017 02:32:38 +0000 (10:32 +0800)]
MdePkg SmmAccess2: Update comments to follow PI spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoUefiCpuPkg CpuCommonFeaturesLib: Enable Ppin feature.
Eric Dong [Fri, 14 Jul 2017 02:22:04 +0000 (10:22 +0800)]
UefiCpuPkg CpuCommonFeaturesLib: Enable Ppin feature.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoUefiCpuPkg: Add feature definition for PPIN.
Eric Dong [Fri, 14 Jul 2017 02:15:01 +0000 (10:15 +0800)]
UefiCpuPkg: Add feature definition for PPIN.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoUefiCpuPkg RegisterCpuFeaturesLib: Add error handling.
Eric Dong [Fri, 14 Jul 2017 02:23:48 +0000 (10:23 +0800)]
UefiCpuPkg RegisterCpuFeaturesLib: Add error handling.

Disable CPU feature may return error, add error handling
code to handle it instead of assert it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoMdeModulePkg/DxeCore: Avoid accessing non-owned memory
Ruiyu Ni [Wed, 5 Jul 2017 10:45:56 +0000 (18:45 +0800)]
MdeModulePkg/DxeCore: Avoid accessing non-owned memory

The patch fixes two kinds of bugs in DxeCore that accesses memory
which might be freed or owned by other modules.
The two bugs don't cause functionality issue.

1. CoreValidateHandle() checks whether the handle is valid by
   validating its signature. The proper way is to check whether
   the handle is in the handle database.
2. CoreDisconnectControllersUsingProtocolInterface() and
   CoreOpenProtocol() de-reference Link pointer which is
   already freed. The proper way is to not de-reference the pointer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
2 years agoMdePkg DxeHstiLib: Fix memory leak issue
Star Zeng [Fri, 14 Jul 2017 08:47:59 +0000 (16:47 +0800)]
MdePkg DxeHstiLib: Fix memory leak issue

The Hsti returned from InternalHstiFindAip() and temporally
allocated NewHsti need to be freed after used.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2 years agoMdePkg Hsti.h: Update version info to 1.1a
Star Zeng [Fri, 14 Jul 2017 08:43:45 +0000 (16:43 +0800)]
MdePkg Hsti.h: Update version info to 1.1a

The definition for 1.1a has no difference with 1.0.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2 years agoEmbeddedPkg/DwEmmc: Adjust FIFO threshold
Jun Nie [Fri, 7 Jul 2017 09:21:37 +0000 (17:21 +0800)]
EmbeddedPkg/DwEmmc: Adjust FIFO threshold

Adjust FIFO threshold according to FIFO depth. Skip
the adjustment if we do not have FIFO depth info.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoEmbeddedPkg/DwEmmcDxe: limit max clock for platform
Jun Nie [Wed, 5 Jul 2017 08:27:07 +0000 (16:27 +0800)]
EmbeddedPkg/DwEmmcDxe: limit max clock for platform

Some boards may have max clock limitation. Add a Pcd to notify
driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoArmPlatformPkg: Support different PL011 reg offset
Jun Nie [Fri, 7 Jul 2017 09:18:45 +0000 (17:18 +0800)]
ArmPlatformPkg: Support different PL011 reg offset

ZTE/SanChip version pl011 has different reg offset and bit offset
for some registers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoCryptoPkg/OpensslLib AARCH64: clear XIP CC flags
Ard Biesheuvel [Fri, 14 Jul 2017 17:09:03 +0000 (18:09 +0100)]
CryptoPkg/OpensslLib AARCH64: clear XIP CC flags

Commit 0df6c8c157af ("BaseTools/tools_def AARCH64: avoid SIMD registers
in XIP code") updated the compiler flags used by AARCH64 when building
modules (including BASE libraries) that may execute before the MMU is
enabled.

This broke the build for OpensslLib/OpensslLibCrypto because the SIMD
register file is shared with the FPU, and since OpenSSL contains some
references to float/double types (which are mostly unused for UEFI btw),
disabling floating point prevents the compiler from building OpenSSL
at all. So for OpensslLib[Crypto], we need to override the XIP CC flags,
to remove the -mgeneral-regs-only compiler flag again.

When introducing the support for XIP CC flags, we were aware that this
would affect BASE libraries as well, but were not expecting this to
have any performance impact. However, in the case of software crypto,
it makes sense not to needlessly inhibit the compiler's ability to
generate fast code, and even if OpenssLib is a BASE library, it is
guaranteed not to run with the MMU off. So omit -mstrict-align from the
local XIP CC flags override as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Long Qin <qin.long@intel.com>
2 years agoBaseTools/tools_def AARCH64: avoid SIMD registers in XIP code
Ard Biesheuvel [Thu, 13 Jul 2017 12:44:27 +0000 (13:44 +0100)]
BaseTools/tools_def AARCH64: avoid SIMD registers in XIP code

XIP code may execute with the MMU off, in which case all memory accesses
should be strictly aligned to their size. Some versions of GCC violate
this restriction even when -mstrict-align is passed, when performing
loads and stores that involve SIMD registers. This is clearly a bug in
the compiler, but we can easily work around it by avoiding SIMD registers
altogether when building code that may execute in such a context. So add
-mgeneral-regs-only to the AARCH64 XIP CC flags.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoBaseTools/tools_def AARCH64: mark register x18 as reserved
Ard Biesheuvel [Thu, 13 Jul 2017 12:41:12 +0000 (13:41 +0100)]
BaseTools/tools_def AARCH64: mark register x18 as reserved

The AArch64 ABI classifies register x18 as a platform register, which
means it should not be used unless the code is guaranteed to run on a
platform that doesn't use it in such a capacity.

GCC does not honour this requirement by default, and so we need to tell
it not to touch it explicitly, by passing the -ffixed-x18 command line
option.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=625
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoBaseTools/Build: Support python scripts in PREBUILD/POSTBUILD
Michael Kinney [Tue, 31 Jan 2017 17:21:20 +0000 (09:21 -0800)]
BaseTools/Build: Support python scripts in PREBUILD/POSTBUILD

https://bugzilla.tianocore.org/show_bug.cgi?id=627

Add shell=True in Popen() calls to support direct execution of
python scripts

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoUefiCpuPkg CpuCommonFeaturesLib: Fix smx/vmx enable logic error.
Eric Dong [Tue, 11 Jul 2017 02:07:36 +0000 (10:07 +0800)]
UefiCpuPkg CpuCommonFeaturesLib: Fix smx/vmx enable logic error.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed: Jeff Fan <jeff.fan@intel.com>

2 years agoUefiCpuPkg RegisterCpuFeaturesLib: Add error handling code.
Eric Dong [Tue, 11 Jul 2017 02:06:56 +0000 (10:06 +0800)]
UefiCpuPkg RegisterCpuFeaturesLib: Add error handling code.

Add error handling code when initialize the CPU feature failed.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Suppress GCC49 IA32 build failure
Brijesh Singh [Tue, 11 Jul 2017 18:38:13 +0000 (14:38 -0400)]
OvmfPkg/QemuFwCfgLib: Suppress GCC49 IA32 build failure

NumPages variable was introduced in commit 66c548be509d. In this commit
we allocate an intermediate buffer when SEV is enabled. The 'BounceBuffer'
variable points to the intermediate buffer pointer and NumPages variables
stores the number of pages. Later in the code, 'BounceBuffer' variable is
checked to see if we need to free the intermediate buffers. The code looks
correct, suppress the warning.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reported-by: Gerd Hoffmann <kraxel@redhat.com>
Reported-by: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: s/warnigns/warnings/ in the code comment]
[lersek@redhat.com: add Gerd's Reported-by]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
2 years agoMdePkg: Declare _ReturnAddress() in Base.h for MSFT tool chain
Liming Gao [Wed, 5 Jul 2017 05:57:07 +0000 (13:57 +0800)]
MdePkg: Declare _ReturnAddress() in Base.h for MSFT tool chain

https://bugzilla.tianocore.org/show_bug.cgi?id=590

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoOvmfPkg: update PciHostBridgeDxe to use PlatformHasIoMmuLib
Brijesh Singh [Thu, 6 Jul 2017 13:29:24 +0000 (09:29 -0400)]
OvmfPkg: update PciHostBridgeDxe to use PlatformHasIoMmuLib

This patch enables PciHostBridgeDxe driver to use Platform IoMMU detection
library to ensure that PciHostBridgeDxe is run after platform IoMmuDxe
driver has checked whether platform need to install IOMMU protocol provider.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Add SEV support
Brijesh Singh [Thu, 6 Jul 2017 13:29:19 +0000 (09:29 -0400)]
OvmfPkg/QemuFwCfgLib: Add SEV support

When SEV is enabled, use a bounce buffer to perform the DMA operation.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Add option to dynamic alloc FW_CFG_DMA Access
Brijesh Singh [Thu, 6 Jul 2017 13:29:13 +0000 (09:29 -0400)]
OvmfPkg/QemuFwCfgLib: Add option to dynamic alloc FW_CFG_DMA Access

Update InternalQemuFwCfgDmaBytes() to work with DMA Access pointer.
The change provides the flexibility to dynamically allocate the "Access"
when SEV is enabled.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Implement SEV internal function for Dxe phase
Brijesh Singh [Thu, 6 Jul 2017 13:29:08 +0000 (09:29 -0400)]
OvmfPkg/QemuFwCfgLib: Implement SEV internal function for Dxe phase

When SEV is enabled, the DMA must be performed on unencrypted pages.
So when get asked to perfom FWCFG DMA read or write, we allocate a
intermediate (bounce buffer) unencrypted buffer and use this buffer
for DMA read or write.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg/QemuFwCfgLib: Implement SEV internal functions for PEI phase
Brijesh Singh [Thu, 6 Jul 2017 13:29:03 +0000 (09:29 -0400)]
OvmfPkg/QemuFwCfgLib: Implement SEV internal functions for PEI phase

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Implement SEV internal function for SEC phase
Brijesh Singh [Thu, 6 Jul 2017 13:28:58 +0000 (09:28 -0400)]
OvmfPkg/QemuFwCfgLib: Implement SEV internal function for SEC phase

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Prepare for SEV support
Brijesh Singh [Thu, 6 Jul 2017 13:28:53 +0000 (09:28 -0400)]
OvmfPkg/QemuFwCfgLib: Prepare for SEV support

Add SEV specific internal functions which will be used while intergrating
the SEV support into QemuFwCfgLib.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/QemuFwCfgLib: Provide Pei and Dxe specific library
Brijesh Singh [Thu, 6 Jul 2017 13:28:47 +0000 (09:28 -0400)]
OvmfPkg/QemuFwCfgLib: Provide Pei and Dxe specific library

Current QemuFwCfgLib.inf is used in both Pei and Dxe phases. Add Pei
and Dxe inf file to provide a seperate QemuFwCfgLib instances for Pei
and Dxe phases.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: Add IoMmuDxe driver
Brijesh Singh [Thu, 6 Jul 2017 13:28:40 +0000 (09:28 -0400)]
OvmfPkg: Add IoMmuDxe driver

The IOMMU protocol driver provides capabilities to set a DMA access
attribute and methods to allocate, free, map and unmap the DMA memory
for the PCI Bus devices.

Due to security reasons all DMA operations inside the SEV guest must
be performed on shared (i.e unencrypted) pages. The IOMMU protocol
driver for the SEV guest uses a bounce buffer to map guest DMA buffer
to shared pages inorder to provide the support for DMA operations inside
SEV guest.

IoMmuDxe driver looks for SEV capabilities, if present then it installs
the real IOMMU protocol otherwise it installs placeholder protocol.
Currently, PciHostBridgeDxe and QemuFWCfgLib need to know the existance
of IOMMU protocol. The modules needing to know the existance of IOMMU
support should add

  gEdkiiIoMmuProtocolGuid OR gIoMmuAbsentProtocolGuid

in their depex to ensure that platform IOMMU detection has been performed.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leo Duran <leo.duran@amd.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Suggested-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: Add PlatformHasIoMmuLib
Brijesh Singh [Thu, 6 Jul 2017 13:27:58 +0000 (09:27 -0400)]
OvmfPkg: Add PlatformHasIoMmuLib

Add the shorter-term library instance outlined in the previous patch to
OvmfPkg, so that we can imbue PciHostBridgeDxe with a protocol dependency
on gEdkiiIoMmuProtocolGuid OR gIoMmuAbsentProtocolGuid.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: Introduce IoMmuAbsent Protocol GUID
Brijesh Singh [Thu, 6 Jul 2017 13:26:50 +0000 (09:26 -0400)]
OvmfPkg: Introduce IoMmuAbsent Protocol GUID

Platforms that optionally provide an IOMMU protocol should do so by
including a DXE driver (usually called IoMmuDxe) that produces either
the IOMMU protocol -- if the underlying capabilities are available --,
or gIoMmuAbsentProtocolGuid, to signal that the IOMMU capability
detection completed with negative result (i.e., no IOMMU will be
available in the system).

In turn, DXE drivers (and library instances) that are supposed to use
the IOMMU protocol if it is available should add the following to
their DEPEX:

gEdkiiIoMmuProtocolGuid OR gIoMmuAbsentProtocolGuid

This ensures these client modules will only be dispatched after IOMMU
detection completes (with positive or negative result).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leo Duran <leo.duran@amd.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: Add AmdSevDxe driver
Brijesh Singh [Thu, 6 Jul 2017 13:26:45 +0000 (09:26 -0400)]
OvmfPkg: Add AmdSevDxe driver

When SEV is enabled, the MMIO memory range must be mapped as unencrypted
(i.e C-bit cleared).

We need to clear the C-bit for MMIO GCD entries in order to cover the
ranges that were added during the PEI phase (through memory resource
descriptor HOBs). Additionally, the NonExistent ranges are processed
in order to cover, in advance, MMIO ranges added later in the DXE phase
by various device drivers, via the appropriate DXE memory space services.

The approach is not transparent for later addition of system memory ranges
to the GCD memory space map. (Such ranges should be encrypted.) OVMF does
not do such a thing at the moment, so this approach should be OK.

The driver is being added to the APRIORI DXE file so that, we clear the
C-bit from MMIO regions before any driver accesses it.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leo Duran <leo.duran@amd.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Suggested-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/PlatformPei: Set memory encryption PCD when SEV is enabled
Brijesh Singh [Thu, 6 Jul 2017 13:25:48 +0000 (09:25 -0400)]
OvmfPkg/PlatformPei: Set memory encryption PCD when SEV is enabled

Secure Encrypted Virtualization (SEV) guest VMs have the concept of
private and shared memory. Private memory is encrypted with the
guest-specific key, while shared memory may be encrypted with hypervisor
key.  Certain types of memory (namely instruction pages and guest page
tables) are always treated as private memory by the hardware.
For data memory, SEV guest VMs can choose which pages they would like
to be private. The choice is done using the standard CPU page tables
using the C-bit. When building the initial page table we mark all the
memory as private.

The patch sets the memory encryption PCD. The PCD is consumed by the
following edk2 modules, which manipulate page tables:

- PEI phase modules: CapsulePei, DxeIplPeim, S3Resume2Pei.

CapsulePei is not used by OVMF. DxeIplPeim consumes the PCD at the
end of the PEI phase, when it builds the initial page tables for the
DXE core / DXE phase. S3Resume2Pei does not consume the PCD in its
entry point function, only when DxeIplPeim branches to the S3 resume
path at the end of the PEI phase, and calls S3Resume2Pei's
EFI_PEI_S3_RESUME2_PPI.S3RestoreConfig2() member function.

Therefore it is safe to set the PCD for these modules in PlatformPei.

- DXE phase modules: BootScriptExecutorDxe, CpuDxe, PiSmmCpuDxeSmm.

They are all dispatched after the PEI phase, so setting the PCD for
them in PlatformPei is safe. (BootScriptExecutorDxe is launched "for
real" in the PEI phase during S3 resume, but it caches the PCD into a
static variable when its entry point is originally invoked in DXE.)

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/BaseMemcryptSevLib: Add SEV helper library
Brijesh Singh [Thu, 6 Jul 2017 13:21:12 +0000 (09:21 -0400)]
OvmfPkg/BaseMemcryptSevLib: Add SEV helper library

Add Secure Encrypted Virtualization (SEV) helper library.
The library provides the routines to:
-  set or clear memory encryption bit for a given memory region.
-  query whether SEV is enabled.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: Update dsc to use IoLib from BaseIoLibIntrinsicSev.inf
Brijesh Singh [Thu, 6 Jul 2017 13:21:12 +0000 (09:21 -0400)]
OvmfPkg: Update dsc to use IoLib from BaseIoLibIntrinsicSev.inf

When SEV is enabled then we must unroll the rep String I/O instructions.

The patch updates dsc file to use SEV version of IoLib inf. The main
difference between BaseIoLibIntrinsic.inf and BaseIoLibIntrinsicSev.inf
is, SEV version checks if its running under SEV enabled guest, If so
then it unroll the String I/O (REP INS/OUTS) otherwise fallbacks to
rep ins/outs.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/ResetVector: Set C-bit when building initial page table
Brijesh Singh [Thu, 6 Jul 2017 13:21:11 +0000 (09:21 -0400)]
OvmfPkg/ResetVector: Set C-bit when building initial page table

SEV guest VMs have the concept of private and shared memory. Private
memory is encrypted with the guest-specific key, while shared memory
may be encrypted with hypervisor key. Certain types of memory (namely
instruction pages and guest page tables) are always treated as private
memory by the hardware. The C-bit in PTE indicate whether the page is
private or shared. The C-bit position for the PTE can be obtained from
CPUID Fn8000_001F[EBX].

When SEV is active, the BIOS is encrypted by the Qemu launch sequence,
we must set the C-bit when building the page table.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoMdeModulePkg/XhciDxe: Make comments align with function
Bi, Dandan [Mon, 10 Jul 2017 06:11:26 +0000 (14:11 +0800)]
MdeModulePkg/XhciDxe: Make comments align with function

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2 years agoMdeModulePkg/PartitionDxe: Add impl of Partition Information Protocol
Hao Wu [Tue, 20 Jun 2017 02:51:53 +0000 (10:51 +0800)]
MdeModulePkg/PartitionDxe: Add impl of Partition Information Protocol

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoMdePkg: Add EFI Partition Information Protocol definitions
Hao Wu [Mon, 19 Jun 2017 08:23:33 +0000 (16:23 +0800)]
MdePkg: Add EFI Partition Information Protocol definitions

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoBaseTools: Report Fd File Path in build log
Yunhua Feng [Tue, 4 Jul 2017 03:27:35 +0000 (11:27 +0800)]
BaseTools: Report Fd File Path in build log

At the end of build, Report Fd image path in build log

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Fix FDF file parse !include file issue
Yunhua Feng [Wed, 28 Jun 2017 10:29:18 +0000 (18:29 +0800)]
BaseTools: Fix FDF file parse !include file issue

when FDF file use "!include" format to include the other file,
and the end line of the file not end with '\n', the include
file parse error.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Add PCDs conditional operator function
Yunhua Feng [Wed, 31 May 2017 05:33:49 +0000 (13:33 +0800)]
BaseTools: Add PCDs conditional operator function

Parse PCDS value like A >B ? C :D
if A > B is True, the result is C, else the result is D

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoEmulatorPkg/Unix/Host: Add GCC5 CC/DLINK commands (for GCC >= 5)
Jordan Justen [Thu, 1 Jun 2017 23:39:37 +0000 (16:39 -0700)]
EmulatorPkg/Unix/Host: Add GCC5 CC/DLINK commands (for GCC >= 5)

These flags are based on the flags from the GCC5 toolchain in
tools_def.template. Since the GCC5 toolchain uses link-time
optimizations (LTO), we must compile and link the 'Host' files with
LTO enabled so we can link to other modules.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoBaseTools/Eot: register MM Module types with FFS class.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:46 +0000 (00:47 +0800)]
BaseTools/Eot: register MM Module types with FFS class.

This patch registers MM_STANDALONE and MM_CORE_STANDALONE with Ffs class.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/Workspace: check MM module type compatibility with PI version.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:45 +0000 (00:47 +0800)]
BaseTools/Workspace: check MM module type compatibility with PI version.

This patch checks SUP_MODULE_MM_CORE_STANDALONE and
SUP_MODULE_MM_STANDALONE module compatibility with PI specification
version.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/build: register MM module types with build tools.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:44 +0000 (00:47 +0800)]
BaseTools/build: register MM module types with build tools.

This patch registers MM_STANDALONE and MM_CORE_STANDALONE module type
with python build tools.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/GenFds: register MM Modules and MM FV file types.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:43 +0000 (00:47 +0800)]
BaseTools/GenFds: register MM Modules and MM FV file types.

This patch verifies MM_CORE_STANDALONE module compatibility with PI
specification version.
Also, it registers MM_STANDALONE/MM_CORE_STANDALONE modules with
FdfParser class and provides mapping between MM_STANDALONE and
MM_CORE_STANDALONE module type in FDF with
EFI_FV_FILETYPE_MM_STANDALONE and EFI_FV_FILETYPE_MM_CORE_STANDALONE file types
in GenFfs.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/CommonDataClass: register MM Modules.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:42 +0000 (00:47 +0800)]
BaseTools/CommonDataClass: register MM Modules.

This patch registers MM_STANDALONE and MM_CORE_STANDALONE module types
with CommonClass and PackageIncludePkgHeaderClass in CommonDataClass.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/Common: add support in FDF Parser to parse MM Modules.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:41 +0000 (00:47 +0800)]
BaseTools/Common: add support in FDF Parser to parse MM Modules.

This patch adds support for FdfParser tool to parse MM_STANDALONE and
MM_CORE_STANDALONE modules.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/Common: add MM Module data types.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:40 +0000 (00:47 +0800)]
BaseTools/Common: add MM Module data types.

This patch adds SUP_MODULE_MM_STANDALONE and
SUP_MODULE_MM_CORE_STANDALONE data types and includes it in
SUP_MODULE_LIST.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/AutoGen: auto generate MM template APIs and dependencies.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:39 +0000 (00:47 +0800)]
BaseTools/AutoGen: auto generate MM template APIs and dependencies.

This patch adds changes to auto generate MM_CORE_STANDALONE and
MM_STANDALONE Entry Point templates.
Also, it adds changes to help auto generate dependency expressions for
MM_STANDALONE modules.

PI Specification v1.5 specifies Management Mode System Table (MMST)
which is  a collection of common services for managing
MMRAM allocation and providing basic I/O services. MMST is similar to
the UEFI System Table. (Currently, EFI_SMM_SYSTEM_TABLE2 defines
Management Mode System Table)

Some of auto generated MM_CORE_STANDALONE and MM_STANDALONE template
APIs use MMST as parameter.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/GenFw: recognize MM file types as EFI Boot Service Drivers.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:38 +0000 (00:47 +0800)]
BaseTools/GenFw: recognize MM file types as EFI Boot Service Drivers.

PI v1.5 Specification Volume 4 defines Management Mode Core Interface.
In order to support Management Mode Core Interface, Module Types
MM_STANDALONE, MM_CORE_STANDALONE are needed.
This patch ensures that MM_STANDALONE, MM_CORE_STANDALONE Modules are
treated as EFI Boot Service Driver in GenFw tool.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools/GenFfs: add FFS file types for MM modules.
Supreeth Venkatesh [Mon, 26 Jun 2017 16:47:37 +0000 (00:47 +0800)]
BaseTools/GenFfs: add FFS file types for MM modules.

PI specification v1.5 defines new firmware volume file types
for Management Mode (MM).

This patch adds the new file type EFI_FV_FILETYPE_MM_STANDALONE and
EFI_FV_FILETYPE_MM_CORE_STANDALONE in GenFfs tool.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoUefiCpuPkg MpInitLib: Update return status to follow spec.
Eric Dong [Thu, 6 Jul 2017 01:25:37 +0000 (09:25 +0800)]
UefiCpuPkg MpInitLib: Update return status to follow spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoUefiCpuPkg CpuMpPei: Update return status to follow spec.
Eric Dong [Thu, 6 Jul 2017 01:25:19 +0000 (09:25 +0800)]
UefiCpuPkg CpuMpPei: Update return status to follow spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoUefiCpuPkg CpuDxe: Update return status to follow spec.
Eric Dong [Thu, 6 Jul 2017 01:24:49 +0000 (09:24 +0800)]
UefiCpuPkg CpuDxe: Update return status to follow spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoMdePkg MpServices: Update return status to follow spec.
Eric Dong [Thu, 6 Jul 2017 01:23:29 +0000 (09:23 +0800)]
MdePkg MpServices: Update return status to follow spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2 years agoBaseTools/GenFw: disregard payload in PE debug directory entry size
Ard Biesheuvel [Wed, 5 Jul 2017 18:33:59 +0000 (19:33 +0100)]
BaseTools/GenFw: disregard payload in PE debug directory entry size

Currently, the PE/COFF conversion routines in GenFw add a so-called
NB10 CodeView debug record to the image, and update the associated
directory entry in the PE/COFF optional header to contain its relative
virtual address (RVA) and size.

However, there are two levels of indirection at work here: the actual
NB10 CodeView record (which is simply a magic number and some unused
data fields followed by the NUL terminated filename) is emitted
separately, and a separate descriptor is emitted that identifies the
NB10 CodeView record as type EFI_IMAGE_DEBUG_TYPE_CODEVIEW, and records
its size. The directory entry in the PE/COFF optional header should
refer to this intermediate descriptor's address and size only, but
the WriteDebug## () routines in GenFw erroneously record the size of
both the descriptor and the NB10 CodeView record.

This problem was exposed by commit e4129b0e5897 ("BaseTools: Update
GenFw to clear unused debug entry generated by VS tool chain",
2017-06-19), and GenFw now crashes when it attempts to iterate over
what it thinks are multiple intermediate descriptors for different
kinds of debug data embedded in the image.

The error is understandable, given that both are carved out of the
same file space allocation, but this is really an implementation detail
of GenFw, and is not required. (Note that the intermediate descriptor
does not require a RVA and so it does not even need to be inside a
section)

So omit the size of the NB10 CodeView record from the size recorded
in the optional header.

Link: https://lists.01.org/pipermail/edk2-devel/2017-July/012162.html
Link: https://lists.01.org/pipermail/edk2-devel/2017-July/012181.html
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Co-debugged-or-whatever-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoMdeModulePkg/EmmcDxe: Implementation of Disk Information Protocol
Hao Wu [Mon, 3 Jul 2017 00:41:16 +0000 (08:41 +0800)]
MdeModulePkg/EmmcDxe: Implementation of Disk Information Protocol

Adds the implementation of Disk Information Protocol for EMMC devices per
PI 1.6 spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg/SdDxe: Implementation of Disk Information Protocol
Hao Wu [Mon, 26 Jun 2017 08:40:35 +0000 (16:40 +0800)]
MdeModulePkg/SdDxe: Implementation of Disk Information Protocol

Adds the implementation of Disk Information Protocol for SD devices per
PI 1.6 spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdePkg/DiskInfo.h: Add the SD/MMC interface GUID definition
Hao Wu [Fri, 23 Jun 2017 07:55:27 +0000 (15:55 +0800)]
MdePkg/DiskInfo.h: Add the SD/MMC interface GUID definition

Add the SD/MMC interface GUID definition per PI 1.6 spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg/NvmExpressDxe: Handle timeout for blocking PassThru req
Hao Wu [Tue, 6 Jun 2017 08:44:40 +0000 (16:44 +0800)]
MdeModulePkg/NvmExpressDxe: Handle timeout for blocking PassThru req

https://bugzilla.tianocore.org/show_bug.cgi?id=433

When a blocking NVMe PassThru request experiences timeout, the current
codes in function NvmExpressPassThru() do not abort the timeout request
while advancing synchronous Submission Queue tail. Therefore, it is
possible to submit a new blocking PassThru request when the synchronous
Submission Queue is full.

The commit adds logic to abort the timeout request by resetting the NVMe
controller when a timeout occurs for a blocking PassThru request.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoOvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes declaration
Laszlo Ersek [Tue, 4 Jul 2017 13:09:51 +0000 (15:09 +0200)]
OvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes declaration

PlatformPei can now overwrite PcdQ35TsegMbytes; document this in
"OvmfPkg/OvmfPkg.dec".

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if available
Laszlo Ersek [Tue, 4 Jul 2017 12:50:43 +0000 (14:50 +0200)]
OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if available

Recognize an extended TSEG when available in
Q35TsegMbytesInitialization(), and set both PcdQ35TsegMbytes (for
OvmfPkg/SmmAccess) and "mQ35TsegMbytes" (for PlatformPei's own use)
accordingly. The new logic interfaces with the QEMU feature added in QEMU
commit 2f295167e0c4 ("q35/mch: implement extended TSEG sizes",
2017-06-08).

At this point we have to explicitly restrict Q35TsegMbytesInitialization()
to the Q35 board, but that's OK, because Q35TsegMbytesInitialization() is
only called when PcdSmmSmramRequire is set, and for that Q35 is already an
enforced requirement.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/SmmAccess: support extended TSEG size
Laszlo Ersek [Tue, 4 Jul 2017 12:27:19 +0000 (14:27 +0200)]
OvmfPkg/SmmAccess: support extended TSEG size

In SmmAccessPeiEntryPoint(), map TSEG megabyte counts different from 1, 2
and 8 to the MCH_ESMRAMC_TSEG_EXT bit pattern (introduced in the previous
patch), for the ESMRAMC.TSEG_SZ bit-field register. (Suggested by Jordan.)

In SmramAccessGetCapabilities() -- backing both
PEI_SMM_ACCESS_PPI.GetCapabilities() and
EFI_SMM_ACCESS2_PROTOCOL.GetCapabilities() --, map the
MCH_ESMRAMC_TSEG_EXT bit pattern found in the ESMRAMC.TSEG_SZ bit-field
register to a byte count of (mQ35TsegMbytes * SIZE_1MB).

(MCH_ESMRAMC_TSEG_EXT is the only possible pattern if none of
MCH_ESMRAMC_TSEG_1MB, MCH_ESMRAMC_TSEG_2MB, and MCH_ESMRAMC_TSEG_8MB
match.)

The new code paths are not exercised just yet; for that, PlatformPei is
going to have to set PcdQ35TsegMbytes (and consequently, SmramInternal's
"mQ35TsegMbytes") to a value different from 1, 2, and 8.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros
Laszlo Ersek [Tue, 4 Jul 2017 12:18:08 +0000 (14:18 +0200)]
OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros

Add the macros for interfacing with the QEMU feature added in QEMU commit
2f295167e0c4 ("q35/mch: implement extended TSEG sizes", 2017-06-08).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: make PcdQ35TsegMbytes dynamic
Laszlo Ersek [Tue, 4 Jul 2017 11:52:34 +0000 (13:52 +0200)]
OvmfPkg: make PcdQ35TsegMbytes dynamic

We can now make PcdQ35TsegMbytes dynamic, in preparation for the extended
TSEG size feature. At the moment we only move the declaration in
OvmfPkg.dec from [PcdsFixedAtBuild] to [PcdsDynamic, PcdsDynamicEx], and
provide the dynamic defaults (with the same value, 8) in the DSC files if
SMM_REQUIRE is TRUE.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic
Laszlo Ersek [Tue, 4 Jul 2017 11:16:39 +0000 (13:16 +0200)]
OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic

In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD,
to be set by PlatformPei.

Jordan suggested to use gEfiPeiMemoryDiscoveredPpiGuid as SmmAccessPei's
DEPEX for making sure that PlatformPei sets the PCD before SmmAccessPei
consumes it. (PlatformPei installs the permanent PEI RAM.) Such a DEPEX is
supposed to mirror physical firmware, where anything related to SMRAM
cannot run before said platform's physical RAM is discovered (signaled by
the presence of gEfiPeiMemoryDiscoveredPpiGuid).

Introduce the InitQ35TsegMbytes() function and the "mQ35TsegMbytes" extern
variable to "SmramInternal.h" and "SmramInternal.c":

- Both SmmAccess modules (PEIM and DXE driver) are supposed to call
  InitQ35TsegMbytes() in their respective entry point functions, saving
  PcdQ35TsegMbytes into "mQ35TsegMbytes". This way dynamic PCD fetches can
  be kept out of PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member
  functions later (when we add support for extended TSEG size).

- We can thus replace the current PcdQ35TsegMbytes fetches in
  SmmAccessPei's entry point function as well, with reads from
  "mQ35TsegMbytes".

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic
Laszlo Ersek [Tue, 4 Jul 2017 10:44:05 +0000 (12:44 +0200)]
OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic

In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD,
to be set by PlatformPei. Introduce the Q35TsegMbytesInitialization()
function and the "mQ35TsegMbytes" global variable to support this.

Q35TsegMbytesInitialization() manages the PCD and caches its final value
into "mQ35TsegMbytes". Call Q35TsegMbytesInitialization() from
InitializePlatform() just in time for the current PCD consumers,
PublishPeiMemory(), InitializeRamRegions() and QemuInitializeRam() --
which is called from InitializeRamRegions() -- to be rebased on top of
"mQ35TsegMbytes".

Call Q35TsegMbytesInitialization() only when PcdSmmSmramRequire is TRUE,
given that PcdQ35TsegMbytes is consumed in that case only.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: widen PcdQ35TsegMbytes to UINT16
Laszlo Ersek [Tue, 4 Jul 2017 10:27:24 +0000 (12:27 +0200)]
OvmfPkg: widen PcdQ35TsegMbytes to UINT16

Widen PcdQ35TsegMbytes to UINT16, in preparation for setting it
dynamically to the QEMU-advertized extended TSEG size (which is 16-bits
wide).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: update -D E1000_ENABLE from Intel PROEFI v.07 to BootUtil v.22
Laszlo Ersek [Tue, 27 Jun 2017 16:16:14 +0000 (18:16 +0200)]
OvmfPkg: update -D E1000_ENABLE from Intel PROEFI v.07 to BootUtil v.22

Jiaxin reports that the OvmfPkg/README instructions for downloading the
Intel PROEFI drivers, and the filenames in OvmfPkg/OvmfPkg*.fdf for
incorporating the same in the OVMF binaries, are no longer up to date; the
download link has stopped working.

Additionally, the IA32 driver binary is no more distributed by Intel.

Update OvmfPkg/README with new download instructions, and adapt the OVMF
FDF files.

With this driver in use for QEMU's e1000 NIC, the DH shell command prints,
as Controller Name, "Intel(R) PRO/1000 MT Network Connection". I
successfully tested DHCP and ping from the UEFI shell.

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Reported-by: Jiaxin Wu <jiaxin.wu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=613
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoOvmfPkg: disable build-time relocation for DXEFV modules
Laszlo Ersek [Wed, 28 Jun 2017 18:20:17 +0000 (20:20 +0200)]
OvmfPkg: disable build-time relocation for DXEFV modules

When the GenFv utility from BaseTools composes a firmware volume, it
checks whether modules in the firmware volume are subject to build-time
relocation. The primary indication for relocation is whether the firmware
volume has a nonzero base address, according to the [FD] section(s) in the
FDF file that refer to the firmware volume.

The idea behind build-time relocation is that XIP (execute in place)
modules will not be relocated at boot-time:

- Pre-DXE phase modules generally execute in place.

  (OVMF is no exception, despite the fact that we have writeable memory
  even in SEC: PEI_CORE and PEIMs run in-place from PEIFV, after SEC
  decompresses PEIFV and DXEFV from FVMAIN_COMPACT (flash) to RAM.
  PEI_CORE and the PEIMs are relocated at boot-time only after PlatformPei
  installs the permanent PEI RAM, and the RAM migration occurs.)

- Modules dispatched by the DXE Core are generally relocated at boot-time.
  However, this is not necessarily so. Quoting Liming from
  <https://lists.01.org/pipermail/edk2-devel/2017-July/012053.html>:

> PI spec has no limitation that XIP is for PEIM only. DXE driver may be
> built as XIP for other purpose. For example, if DXE driver image address
> is not zero, DxeCore will try allocating the preferred address and load
> it. In another case, once DXE driver is relocated at build time, DxeCore
> will dispatch it and start it directly without loading, it may save boot
> performance.

Therefore GenFv relocates even DXE and UEFI driver modules if the
containing firmware volume has a nonzero base address.

In OVMF, this is the case for both PEIV and DXEFV:

> [FD.MEMFD]
> BaseAddress   = $(MEMFD_BASE_ADDRESS)
> Size          = 0xB00000
> ErasePolarity = 1
> BlockSize     = 0x10000
> NumBlocks     = 0xB0
> ...
> 0x020000|0x0E0000
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
> FV = PEIFV
>
> 0x100000|0xA00000
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
> FV = DXEFV

While the build-time relocation certainly makes sense for PEIFV (see
above), the reasons for which we specify DXEFV under [FD.MEMFD] are
weaker:

- we set the PcdOvmfDxeMemFvBase and PcdOvmfDxeMemFvSize PCDs here,

- and we ascertain that DXEFV, when decompressed by SEC from
  FVMAIN_COMPACT, will fit into the area allotted here, at build time.

In other words, the build-time relocation of the modules in DXEFV is a
waste of resources. But, it gets worse:

Build-time relocation of an executable is only possible if the on-disk and
in-memory layouts are identical, i.e., if the sections of the PE/COFF
image adhere to the same alignment on disk and in memory. Put differently,
the FileAlignment and SectionAlignment headers must be equal.

For boot-time modules that we build as part of edk2, both alignment values
are 0x20 bytes. For runtime modules that we build as part of edk2, both
alignment values are 0x1000 bytes. This is why the DXEFV relocation,
albeit wasteful, is also successful every time.

Unfortunately, if we try to include a PE/COFF binary in DXEFV that
originates from outside of edk2, the DXEFV relocation can fail due to the
binary having unmatched FileAlignment and SectionAlignment headers. This
is precisely the case with the E3522X2.EFI network driver for the e1000
NIC, from Intel's BootUtil / PREBOOT.EXE distribution.

The solution is to use the FvForceRebase=FALSE override under [FV.DXEFV].
This tells GenFv not to perform build-time relocation on the firmware
volume, despite the FV having a nonzero base address.

In DXEFV we also have SMM drivers. Those are relocated at boot-time (into
SMRAM) unconditionally; SMRAM is always discovered at boot-time.

Kudos to Ard and Liming for the PE/COFF sections & relocations
explanation, and for the FvForceRebase=FALSE tip.

I regression-tested this change in the following configurations (all with
normal boot and S3 suspend/resume):

  IA32,     q35,     SMM,     Linux
  IA32X64,  q35,     SMM,     Linux
  IA32X64,  q35,     SMM,     Windows-8.1
  X64,      i440fx,  no-SMM,  Linux

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=613
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=615
Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Suggested-by: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoArmVirtPkg: remove status code support
Ard Biesheuvel [Wed, 5 Jul 2017 12:57:50 +0000 (13:57 +0100)]
ArmVirtPkg: remove status code support

Commit 7b1dc6c569a 'ArmVirtPkg: switch to generic ResetSystemRuntimeDxe'
replaced all references in ArmVirtPkg to the deprecated ResetRuntimeDxe
from EmbeddedPkg with the well maintained generic alternative that lives
in MdeModulePkg.

However, as it turns out, the generic driver has a dependency on the
library class ReportStatusCodeLib, whose default resolution is an
implementation that is not safe for use at runtime, resulting in crashes
when trying to invoke it from the OS.

Since we have no use for status codes in any of the ArmVirtPkg
platforms, let's replace all resolutions with a common one to the NULL
implementation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoArmPlatformPkg: convert VExpress ResetSystemLib to ResetSystemLib
Leif Lindholm [Tue, 4 Jul 2017 17:11:55 +0000 (18:11 +0100)]
ArmPlatformPkg: convert VExpress ResetSystemLib to ResetSystemLib

Since we're in the process of migrating all of the VExpress platforms
to MdeModulePkg ResetSystemRuntimeDxe, convert VExpress ResetSystemLib
from EfiResetSystemLib interface to the ResetSystemLib one.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2 years agoEmbeddedPkg/MmcDxe: Align the ExtCSD buffer
Jun Nie [Tue, 4 Jul 2017 15:43:16 +0000 (23:43 +0800)]
EmbeddedPkg/MmcDxe: Align the ExtCSD buffer

ExtCSD structure may be read via DMA. So align it to
page to avoid data corruption.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoBaseTools: Update GenFw to clear unused debug entry generated by VS tool chain
Liming Gao [Mon, 19 Jun 2017 09:49:44 +0000 (17:49 +0800)]
BaseTools: Update GenFw to clear unused debug entry generated by VS tool chain

https://bugzilla.tianocore.org/show_bug.cgi?id=600

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Update tools_def.template to remove old XCLANG and XCODE32
Liming Gao [Fri, 23 Jun 2017 12:33:54 +0000 (20:33 +0800)]
BaseTools: Update tools_def.template to remove old XCLANG and XCODE32

https://bugzilla.tianocore.org/show_bug.cgi?id=562
https://bugzilla.tianocore.org/show_bug.cgi?id=563

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2 years agoMdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint
Ruiyu Ni [Mon, 3 Jul 2017 09:53:49 +0000 (17:53 +0800)]
MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint

This fixes BULK data loss when transfer is detected as timeout but
finished just before stopping endpoint.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
2 years agoMdeModulePkg/XhciDxe: Separate common logic to XhcTransfer
Ruiyu Ni [Wed, 28 Jun 2017 09:11:34 +0000 (17:11 +0800)]
MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer

The patch separates the common logic in XhcControlTransfer,
XhcBulkTransfer and XhcSyncIntTransfer to a sub-routine
XhcTransfer. It doesn't have functionality impact.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
2 years agoMdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information
Ruiyu Ni [Wed, 28 Jun 2017 08:56:09 +0000 (16:56 +0800)]
MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
2 years agoMdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrb
Ruiyu Ni [Wed, 28 Jun 2017 08:55:12 +0000 (16:55 +0800)]
MdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrb

Current implementation of IsTransferRingTrb only checks whether
the TRB is in the RING of the URB.
The patch enhanced the logic to check that whether the TRB belongs
to the transaction of URB.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
2 years agoBaseTools: suppress usage instructions with rebuild options
Chris Ruffin [Thu, 22 Jun 2017 18:59:49 +0000 (14:59 -0400)]
BaseTools: suppress usage instructions with rebuild options

When using edksetup.bat Rebuild, the script outputs usage instructions
to the console, when no usage error is encountered.  Update the usage
instructions and suppress these usage instructions when using the
Rebuild, ForceRebuild options.

Change-Id: Ica98e19f3d5198df2519106e4c55314c255e04ac
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Ruffin <chris.ruffin@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBeagleBoardPkg: switch to use MdeModulePkg ResetSystemLib
Leif Lindholm [Mon, 3 Jul 2017 15:05:04 +0000 (16:05 +0100)]
BeagleBoardPkg: switch to use MdeModulePkg ResetSystemLib

The BeagleBoard port used EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
for its reset handling. With the arrival
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf

As part of this, change BeagleBoardPkg/Library/ResetSystemLib to be an
implementation of ResetSystemLib instead of the previous
EfiResetSystemLib.

Wire all reset variants to ResetCold, except for ResetShutdown and
EnterS3WithImmediateWake, which return immediately.

Note: this ResetSystemLib never supported being called after
ExitBootservices, and this shortcoming is not addressed here.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2 years agoArmVirtPkg: switch to generic ResetSystemRuntimeDxe
Ard Biesheuvel [Mon, 3 Jul 2017 13:46:18 +0000 (14:46 +0100)]
ArmVirtPkg: switch to generic ResetSystemRuntimeDxe

For obscure reasons, ARM platforms use a different implementation of
the ResetSystem() runtime service call than other platforms. So let's
switch all ArmVirtPkg platforms to the generic version instead.

Given that all platforms use an implementation of EfiResetSystemLib [as
consumed by the ResetRuntimeDxe in EmbeddedPkg that we are replacing]
which is unlikely to be depended upon by out of tree platforms, let's
simply modify this library into an implementation of ResetSystemLib
instead [which is what the generic driver in MdeModulePkg consumes]

This does mean we need to update all clients at the same time, which
is why all changes are part of the same patch.

As before, warm reset and platform specific reset are mapped onto
cold reset (which is the only thing PSCI implements, at least the
version we depend on). The new library function EnterS3WithImmediateWake()
is left unimplemented, as permitted by the ResetSystemLib library class.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoArmPkg: implement ResetSystemLib using PSCI 0.2 calls
Ard Biesheuvel [Mon, 3 Jul 2017 15:00:12 +0000 (16:00 +0100)]
ArmPkg: implement ResetSystemLib using PSCI 0.2 calls

This adds an implementation of the ResetSystemLib library class as
defined in MdeModulePkg. It is used as the platform glue by the generic
ResetSystemRuntimeDxe which lives in the same package.

This implementation is intended to replace the EfiResetSystemLib based
implementation that is deprecated now that we have decided that there is
no longer a reason to keep a different ResetSystem() implementation
under EmbeddedPkg.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoMdeModulePkg CapsuleApp: Fix print info in BuildGatherList()
Star Zeng [Fri, 30 Jun 2017 12:38:55 +0000 (20:38 +0800)]
MdeModulePkg CapsuleApp: Fix print info in BuildGatherList()

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=614

Print (L"CapsuleApp: capsule data starts          at 0x%X with
 size 0x%X\n", (UINTN) CapsuleBuffer, FileSize);

It should use (UINTN) CapsuleBuffer[Index] and FileSize[Index]
as parameter.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Cloud Wang <winggundum82@163.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>