mirror_edk2.git
4 years agoEmbeddedPkg/AndroidFastboot: drop dependency on the LinuxLoader
Ard Biesheuvel [Mon, 21 Nov 2016 12:13:18 +0000 (12:13 +0000)]
EmbeddedPkg/AndroidFastboot: drop dependency on the LinuxLoader

When booting the kernel via Fastboot, invoke the kernel image directly
rather than passing it to the LinuxLoader app. This requires the kernel
image to be built with UEFI stub support.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
4 years agoMdeModulePkg/EbcDebugger: Compare ASCII char with '\0'
Hao Wu [Thu, 24 Nov 2016 02:49:46 +0000 (10:49 +0800)]
MdeModulePkg/EbcDebugger: Compare ASCII char with '\0'

Current code is using L'\0' to compare with a ASCII char.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/EbcDebugger: Add ASSERT to ensure FieldBuffer is not NULL
Hao Wu [Thu, 24 Nov 2016 02:43:33 +0000 (10:43 +0800)]
MdeModulePkg/EbcDebugger: Add ASSERT to ensure FieldBuffer is not NULL

In function EdbLoadCodBySymbolByIec(), AsciiStrGetNewTokenField() at line
1589 will return NULL if the first character in 'LineBuffer' is '\0'. But
the previous if statement at line 1576 ensures the above case will not
happen.

This commit adds ASSERT as warnings for the case that will not happen.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/EbcDebugger: Add missing check for symbol not found
Hao Wu [Thu, 24 Nov 2016 02:37:55 +0000 (10:37 +0800)]
MdeModulePkg/EbcDebugger: Add missing check for symbol not found

In function DebuggerDisplaySymbolAccrodingToAddress(), when variable
'CandidateAddress' (returned by EbdFindSymbolAddress function) equals
(UINTN) -1, it also indicates that the symbol is not found at the given
address.

This commit adds this missing check.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/EbcDebugger: Add check for invalid 'CommandArg'
Hao Wu [Thu, 24 Nov 2016 02:26:06 +0000 (10:26 +0800)]
MdeModulePkg/EbcDebugger: Add check for invalid 'CommandArg'

Add checks for the return value of function Atoi() in EdbCmdBreakpoint.c.
If the input parameter 'CommandArg' contains non-digit character, print
corresponding error message.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/EbcDebugger: Operands of same size for bitwise operation
Hao Wu [Thu, 24 Nov 2016 02:18:19 +0000 (10:18 +0800)]
MdeModulePkg/EbcDebugger: Operands of same size for bitwise operation

Operands in a bitwise operation should have the same size to eliminate
unexpected results.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/DriverSample: Remove the password related codes
Dandan Bi [Thu, 17 Nov 2016 05:15:33 +0000 (13:15 +0800)]
MdeModulePkg/DriverSample: Remove the password related codes

In current DriverSampleDxe, the sample code of password is
not a good example, so we plan to remove it.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdeModulePkg/DriverSampleDxe: Remove the non-interactive password
Dandan Bi [Thu, 2 Jun 2016 01:53:04 +0000 (09:53 +0800)]
MdeModulePkg/DriverSampleDxe: Remove the non-interactive password

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdeModulePkg: Clear the buffer after using it
Dandan Bi [Fri, 27 May 2016 08:00:28 +0000 (16:00 +0800)]
MdeModulePkg: Clear the buffer after using it

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdeModulePkg/SetupBrowser:Don't support password without interactive flag
Dandan Bi [Tue, 15 Nov 2016 11:13:33 +0000 (19:13 +0800)]
MdeModulePkg/SetupBrowser:Don't support password without interactive flag

In current SetupBrowser, the logic related to non-interative password
is not correct. How to support it correctly or whether support it
is still under investigation. First step remove the incorrect logic.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdeModulePkg/DisplayEngine: Popup dialogue when password is not supported
Dandan Bi [Tue, 15 Nov 2016 11:10:59 +0000 (19:10 +0800)]
MdeModulePkg/DisplayEngine: Popup dialogue when password is not supported

when the password is not supported, pop up a dialogue
to let user know the reason.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoEmbeddedPkg/MmcDxe: expand to support multiple blocks
Haojian Zhuang [Wed, 23 Nov 2016 13:36:24 +0000 (21:36 +0800)]
EmbeddedPkg/MmcDxe: expand to support multiple blocks

Make use of DMA to transfer multiple blocks at one time. It could
improve the performance on MMC/SD driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
4 years agoEmbeddedPkg/MmcDxe: set I/O speed and bus width in SD stack
Haojian Zhuang [Wed, 23 Nov 2016 13:36:22 +0000 (21:36 +0800)]
EmbeddedPkg/MmcDxe: set I/O speed and bus width in SD stack

Add more SD commands to support 4-bit bus width & iospeed.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
4 years agoEmbeddedPkg/MmcDxe: invoke SetIos() protocol method to set speed and width
Haojian Zhuang [Wed, 23 Nov 2016 13:36:21 +0000 (21:36 +0800)]
EmbeddedPkg/MmcDxe: invoke SetIos() protocol method to set speed and width

Add the interface to change the bus width and speed.

By default, MMC is initialized with 1-bit mode and less than 400KHz bus
clock. It causes MMC working inefficiently.

Set I/O bus width on both MMC controller and EXTCSD. Otherwise, it may
cause unmatched failure case. And support more timing mode, high speed,
HS200 & HS400 mode.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
4 years agoArmPlatformPkg/PL180MciDxe: update for identifying SD
Haojian Zhuang [Wed, 23 Nov 2016 13:36:23 +0000 (21:36 +0800)]
ArmPlatformPkg/PL180MciDxe: update for identifying SD

When CMD6 & ACMD51 are added into identifying SD process, PL180
should also support CMD6 & ACMD51. Otherwise, it will hang when
system tries to read expected data.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
4 years agoEmbeddedPkg/Protocol/MmcHost: add new methods for I/O width and multiblock
Haojian Zhuang [Wed, 23 Nov 2016 13:36:21 +0000 (21:36 +0800)]
EmbeddedPkg/Protocol/MmcHost: add new methods for I/O width and multiblock

Add new protocol methods to change the bus width, speed and check
for multiblock support.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Split off protocol changes from implementation changes.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
4 years agoMdeModulePkg/AtaAtapiPassThru: Ensure GHC.AE bit is always set in Ahci
Marcin Wojtas [Thu, 24 Nov 2016 07:54:33 +0000 (08:54 +0100)]
MdeModulePkg/AtaAtapiPassThru: Ensure GHC.AE bit is always set in Ahci

According to AHCI Spec 1.3 GHC.AE bit description:
"The implementation of this bit is dependent upon the value of the
CAP.SAM bit. If CAP.SAM is '0', then GHC.AE shall be read-write and shall
have a reset value of '0'. If CAP.SAM is '1', then AE shall be read-only
and shall have a reset value of '1'."

Being in AhciMode, for proper operation it is required, that GHC.AE bit
is always set, before any other AHCI registers are written to. Current
AhciMode implementation, both in AhciReset() and AhciModeInitialization()
functions, set GHC.AE bit only depending on 'CAP.SAM == 0' condition,
assuming (according to the AHCI spec), that otherwise it has to be set
anyway. It may however happen, that even if 'CAP.SAM == 1', GHC.AE
requires updating by software.

This patch enables in AhciMode setting GHC.AE in case its initial value
is '0'. It fixes AHCI support for Marvell Armada 70x0 and 80x0 SoC
families. The change is transparent to all other platforms.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Jan Dabros <jsd@semihalf.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
4 years agoOvmfPkg/build.sh: Make GCC5 the default toolchain, catch GCC43 and earlier
Konrad Rzeszutek Wilk [Thu, 24 Nov 2016 01:15:23 +0000 (20:15 -0500)]
OvmfPkg/build.sh: Make GCC5 the default toolchain, catch GCC43 and earlier

v2:
 * Changes suggested by Laszlo:
   - change the catch-all (*) to GCC5, from GCC44
   - remove the (5.*.*) pattern from GCC49
   - generate error for GCC < 4.4

In v3, also generate error for really GCC < 4.4, like GCC 1.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=62
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Konrad Rzeszutek Wilk <konrad@kernel.org>
Tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoIntelFsp2Pkg: Use FspSiliconInitDone2 API
Thomaiyar, Richard Marian [Wed, 16 Nov 2016 09:47:04 +0000 (17:47 +0800)]
IntelFsp2Pkg: Use FspSiliconInitDone2 API

Use FspSiliconInitDone2 API in Notify Phase

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/Xhci: Add 10ms delay before sending SendAddr cmd to dev
Feng Tian [Wed, 23 Nov 2016 01:46:32 +0000 (09:46 +0800)]
MdeModulePkg/Xhci: Add 10ms delay before sending SendAddr cmd to dev

We send ADDRESS DEVICE CMD in XhcInitializeDeviceSlot(), which will
cause XHC issue a USB SET_ADDRESS request to the USB Device.

According to USB spec, there should have a 10ms delay before this
operation after resetting a given port.

But in original code, there is a possible path which may have no such
10ms delay:
UsbHubResetPort()->UsbHubSetPortFeature()->Stall(20)->UsbHubGetPortSt
atus()->XhcPollPortStatusChange()->(if RESET_C bit is set)->
XhcInitializeDeviceSlot()->(if RESET_C bit is set)->Stall(10)

So this patch is used to fix above issue.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Baraneedharan Anbazhagan <anbazhagan@hp.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Tested-by: Baraneedharan Anbazhagan <anbazhagan@hp.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
4 years agoUefiCpuPkg/PiSmmCpu: Correct exception message.
Jiewen Yao [Tue, 22 Nov 2016 07:05:11 +0000 (15:05 +0800)]
UefiCpuPkg/PiSmmCpu: Correct exception message.

This patch fixes the first part of
https://bugzilla.tianocore.org/show_bug.cgi?id=242

Previously, when SMM exception happens, "stack overflow" is misreported.
This patch checked the PF address to see it is stack overflow, or
it is caused by SMM page protection.

It dumps exception data, PF address and the module trigger the issue.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoUefiCpuPkg/MpInitLib: fix feature test for Extended Topology CPUID leaf
Laszlo Ersek [Tue, 22 Nov 2016 12:58:54 +0000 (13:58 +0100)]
UefiCpuPkg/MpInitLib: fix feature test for Extended Topology CPUID leaf

According to the Intel SDM (325462-060US / September 2016),

> INPUT EAX = 0BH: Returns Extended Topology Information
>
> [...] Software must detect the presence of CPUID leaf 0BH by verifying
> (a) the highest leaf index supported by CPUID is >= 0BH, and
> (b) CPUID.0BH:EBX[15:0] reports a non-zero value. [...]

The "GetApicId" sections in the Ia32 and X64 "MpFuncs.nasm" files do not
perform check (b).

This causes an actual bug in the following OVMF setup:

- Intel W3550 host processor <http://ark.intel.com/products/39720/>,

- the QEMU/KVM guest's VCPU model is set to "host", that is, "the CPU
  visible to the guest should be exactly the same as the host CPU".

Under "GetApicId", check (a) passes: the CPUID level of the W3550 is
exactly 11 decimal. However, leaf 11 itself is not supported, therefore
EDX is set to zero:

> If a value entered for CPUID.EAX is less than or equal to the maximum
> input value and the leaf is not supported on that processor then 0 is
> returned in all the registers.

Because we don't check (b), the "GetProcessorNumber" section of the code
is reached with an initial APIC ID of 0 in EDX on all of the APs. Given
that "GetProcessorNumber" searches the
"MP_CPU_EXCHANGE_INFO.CpuInfo[*].InitialApicId" fields for a match, all
APs enter ApWakeupFunction() with an identical "NumApsExecuting"
parameter. This results in unpredictable guest behavior (crashes, reboots,
hangs etc).

Reorganize the "GetApicId" section and add the missing check in both
assembly files.

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoUefiCpuPkg/LocalApicLib: fix feature test for Extended Topology CPUID leaf
Laszlo Ersek [Tue, 22 Nov 2016 11:43:17 +0000 (12:43 +0100)]
UefiCpuPkg/LocalApicLib: fix feature test for Extended Topology CPUID leaf

According to the Intel SDM (325462-060US / September 2016),

> INPUT EAX = 0BH: Returns Extended Topology Information
>
> [...] Software must detect the presence of CPUID leaf 0BH by verifying
> (a) the highest leaf index supported by CPUID is >= 0BH, and
> (b) CPUID.0BH:EBX[15:0] reports a non-zero value. [...]

The LocalApicLib instances in UefiCpuPkg do not perform check (b).

This causes an actual bug in the following OVMF setup:

- Intel W3550 host processor <http://ark.intel.com/products/39720/>,

- the QEMU/KVM guest's VCPU model is set to "host", that is, "the CPU
  visible to the guest should be exactly the same as the host CPU".

In the GetInitialApicId() function, check (a) passes: the CPUID level of
the W3550 is exactly 11 decimal. However, leaf 11 itself is not supported,
therefore EDX is set to zero:

> If a value entered for CPUID.EAX is less than or equal to the maximum
> input value and the leaf is not supported on that processor then 0 is
> returned in all the registers.

Because we don't check (b), we return 0 as initial APIC ID on the BSP and
on all of the APs as well.

Add the missing check.

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoSecurityPkg DxeTcg2PPLib: Lock Tcg2PhysicalPresenceFlags variable on S4
Star Zeng [Fri, 18 Nov 2016 07:34:54 +0000 (15:34 +0800)]
SecurityPkg DxeTcg2PPLib: Lock Tcg2PhysicalPresenceFlags variable on S4

The code updates Tcg2PhysicalPresenceLibProcessRequest() to also lock
Tcg2PhysicalPresenceFlags variable on S4.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoRevert old "Enable BlockSid related PP actions" patch series.
Eric Dong [Wed, 23 Nov 2016 08:26:36 +0000 (16:26 +0800)]
Revert old "Enable BlockSid related PP actions" patch series.

New solution for this issue will be provided.

This reverts commits from d1947ce509d745f32db6b7fecc03dc9c778b9350
to bda034c34deea6eb43edcef28018a9ace8f04637.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoMdeModulePkg/DxeNetLib: Allow the IPv4/prefix case when AsciiStrToIp4
Jiaxin Wu [Fri, 18 Nov 2016 07:38:32 +0000 (15:38 +0800)]
MdeModulePkg/DxeNetLib: Allow the IPv4/prefix case when AsciiStrToIp4

This patch is used to allow the IPv4 with prefix case.

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
4 years agoShellPkg: update ping6 to use timer service instead of timer arch protocol .
Zhang Lubo [Tue, 8 Nov 2016 09:24:12 +0000 (17:24 +0800)]
ShellPkg: update ping6 to use timer service instead of timer arch protocol .

This patch update the shell ping command to use timer service to calculate the
RTT time, instead of using the timer arch protocol.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Cc: Ni Ruiyu <ruiyu.ni@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
4 years agoBaseTools: report error for same Guid's Private definition conflict
Yonghong Zhu [Sat, 19 Nov 2016 09:06:18 +0000 (17:06 +0800)]
BaseTools: report error for same Guid's Private definition conflict

Add error check for the same Guid/Protocol/PPIs/Includes defined as both
Private and non-Private attribute.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=209
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdeModulePkg/EbcDxe: reorganize EBC header definitions
Pete Batard [Wed, 16 Nov 2016 13:24:10 +0000 (21:24 +0800)]
MdeModulePkg/EbcDxe: reorganize EBC header definitions

VM related defs are now in EbcVmTest.h, and opocode related definitions in
Ebc.h.
Because it is used by both the EBC Debugger and driver,
EbcDebugSignalException() sees its definition factorized in
EbcDebuggerHook.h.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/EbcDxe: add EBC Debugger
Pete Batard [Wed, 16 Nov 2016 13:24:09 +0000 (21:24 +0800)]
MdeModulePkg/EbcDxe: add EBC Debugger

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/EbcDxe: prepare support for EBC Debugger
Pete Batard [Wed, 16 Nov 2016 13:24:08 +0000 (21:24 +0800)]
MdeModulePkg/EbcDxe: prepare support for EBC Debugger

* This patch introduces EbcDebuggerHook.c/h and inserts the required
  EBCDebugger references into the existing EBC source files.
* With all the hooks defined to their empty version in EbcDebuggerHook.c
  the existing EBC VM behaviour is left unaffected.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/DisplayEngine: Return the selectable menu correctly
Dandan Bi [Tue, 22 Nov 2016 02:39:38 +0000 (10:39 +0800)]
MdeModulePkg/DisplayEngine: Return the selectable menu correctly

When returning selectable menu, should return the menu in current form,
the codes miss to do the check. Now returning the selectable menu behind
the codes "if ((UINTN) Distance + NextMenuOption->Skip > GapToTop)".
Then can cover the check, can return the menu correctly.

https://bugzilla.tianocore.org/show_bug.cgi?id=232

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
4 years agoMdeModulePkg/DxeCapsuleLibFmp: Use AllocatePool for CapsuleResultVariable
Dandan Bi [Fri, 18 Nov 2016 10:33:02 +0000 (18:33 +0800)]
MdeModulePkg/DxeCapsuleLibFmp: Use AllocatePool for CapsuleResultVariable

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: jiewen.yao@intel.com
4 years agoSecurityPkg Tcg2Dxe: ASSERT to ensure 'VarData' is not NULL
Hao Wu [Mon, 21 Nov 2016 07:38:11 +0000 (15:38 +0800)]
SecurityPkg Tcg2Dxe: ASSERT to ensure 'VarData' is not NULL

The logic in functions ReadAndMeasureVariable() and MeasureVariable()
within Tcg2Dxe ensure that 'VarData' will not be NULL before calling
TcgDxeHashLogExtendEvent() at line 1716.

This commit adds ASSERT as warnings for the case that will not happen.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoSecurityPkg TcgStorageCoreLib: ASSERT to ensure 'ByteSeq' is not NULL
Hao Wu [Mon, 21 Nov 2016 06:00:44 +0000 (14:00 +0800)]
SecurityPkg TcgStorageCoreLib: ASSERT to ensure 'ByteSeq' is not NULL

Add ASSERT to make sure 'ByteSeq' is not NULL before comsumed by
CopyMem().

Cc: Eric Dong <eric.dong@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg CapsuleApp: ASSERT to ensure 'CapsuleIndex' is not NULL
Hao Wu [Mon, 21 Nov 2016 05:44:59 +0000 (13:44 +0800)]
MdeModulePkg CapsuleApp: ASSERT to ensure 'CapsuleIndex' is not NULL

Function GetVariable2() ensures its third (output) parameter will not be
NULL when the return status is EFI_SUCCESS.

This commit adds ASSERT as warnings for the case that will not happen.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: dynamic PcdCpuSmmApSyncTimeout, PcdCpuSmmSyncMode
Laszlo Ersek [Thu, 17 Nov 2016 20:13:29 +0000 (21:13 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: dynamic PcdCpuSmmApSyncTimeout, PcdCpuSmmSyncMode

Move the declaration of these PCDs from the

  [PcdsFixedAtBuild, PcdsPatchableInModule]

section of "UefiCpuPkg/UefiCpuPkg.dec" to the

  [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]

section. Their types, default values, and token values remain unchanged.

Only UefiCpuPkg/PiSmmCpuDxeSmm consumes these PCDs, specifically on the
call stack of its entry point function, and it turns them into static or
dynamically allocated data in SMRAM:

  PiCpuSmmEntry()                            [PiSmmCpuDxeSmm.c]
    InitializeSmmTimer()                     [SyncTimer.c]
      PcdCpuSmmApSyncTimeout
      -> mTimeoutTicker
    InitializeMpServiceData()                [MpService.c]
      InitializeMpSyncData()                 [MpService.c]
        PcdCpuSmmSyncMode
        -> mSmmMpSyncData->EffectiveSyncMode

However, there's another call path to fetching "PcdCpuSmmSyncMode", namely

  SmmInitHandler()                           [PiSmmCpuDxeSmm.c]
    InitializeMpSyncData()                   [MpService.c]
      PcdCpuSmmSyncMode
      -> mSmmMpSyncData->EffectiveSyncMode

and this path is exercised during S3 resume (as stated by the comment in
SmmInitHandler() too, "Initialize private data during S3 resume").

While we can call the PCD protocol (via PcdLib) for fetching dynamic PCDs
in the entry point function, we cannot do that at S3 resume. Therefore
pre-fetch PcdCpuSmmSyncMode into a new global variable (which lives in
SMRAM) in InitializeMpServiceData(), just before calling
InitializeMpSyncData(). This way InitializeMpSyncData() can retrieve the
stashed PCD value from SMRAM, regardless of the boot mode.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=230
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoMdeModulePkg/PiSmmCore: Cache CommunicationBuffer info before using it
Jeff Fan [Fri, 18 Nov 2016 02:46:43 +0000 (10:46 +0800)]
MdeModulePkg/PiSmmCore: Cache CommunicationBuffer info before using it

gSmmCorePrivate->CommunicationBuffer and gSmmCorePrivate->BufferSize locate at
runtime memory region. That means they could be modified by non-SMM code during
runtime.

We should cache them into SMM local variables before we verify them. After
verification, we should use the cached ones directly instead of the ones in
gSmmCorePrivate.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
4 years agoSecurityPkg OpalPasswordDxe: Clean PSID buffer.
Eric Dong [Mon, 21 Nov 2016 06:38:31 +0000 (14:38 +0800)]
SecurityPkg OpalPasswordDxe: Clean PSID buffer.

Change callback handler type to avoid saving PSID info in
browser temp buffer. Also clean the buffer after using it.

Cc: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg OpalPasswordDxe: Clean password buffer.
Eric Dong [Wed, 16 Nov 2016 06:15:29 +0000 (14:15 +0800)]
SecurityPkg OpalPasswordDxe: Clean password buffer.

Cc: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg Tcg2Config: Remove the empty options.
Eric Dong [Thu, 2 Jun 2016 07:20:30 +0000 (15:20 +0800)]
SecurityPkg Tcg2Config: Remove the empty options.

The BlockSID actions not has code related to
them. Now we implement the BlockSID feature in
OpalPasswordDxe driver. So remove these actions
here.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg OpalPasswordDxe: Use PP actions to enable BlockSID.
Eric Dong [Thu, 2 Jun 2016 07:20:17 +0000 (15:20 +0800)]
SecurityPkg OpalPasswordDxe: Use PP actions to enable BlockSID.

Update the implementation, use physical presence defined actions to
update the BlockSid related status.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg TcgSmm: Enable Storage actions.
Eric Dong [Mon, 14 Nov 2016 06:47:41 +0000 (14:47 +0800)]
SecurityPkg TcgSmm: Enable Storage actions.

After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this driver.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg SmmTcg2PhysicalPresenceLib: Enable Storage actions.
Eric Dong [Wed, 16 Nov 2016 05:45:21 +0000 (13:45 +0800)]
SecurityPkg SmmTcg2PhysicalPresenceLib: Enable Storage actions.

After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this library.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg DxeTcgPhysicalPresenceLib: Enable Storage actions.
Eric Dong [Thu, 2 Jun 2016 07:17:59 +0000 (15:17 +0800)]
SecurityPkg DxeTcgPhysicalPresenceLib: Enable Storage actions.

After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this library.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg DxeTcg2PhysicalPresenceLib: Enable Storage actions.
Eric Dong [Thu, 2 Jun 2016 07:17:42 +0000 (15:17 +0800)]
SecurityPkg DxeTcg2PhysicalPresenceLib: Enable Storage actions.

After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this library.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg: Add SmmTcgPhysicalPresenceStorageLib.
Eric Dong [Mon, 21 Nov 2016 06:52:49 +0000 (14:52 +0800)]
SecurityPkg: Add SmmTcgPhysicalPresenceStorageLib.

Tcg Physical Presence spec defined some actions used
for storage device. Add Smm version library to handles
these actions.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg: Add DxeTcgPhysicalPresenceStorageLib.
Eric Dong [Wed, 16 Nov 2016 05:49:50 +0000 (13:49 +0800)]
SecurityPkg: Add DxeTcgPhysicalPresenceStorageLib.

Tcg Physical Presence spec defined some actions used
for storage device. Add Dxe version library to handles
 these actions.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg: Add header file for TcgPhysicalPresenceStorageLib.
Eric Dong [Thu, 2 Jun 2016 07:15:35 +0000 (15:15 +0800)]
SecurityPkg: Add header file for TcgPhysicalPresenceStorageLib.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg: Add definition for Physical Presence storage flag.
Eric Dong [Thu, 2 Jun 2016 07:14:56 +0000 (15:14 +0800)]
SecurityPkg: Add definition for Physical Presence storage flag.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
4 years agoSecurityPkg Tcg2Pei: Add comments into LogHashEvent()
Star Zeng [Fri, 18 Nov 2016 02:58:35 +0000 (10:58 +0800)]
SecurityPkg Tcg2Pei: Add comments into LogHashEvent()

Add comments into LogHashEvent() to describe the usage
of GetDigestListSize (DigestList).

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoSecurityPkg Tcg2Dxe: Get correct digest list size
Star Zeng [Wed, 16 Nov 2016 09:17:36 +0000 (17:17 +0800)]
SecurityPkg Tcg2Dxe: Get correct digest list size

Current code uses GetDigestListSize(DigestList) to get
digest list size, that is incorrect.
The code should get digest list size of digests copied
into event2 log, those digests are compacted, so
GetDigestListBinSize() should be used.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoSecurityPkg Tcg2Dxe: Filter inactive digest in event2 log from PEI HOB
Star Zeng [Thu, 17 Nov 2016 08:54:15 +0000 (16:54 +0800)]
SecurityPkg Tcg2Dxe: Filter inactive digest in event2 log from PEI HOB

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoSecurityPkg TPM2: Update desc for param Buffer of GetDigestListSize()
Star Zeng [Fri, 18 Nov 2016 01:54:21 +0000 (09:54 +0800)]
SecurityPkg TPM2: Update desc for param Buffer of GetDigestListSize()

To make the description more clear, update the description
for parameter Buffer of GetDigestListSize() to
"Buffer to hold copied TPML_DIGEST_VALUES compact binary.".

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoSecurityPkg TPM2: Add GetHashMaskFromAlgo() into Tpm2CommandLib
Star Zeng [Fri, 18 Nov 2016 05:13:21 +0000 (13:13 +0800)]
SecurityPkg TPM2: Add GetHashMaskFromAlgo() into Tpm2CommandLib

Add GetHashMaskFromAlgo() into Tpm2CommandLib for coming consumer.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoSecurityPkg TPM2: Make IsHashAlgSupportedInHashAlgorithmMask external
Star Zeng [Thu, 17 Nov 2016 08:41:08 +0000 (16:41 +0800)]
SecurityPkg TPM2: Make IsHashAlgSupportedInHashAlgorithmMask external

Current IsHashAlgSupportedInHashAlgorithmMask is only an internal
function, this patch makes it external for coming consumer.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>

4 years agoSecurityPkg TPM2: Assign real copied count in CopyDigestListToBuffer()
Star Zeng [Wed, 16 Nov 2016 09:17:36 +0000 (17:17 +0800)]
SecurityPkg TPM2: Assign real copied count in CopyDigestListToBuffer()

In CopyDigestListToBuffer() of Tpm2CommandLib, the count in returned
Buffer should be real copied DigestList count.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdePkg BaseLib: API PathRemoveLastItem not handle root paths properly
Hao Wu [Thu, 17 Nov 2016 06:07:54 +0000 (14:07 +0800)]
MdePkg BaseLib: API PathRemoveLastItem not handle root paths properly

https://bugzilla.tianocore.org/show_bug.cgi?id=239

When the input path for API PathRemoveLastItem() is a root path like
'fs0:\', the API will return TRUE (indicating a directory or file was
removed from the path) and modifies the path to 'fs0:'. In fact, there's
no directory or file removed in the above case.

This commit adds additional check to resolve this issue and modifies the
API's description to make it more straightforward.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
4 years agoNetworkPkg: Check for the max DHCP packet length before use it.
Fu Siyuan [Wed, 16 Nov 2016 05:37:15 +0000 (13:37 +0800)]
NetworkPkg: Check for the max DHCP packet length before use it.

This patch updates the PXE and HTTP boot driver to drop the input DHCP packet
if it exceed the maximum length.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
4 years agoMdeModulePkg: Check for the max DHCP packet length before use it.
Fu Siyuan [Wed, 16 Nov 2016 05:36:37 +0000 (13:36 +0800)]
MdeModulePkg: Check for the max DHCP packet length before use it.

This patch updates the PXE driver to drop the input DHCP packet if it
exceed the maximum length.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
4 years agoMdePkg Base.h: Add add comments on __ prefix in enum VERIFY_UINTXX_ENUM_SIZE
Liming Gao [Fri, 11 Nov 2016 03:30:13 +0000 (11:30 +0800)]
MdePkg Base.h: Add add comments on __ prefix in enum VERIFY_UINTXX_ENUM_SIZE

Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
4 years agoBaseTools gitignore: Ignore VS intermediate files *.obj and *.pdb
Liming Gao [Tue, 15 Nov 2016 06:27:03 +0000 (14:27 +0800)]
BaseTools gitignore: Ignore VS intermediate files *.obj and *.pdb

In V2, ignore .exe and .ilk files

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
4 years agoOvmfPkg: Add 4K PE alignment to enable SMM page level protection.
Jiewen Yao [Thu, 17 Nov 2016 13:37:40 +0000 (21:37 +0800)]
OvmfPkg: Add 4K PE alignment to enable SMM page level protection.

Tested boot with below configuration:
IA32
IA32X64
X64

Tested boot with XD enabled/disabled.

Requested-by: Laszlo Ersek <lersek@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
4 years agoUefiCpuPkg/PiSmmCpu: Check XdSupport before set NX.
Jiewen Yao [Thu, 17 Nov 2016 13:32:25 +0000 (21:32 +0800)]
UefiCpuPkg/PiSmmCpu: Check XdSupport before set NX.

When XD is not supported, the BIT63 is reserved.
We should not set BIT63 in the page table.

Test OVMF IA32/IA32X64 with XD enabled/disabled.

Analyzed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoMdeModulePkg/BdsDxe: Avoid overwriting PlatformRecovery####
Ruiyu Ni [Tue, 15 Nov 2016 10:02:32 +0000 (18:02 +0800)]
MdeModulePkg/BdsDxe: Avoid overwriting PlatformRecovery####

Current implementation always creates PlatformRecovery0000
pointing to \EFI\BOOT\BOOT$(ARCH).efi but it may overwrite
PlatformRecovery#### created before (maybe by a DXE driver).

The patch only uses the smallest unused option number for
the \EFI\BOOT\BOOT$(ARCH).efi PlatformRecovery#### to avoid
overwriting already-created PlatformRecovery####.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jie Lin <jie.lin@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
4 years agoMdeModulePkg/BdsDxe: Fix bug to run non-first PlatformRecovery####
Ruiyu Ni [Tue, 15 Nov 2016 09:50:43 +0000 (17:50 +0800)]
MdeModulePkg/BdsDxe: Fix bug to run non-first PlatformRecovery####

The implementation doesn't check the LoadOptions[Index].Status but
only depends on the Status returned from
EfiBootManagerProcessLoadOption(), which results only the first
PlatformRecovery#### runs.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jie Lin <jie.lin@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
4 years agoMdeModulePkg/UefiBootManagerLib: Refine the debug message
Ruiyu Ni [Tue, 15 Nov 2016 09:43:31 +0000 (17:43 +0800)]
MdeModulePkg/UefiBootManagerLib: Refine the debug message

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
4 years agoPcAtChipsetPkg/PcRtc: Handle NULL table entry in RSDT/XSDT
Ruiyu Ni [Mon, 14 Nov 2016 05:25:54 +0000 (13:25 +0800)]
PcAtChipsetPkg/PcRtc: Handle NULL table entry in RSDT/XSDT

The ACPI code may reserve the first entry for a certain table
(might be FACS) to help with OS compatible issues.
We need to skip the NULL table entry in RSDT/XSDT.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
4 years agoUefiCpuPkg/SecCore: Correct print format for stack information
Jeff Fan [Tue, 15 Nov 2016 08:29:22 +0000 (16:29 +0800)]
UefiCpuPkg/SecCore: Correct print format for stack information

v2:
  Per Laszlo and Andrew's comments at
    https://lists.01.org/pipermail/edk2-devel/2016-November/004759.html
  SecCoreData->StackBase is VOID * type. We should use %p to dump VOID * type.
  SecCoreData->StackSize is UINTN type, but %x only could print unsinged-int
  type. We will cast it to UINT32 firstly and then use %x to print it.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
4 years agoMdeModulePkg/PiSmmCpuDxeSmm: Check RegisterCpuInterruptHandler status
Jeff Fan [Wed, 16 Nov 2016 14:25:56 +0000 (22:25 +0800)]
MdeModulePkg/PiSmmCpuDxeSmm: Check RegisterCpuInterruptHandler status

Once platform selects the incorrect instance, the caller could know it from
return status and ASSERT().

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
4 years agoMdeModulePkg/CpuExceptionHanderLibNull: RegisterCpuInterruptHandler()
Jeff Fan [Wed, 16 Nov 2016 14:18:11 +0000 (22:18 +0800)]
MdeModulePkg/CpuExceptionHanderLibNull: RegisterCpuInterruptHandler()

Current CpuExceptionHanderLibNull instance returns EFI_SUCCESS for all three
services. If platform does not want to hook the Exception vector for some
modules (For example DxeCore), it could select this NULL instance in DSC file
for those module. But some modules that want to consume
RegisterCpuInterruptHandler() cannot use NULL instance. If platform does not
select the correct library instance, it will does work. But the caller does not
recognize it.

This update is to return EFI_UNSUPPORTED on RegisterCpuInterruptHandler() in
NULL instance instead of return EFI_SUCCESS. Once platform selects this NULL
instance, the caller could know it from return status.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Add volatile to mNumberToFinish
Michael Kinney [Thu, 17 Nov 2016 20:43:04 +0000 (12:43 -0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Add volatile to mNumberToFinish

Add volatile qualifier to mNumberToFinish to prevent GCC 5.4
compiler from optimizing away required logic in ACPI S3 resume.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: TransferApToSafeState() use UINTN params
Michael Kinney [Thu, 17 Nov 2016 20:41:35 +0000 (12:41 -0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: TransferApToSafeState() use UINTN params

Update TransferApToSafeState() use UINTN params to reduce the
number of type casts required in these calls.  Also change
the NumberToFinish parameter from UINT32* to UINTN
NumberToFinishAddress to resolve issues with conversion from
a volatile pointer to a non-volatile pointer.  The assembly
code that receives the NumberToFinishAddress value must treat
that memory location as a volatile to track the number of APs.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoIntelSiliconPkg: Add DxeSmbiosDataHobLib
Giri P Mudusuru [Mon, 14 Nov 2016 07:06:26 +0000 (23:06 -0800)]
IntelSiliconPkg: Add DxeSmbiosDataHobLib

Added NULL Library constructor DxeSmbiosDataHobLib which adds SMBIOS
records from gIntelSmbiosDataHobGuid HOB to SMBIOS table using
SMBIOS protocol.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdePkg/BaseSynchronizationLib: Fix function names in function headers
Michael Kinney [Thu, 17 Nov 2016 19:08:38 +0000 (11:08 -0800)]
MdePkg/BaseSynchronizationLib: Fix function names in function headers

Some of the function names in function header comment blocks in
assembly files do not match the symbol name in the assembly sources.
Update function header comment blocks to match symbol name.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg/BaseSynchronizationLib: Add volatile Interlocked*() APIs
Michael Kinney [Wed, 16 Nov 2016 22:37:15 +0000 (14:37 -0800)]
MdePkg/BaseSynchronizationLib: Add volatile Interlocked*() APIs

The SpinLock functions in the SynchronicationLib use volatile
parameters to keep compiler from optimizing these functions
too much.  The volatile keyword is missing from the Interlocked*()
functions in this same library instance.  Update the library instance
to consistently use volatile on all functions in the
SynchronizationLib class.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg/Include: Add volatile to SynchronizationLib parameters
Michael Kinney [Thu, 17 Nov 2016 18:57:53 +0000 (10:57 -0800)]
MdePkg/Include: Add volatile to SynchronizationLib parameters

The SpinLock functions in the SynchronicationLib use volatile
parameters to keep compiler from optimizing these functions
too much.  The volatile keyword is missing from the Interlocked*()
functions in this same library class.  Update the library class
to consistently use volatile on all functions in this class.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoSignedCapsulePkg Universal: Init local variables before using them
Hao Wu [Wed, 16 Nov 2016 08:01:57 +0000 (16:01 +0800)]
SignedCapsulePkg Universal: Init local variables before using them

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoSignedCapsulePkg IniParsingLib: ASSERT to ensure 'Value' is not NULL
Hao Wu [Wed, 16 Nov 2016 07:47:55 +0000 (15:47 +0800)]
SignedCapsulePkg IniParsingLib: ASSERT to ensure 'Value' is not NULL

Function GetStringFromDataFile() ensures its fourth (output) parameter
will not be NULL when the return status is EFI_SUCCESS.

This commit adds ASSERT as warnings for the case that will not happen.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoBaseTools/BuildEnv: Do not modify the env 'PACKAGES_PATH' in BuildEnv
Hao Wu [Wed, 16 Nov 2016 08:35:56 +0000 (16:35 +0800)]
BaseTools/BuildEnv: Do not modify the env 'PACKAGES_PATH' in BuildEnv

https://bugzilla.tianocore.org/show_bug.cgi?id=236

The script 'BuildEnv' modifies the value of the environment variable
'PACKAGES_PATH' (line 44). The script will substitute the ':' symbol
(separating multiple paths) with a space.

This is not supposed to happen since users might later use 'PACKAGES_PATH'
during the code-building process under a multiple-workspace scenario.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoCorebootPayloadPkg/CbSupportPei: Fix the memory map issue
Maurice Ma [Thu, 17 Nov 2016 03:22:32 +0000 (19:22 -0800)]
CorebootPayloadPkg/CbSupportPei: Fix the memory map issue

When coreboot reports memory range across 1MB, the current code
cannot handle it properly. In this case the range should be
adjusted to start from 1MB instead since the memory resource
below 1MB has been preprocessed by CbSupportPei module.

This patch fixed the coreboot + UEFI payload hang issue when
running on QEMU due to incorrect memory map.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
4 years agoCorebootPayloadPkg: Allow PciLib instance selection
Maurice Ma [Thu, 17 Nov 2016 03:01:01 +0000 (19:01 -0800)]
CorebootPayloadPkg: Allow PciLib instance selection

On old platform without PCIe express support, the PciLib needs to
be mapped to PciLibCf8 instance to make it work.  On new platform
with PCIe express support, the PciLib needs to be mapped to
PciLibPciExpress to allow access to extended PCIe configuration
space. This patch allows to select the PciLib instance between
PciLibCf8 and PciLibPciExpress using the PCIE_BASE macro through
build command line.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
4 years agoMdePkg/BaseMemoryLib: Fix VS2015 build error
Michael Kinney [Thu, 10 Nov 2016 02:31:38 +0000 (18:31 -0800)]
MdePkg/BaseMemoryLib: Fix VS2015 build error

https://bugzilla.tianocore.org/show_bug.cgi?id=237

Make the smallest change possible to workaround a VS2015
build error.  The change is to the loop that handles the
case where neither the source nor the destination are
64-bit or 32-bit aligned and the logic falls through to
a loop that performs the copy as bytes.  Only the loop
that copies bytes backwards needs to be updated to avoid
the VS2015 build error.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoIntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID def
Laszlo Ersek [Thu, 17 Nov 2016 10:31:37 +0000 (11:31 +0100)]
IntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID def

The DEC spec doesn't allow the trailing semicolon:

  2.6 [Guids] Usage

  GuidCName = {C Format Guid Value} # Comment

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoUefiCpuPkg/MpInitLib: support 64-bit AP stack addresses
Laszlo Ersek [Wed, 16 Nov 2016 22:31:11 +0000 (23:31 +0100)]
UefiCpuPkg/MpInitLib: support 64-bit AP stack addresses

The cached "CPU_INFO_IN_HOB.ApTopOfStack" field currently has type UINT32.
This is not ideal because the AP stacks are located within
"CpuMpData->Buffer", which is allocated with a plain AllocatePages() call
in MpInitLibInitialize():

  platform  CpuMpPei included  PEI RAM > 4GB  result
  --------  -----------------  -------------  ------
  Ia32      *                  n/a            good
  Ia32X64   no                 n/a            BAD
  Ia32X64   yes                n/a            good
  X64       no                 *              BAD
  X64       yes                no             good
  X64       yes                yes            BAD

- If we are on an Ia32X64 or X64 platform that does not include CpuMpPei,
  then CpuDxe cannot reuse the CPU_INFO_IN_HOB structures preallocated by
  CpuMpPei (through the CpuInitMpLib GUID HOB), and then AllocatePages()
  -- invoked first in 64-bit DXE -- could return an address outside of
  32-bit address space.

- If we are on an X64 platform where the permanent PEI RAM extends above
  the 32-bit address space, then the same issue can surface even if
  CpuMpPei is included: even the original allocation of the
  CPU_INFO_IN_HOB structures, by CpuMpPei, could be satisfied from above
  4GB.

The original "AP init" branch in "X64/MpFuncs.nasm" correctly considers a
64-bit stack start: the "MP_CPU_EXCHANGE_INFO.StackStart" field has type
UINTN, and the code uses QWORD addition and movement to set RSP from it.

Adapt the "GetApicId" branch of "X64/MpFuncs.nasm":

- change the type of "CPU_INFO_IN_HOB.ApTopOfStack" to UINT64,

- remove the explicit truncation to UINT32 in InitializeApData(),

- update the "GetNextProcNumber" iteration size to the new size of
  "CPU_INFO_IN_HOB",

- set RSP with a QWORD movement from "CPU_INFO_IN_HOB.ApTopOfStack".

Because the same CPU_INFO_IN_HOB structure is used by "Ia32/MpFuncs.nasm",
we have to update the "GetNextProcNumber" iteration size there as well.
The ESP setting can be preserved as a DWORD movement from the original
offset (decimal 12), since our integers are little endian.

Cc: Jeff Fan <jeff.fan@intel.com>
Fixes: 845c5be1fd9bf7edfac4a103dfab70829686978f
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoUefiCpuPkg/MpInitLib/X64/MpFuncs.nasm: fix fatal typo
Laszlo Ersek [Wed, 16 Nov 2016 21:52:06 +0000 (22:52 +0100)]
UefiCpuPkg/MpInitLib/X64/MpFuncs.nasm: fix fatal typo

The recent patch "UefiCpuPkg/MpInitLib: Program AP stack in fixed address"
inadvertently broke the first startup of APs during X64 PEI, because in
the TestLock section of the code, it replaced the access to the
NumApsExecuting counter with an access to the unrelated InitFlag field.

Cc: Jeff Fan <jeff.fan@intel.com>
Fixes: 845c5be1fd9bf7edfac4a103dfab70829686978f
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoUefiCpuPkg/MpInitLib/X64/MpFuncs.nasm: remove superfluous instruction
Laszlo Ersek [Wed, 16 Nov 2016 21:46:08 +0000 (22:46 +0100)]
UefiCpuPkg/MpInitLib/X64/MpFuncs.nasm: remove superfluous instruction

At this point, ESI still has the value from EBX.

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoUefiCpuPkg/DxeMpInitLib: remove duplicate HobLib class dependency
Laszlo Ersek [Wed, 16 Nov 2016 23:05:32 +0000 (00:05 +0100)]
UefiCpuPkg/DxeMpInitLib: remove duplicate HobLib class dependency

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoMdeModulePkg/Include: Add PiSmmMemoryAttributesTable.h
Jiewen Yao [Sun, 23 Oct 2016 15:09:16 +0000 (23:09 +0800)]
MdeModulePkg/Include: Add PiSmmMemoryAttributesTable.h

This table describes the SMM memory attributes.

The new GUID gEdkiiPiSmmMemoryAttributesTableGuid and its associated
structure are based on the EFI_MEMORY_ATTRIBUTES_TABLE and GUID from the
UEFI Specification.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
[lersek@redhat.com: update commit message as requested by Michael Kinney]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
4 years agoMdeModulePkg HiiDatabase: Remove extra memory initialization.
Eric Dong [Tue, 15 Nov 2016 02:26:47 +0000 (10:26 +0800)]
MdeModulePkg HiiDatabase: Remove extra memory initialization.

The memory will be set to background color after success allocate
the data, so not need to call AllocateZeroPool.

Related bugz: https://bugzilla.tianocore.org/show_bug.cgi?id=223

Cc: Dandan Bi <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoQuarkPlatformPkg/dsc: enable Smm paging protection.
Jiewen Yao [Sun, 23 Oct 2016 15:26:20 +0000 (23:26 +0800)]
QuarkPlatformPkg/dsc: enable Smm paging protection.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection.
Jiewen Yao [Sun, 23 Oct 2016 15:19:52 +0000 (23:19 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection.

PiSmmCpuDxeSmm consumes SmmAttributesTable and setup page table:
1) Code region is marked as read-only and Data region is non-executable,
if the PE image is 4K aligned.
2) Important data structure is set to RO, such as GDT/IDT.
3) SmmSaveState is set to non-executable,
and SmmEntrypoint is set to read-only.
4) If static page is supported, page table is read-only.

We use page table to protect other components, and itself.

If we use dynamic paging, we can still provide *partial* protection.
And hope page table is not modified by other components.

The XD enabling code is moved to SmiEntry to let NX take effect.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
4 years agoUefiCpuPkg/dec: Add PcdCpuSmmStaticPageTable.
Jiewen Yao [Sun, 23 Oct 2016 15:21:20 +0000 (23:21 +0800)]
UefiCpuPkg/dec: Add PcdCpuSmmStaticPageTable.

If enabled, SMM will not use on-demand paging.
SMM will build static page table for all memory.

The page table size depend on 2 things:
1) The 1G paging capability.
2) The whole system memory/MMIO addressing capability.

A) If the system only supports 2M paging,
When the whole memory/MMIO is 32bit, we only need 1+1+4=6 pages for 4G.
When the whole memory/MMIO is 39bit, we need 1+1+256 pages (~ 1M)
When the whole memory/MMIO is 48bit, we need 1+256+256*256 pages (~ 257M)

B) If the system supports 1G paging.
When the whole memory/MMIO is 32bit, we only need 1+1+4=6 pages for 4G.
(We still generate 2M page for maintenance consideration.)
When the whole memory/MMIO is 39bit, we still need 6 pages.
(We setup 1G paging for >1G.)
When the whole memory/MMIO is 48bit, we need 1+256 pages (~ 1M).

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
4 years agoMdeModulePkg/PiSmmCore: Add MemoryAttributes support.
Jiewen Yao [Sun, 23 Oct 2016 15:14:00 +0000 (23:14 +0800)]
MdeModulePkg/PiSmmCore: Add MemoryAttributes support.

The SMM memory attribute table concept is similar to UEFI
memory attribute table.

The new file MdeModulePkg/Core/PiSmmCore/MemoryAttributesTable.c
and the new code in MdeModulePkg/Core/PiSmmCore/Page.c
are based on the algorithms and implementation from
MdeModulePkg/Core/Dxe/Misc/MemoryAttributesTable.c
and MdeModulePkg/Core/Dxe/Mem/Page.c.

These new components are based on the Memory Attributes Table
feature from the UEFI Specification and the existing DXE Core
implementation that supports that feature.

This SMM MemoryAttributes table is produced at SmmEndOfDxe event.
So that the consumer (PiSmmCpu) may consult this table
to set memory attribute in page table.

This patch also installs LoadedImage protocol to SMM
protocol database, so that the SMM image info can be
got easily to construct the PiSmmMemoryAttributes table.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
4 years agoMdeModulePkg/dec: Add gEdkiiPiSmmMemoryAttributesTableGuid.
Jiewen Yao [Sun, 23 Oct 2016 15:11:15 +0000 (23:11 +0800)]
MdeModulePkg/dec: Add gEdkiiPiSmmMemoryAttributesTableGuid.

This table describes the SMM memory attributes.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
4 years agoArmVirtPkg DxeHobLib: Update func header description of BuildFv(2)Hob()
Star Zeng [Wed, 16 Nov 2016 02:07:42 +0000 (10:07 +0800)]
ArmVirtPkg DxeHobLib: Update func header description of BuildFv(2)Hob()

Update the function header description of BuildFv(2)Hob() to match
with HobLib.h in MdePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=205

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoIntelFrameworkPkg PeiHobLib: Check FV alignment when building FV HOB
Star Zeng [Wed, 16 Nov 2016 02:01:57 +0000 (10:01 +0800)]
IntelFrameworkPkg PeiHobLib: Check FV alignment when building FV HOB

If the FvImage buffer is not at its required alignment, then ASSERT().
Also update the function header description of BuildFv(2)Hob()
correspondingly.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=205

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg HobLib: Check FV alignment when building FV HOB
Star Zeng [Mon, 14 Nov 2016 02:52:29 +0000 (10:52 +0800)]
MdePkg HobLib: Check FV alignment when building FV HOB

If the FvImage buffer is not at its required alignment, then ASSERT().
Also update the function header description of BuildFv(2)Hob()
correspondingly.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=205

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoMdeModulePkg DxeCore: Show error message on unaligned FvImage issue
Star Zeng [Fri, 11 Nov 2016 03:27:58 +0000 (11:27 +0800)]
MdeModulePkg DxeCore: Show error message on unaligned FvImage issue

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=205

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoMdeModulePkg/Ip4Dxe: Correct the return status
Jiaxin Wu [Fri, 11 Nov 2016 04:52:49 +0000 (12:52 +0800)]
MdeModulePkg/Ip4Dxe: Correct the return status

This patch made the following change:
* DataItem->Status should be updated to the status code.
* Data should not be freed if EFI_NOT_READY returned.

Cc: Santhapur Naveen <naveens@amiindia.co.in>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>