mirror_edk2.git
2 years agoMdeModulePkg BdsDxe: Correct VariableLockProtocol usage to match code logic
Liming Gao [Mon, 18 Jun 2018 14:57:44 +0000 (22:57 +0800)]
MdeModulePkg BdsDxe: Correct VariableLockProtocol usage to match code logic

BdsEntry marks the read-only variables if the Variable Lock protocol exists.
So, this protocol usage is updated from CONSUMES to SOMETIMES_CONSUMES.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoBaseTools tools_def.template: Ignore link warning 4281 for VS2017
Liming Gao [Fri, 22 Jun 2018 02:33:12 +0000 (10:33 +0800)]
BaseTools tools_def.template: Ignore link warning 4281 for VS2017

VS2017 reports warning LNK4281: undesirable base address 0x0 for x64 image;
set base address above 4GB for best ASLR optimization.

edk2 build always sets baes address to zero as default. So, ignore this link
warning.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Pete Batard <pete@akeo.ie>
2 years agoSecurityPkg: Cache TPM interface type info
Zhang, Chao B [Tue, 8 May 2018 06:51:57 +0000 (14:51 +0800)]
SecurityPkg: Cache TPM interface type info

Cache TPM interface type info to avoid excessive interface ID register read

Cc: Long Qin <qin.long@intel.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Long Qin <qin.long@intel.com>
2 years agoFatPkg/FatPei: Add the recognition of recovery capsule on NVME device
Hao Wu [Mon, 21 May 2018 05:12:09 +0000 (13:12 +0800)]
FatPkg/FatPei: Add the recognition of recovery capsule on NVME device

The driver now can recognize the BlockIo2 PPI for NVM Express devices.
And support identifying the recovery capsule on those devices.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoMdeModulePkg: Add GUID for recovery capsule on NVM Express devices
Hao Wu [Mon, 21 May 2018 05:06:47 +0000 (13:06 +0800)]
MdeModulePkg: Add GUID for recovery capsule on NVM Express devices

Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg/NvmExpressPei: Add the NVME device PEI BlockIo support
Hao Wu [Mon, 21 May 2018 05:28:24 +0000 (13:28 +0800)]
MdeModulePkg/NvmExpressPei: Add the NVME device PEI BlockIo support

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=256

This commit adds the PEI BlockIo support for NVM Express devices.

The driver will consume the EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI for NVM
Express host controllers within the system. And then produces the
BlockIo(2) PPIs for each controller.

The implementation of this driver is currently based on the NVM Express 1.1
Specification, which is available at:
http://nvmexpress.org/resources/specifications/

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg: Add definitions for EDKII PEI NVME host controller PPI
Hao Wu [Wed, 2 May 2018 06:12:12 +0000 (14:12 +0800)]
MdeModulePkg: Add definitions for EDKII PEI NVME host controller PPI

Introduces the below PPI:

struct EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI {
  EDKII_NVM_EXPRESS_HC_GET_MMIO_BAR       GetNvmeHcMmioBar;
  EDKII_NVM_EXPRESS_HC_GET_DEVICE_PATH    GetNvmeHcDevicePath;
};

The GetNvmeHcMmioBar service will provide the caller with the MMIO BAR
address of each NVMe HC within the system;

The GetNvmeHcDevicePath service will provide the caller with the device
path information of each NVMe HC.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2 years agoIntelFsp2Pkg: SplitFspBin.py to support x64 drivers
Chasel, Chiu [Fri, 22 Jun 2018 10:22:47 +0000 (18:22 +0800)]
IntelFsp2Pkg: SplitFspBin.py to support x64 drivers

FSP binary potentially can include X64 drivers to
simplify implementation or support new features so
update SplitFspBin.py to support x64 image headers.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2 years agoVlv2TbltDevicePkg: Set SMM Stack size to 16 KB
Michael D Kinney [Wed, 30 May 2018 23:52:11 +0000 (16:52 -0700)]
Vlv2TbltDevicePkg: Set SMM Stack size to 16 KB

Stack overflows were observed at the default SMM stack
size of 8 KB.  Increase stack size to 16 KB to prevent
SMM stack overflows.

Cc: David Wei <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
2 years agoArmPkg/ArmScmiDxe: Dynamically allocate buffer for protocol ids
Girish Pathak [Tue, 19 Jun 2018 13:53:53 +0000 (14:53 +0100)]
ArmPkg/ArmScmiDxe: Dynamically allocate buffer for protocol ids

Dynamically allocate the buffer to receive the SCMI protocol list.
This makes MAX_PROTOCOLS redundant, so it is removed.
It also fixes one minor code alignment issue and removes an unused
macro PROTOCOL_MASK.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2 years agoArmPkg/ArmScmiDxe: Fix ASSERT error in SCMI DXE
Girish Pathak [Tue, 19 Jun 2018 13:53:52 +0000 (14:53 +0100)]
ArmPkg/ArmScmiDxe: Fix ASSERT error in SCMI DXE

This change fixes a bug in the SCMI DXE which is observed with the
upcoming release of the SCP firmware.

The PROTOCOL_ID_MASK (0xF) which is used to generate an index in
the ProtocolInitFxns is wrong because protocol ids can be
anywhere in 0x10 - 15 or 0x80 - FF range. This mask generates
the same index for two different protocols e.g. for protocol ids
0x10 and 0x90, which causes duplicate initialization of a protocol
resulting in a failure.

This change removes the use of PROTOCOL_ID_MASK and instead
uses a list of protocol ids and their initialization functions
to identify a supported protocol and initialize it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2 years agoBaseTools: introduce !error statement
Yunhua Feng [Sun, 17 Jun 2018 09:22:21 +0000 (17:22 +0800)]
BaseTools: introduce !error statement

The DSC and FDF file can use `!error` statement. The argument of this
statement is an error message, it causes build tool to stop at the
location where the statement is encountered and error message following
the `!error` statement is output as a message.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=701
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Enhance BaseTools supports FeaturePcd usage in VFR file
Yonghong Zhu [Tue, 19 Jun 2018 01:08:41 +0000 (09:08 +0800)]
BaseTools: Enhance BaseTools supports FeaturePcd usage in VFR file

Bugzilla 348 only fixed FixedAtBuild Pcd type, now this patch also add
support for FeaturePcd type.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=348
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoBaseTools: remove the unneeded code
Yonghong Zhu [Wed, 13 Jun 2018 01:12:28 +0000 (09:12 +0800)]
BaseTools: remove the unneeded code

Do a clean up to remove the unneeded code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoArmPkg/ArmMmuLib ARM: fix Mva to use idx instead of table base
Chris Co [Fri, 13 Apr 2018 23:43:27 +0000 (23:43 +0000)]
ArmPkg/ArmMmuLib ARM: fix Mva to use idx instead of table base

Mva address calculation should use the left-shifted current
section index instead of the left-shifted table base address.

Using the table base address here has the side-effect of potentially
causing an access violation depending on the base address value.

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Christopher Co <christopher.co@microsoft.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2 years agoArmPkg/ArmMmuLib ARM: assume page tables are in writeback cacheable memory
Ard Biesheuvel [Thu, 21 Jun 2018 07:17:52 +0000 (09:17 +0200)]
ArmPkg/ArmMmuLib ARM: assume page tables are in writeback cacheable memory

Given that these days, our ARM port only supports ARMv7 and later, we
can assume that the page table walker's memory accesses are cache
coherent, and so there is no need to perform cache maintenance. It
does require the page tables themselves to reside in memory mapped as
writeback cacheable so ASSERT() that this is the case.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoArmPkg/ArmMmuLib ARM: remove cache maintenance of block mapping contents
Ard Biesheuvel [Wed, 20 Jun 2018 19:01:52 +0000 (21:01 +0200)]
ArmPkg/ArmMmuLib ARM: remove cache maintenance of block mapping contents

Peculiarly enough, the current page table manipulation code takes it
upon itself to write back and invalidate the memory contents covered
by page and section mappings when their memory attributes change. It
is not generally the case that data must be written back when such a
change occurs, even when switching from cacheable to non-cacheable
attributes, and in some cases, it is actually causing problems. (The
cache maintenance is also performed on the PCIe MMIO regions as they
get mapped by the PCI bus driver, and under virtualization, each
cache maintenance operation on an emulated MMIO region triggers a
round trip to the host and back)

So let's just drop this code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoShellPkg/comp: return NOT_EQUAL when compared files are different
Ruiyu Ni [Thu, 14 Jun 2018 05:55:21 +0000 (13:55 +0800)]
ShellPkg/comp: return NOT_EQUAL when compared files are different

Today's implementation returns 0 even when compared files are
different.
The patch returns 27 (SHELL_NOT_QUAL) in such case to follow
the shell spec.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
2 years agoSignedCapsulePkg/SystemFirmwareUpdateDxe: Fix ECC issues
Dandan Bi [Tue, 19 Jun 2018 07:38:47 +0000 (15:38 +0800)]
SignedCapsulePkg/SystemFirmwareUpdateDxe: Fix ECC issues

Make function comments align with functions.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg: Enable SATA Controller PCI mem space
Sami Mujawar [Tue, 19 Jun 2018 11:58:14 +0000 (19:58 +0800)]
MdeModulePkg: Enable SATA Controller PCI mem space

The SATA controller driver crashes while accessing the
PCI memory [AHCI Base Registers (ABAR)], as the PCI memory
space is not enabled.

Enable the PCI memory space access to prevent the SATA
Controller driver from crashing.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg/NetworkPkg: Checking for NULL pointer before use.
Fu Siyuan [Thu, 14 Jun 2018 02:30:09 +0000 (10:30 +0800)]
MdeModulePkg/NetworkPkg: Checking for NULL pointer before use.

Contributed-under: TianoCore Contribution Agreement 1.1

Signed-off-by: Sivaraman Nainar <sivaramann@amiindia.co.in>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
2 years agoMdeModulePkg/Core: remove SMM check for Heap Guard feature detection
Jian J Wang [Wed, 13 Jun 2018 03:05:44 +0000 (11:05 +0800)]
MdeModulePkg/Core: remove SMM check for Heap Guard feature detection

CpuDxe driver is updated to be able to access DXE page table in SMM mode,
which means Heap Guard can get correct memory paging attributes in what
environment. It's not necessary to exclude SMM from detecting Heap Guard
feature support.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoUefiCpuPkg/CpuDxe: make register access more readable
Jian J Wang [Fri, 30 Mar 2018 14:25:56 +0000 (22:25 +0800)]
UefiCpuPkg/CpuDxe: make register access more readable

Update code to use more meaningful constant macro or predefined
register structure.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2 years agoUefiCpuPkg/CpuDxe: allow accessing (DXE) page table in SMM mode
Jian J Wang [Thu, 14 Jun 2018 01:51:34 +0000 (09:51 +0800)]
UefiCpuPkg/CpuDxe: allow accessing (DXE) page table in SMM mode

The MdePkg/Library/SmmMemoryAllocationLib, used only by DXE_SMM_DRIVER,
allows to free memory allocated in DXE (before EndOfDxe). This is done
by checking the memory range and calling gBS services to do real
operation if the memory to free is out of SMRAM. If some memory related
features, like Heap Guard, are enabled, gBS interface will turn to
EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes(), provided by
DXE driver UefiCpuPkg/CpuDxe, to change memory paging attributes. This
means we have part of DXE code running in SMM mode in certain
circumstances.

Because page table in SMM mode is different from DXE mode and CpuDxe
always uses current registers (CR0, CR3, etc.) to get memory paging
attributes, it cannot get the correct attributes of DXE memory in SMM
mode from SMM page table. This will cause incorrect memory manipulations,
like fail the releasing of Guard pages if Heap Guard is enabled.

The solution in this patch is to store the DXE page table information
(e.g. value of CR0, CR3 registers, etc.) in a global variable of CpuDxe
driver. If CpuDxe detects it's in SMM mode, it will use this global
variable to access page table instead of current processor registers.
This can avoid retrieving wrong DXE memory paging attributes and changing
SMM page table attributes unexpectedly.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2 years agoUefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
Eric Dong [Tue, 19 Jun 2018 05:15:39 +0000 (13:15 +0800)]
UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.

On AMD processors the second SendIpi in the SendInitSipiSipi and
SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
undesired side-effects during MP initialization.

This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
the second SendIpi and its associated MicroSecondDelay (200).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoMdePkg/IndustryStandard/Ipmi: Use union for bitmap fields
Hao Wu [Sat, 28 Apr 2018 05:48:06 +0000 (13:48 +0800)]
MdePkg/IndustryStandard/Ipmi: Use union for bitmap fields

This commit enhances the bitmap fields defined in the IPMI header files,
union types will be used to provide the users with both the individual
bitmap access and the whole byte/word access.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoMdePkg/IndustryStandard/Ipmi: Update IPMI header files
Hao Wu [Tue, 17 Apr 2018 07:37:09 +0000 (15:37 +0800)]
MdePkg/IndustryStandard/Ipmi: Update IPMI header files

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=814

This commit updates the IPMI related header files.

Cc: Younas Khan <pmdyounaskhan786@gmail.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoMdeModulePkg/AtaAtapiPassThru: Fix VS2010/VS2012 build failure
Ruiyu Ni [Mon, 11 Jun 2018 02:17:01 +0000 (10:17 +0800)]
MdeModulePkg/AtaAtapiPassThru: Fix VS2010/VS2012 build failure

The patch doesn't have functionality impact. It is just to make
VS2010/VS2012 happy.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2 years agoSourceLevelDebugPkg/DebugCommunicationLibUsb: Add endpoint config.
Marvin H?user [Sat, 16 Jun 2018 16:16:24 +0000 (00:16 +0800)]
SourceLevelDebugPkg/DebugCommunicationLibUsb: Add endpoint config.

Currently, DebugCommunicationLibUsb uses the hardcoded endpoints 0x82
and 0x01 to communicate with the EHCI Debug Device. These, however,
are not standardized and may vary across different hardware.
To solve this problem, the endpoints are retrieved from the
USB Device Descriptor directly.

V2:
  - Store endpoint data in the USB Debug Port handle structure.

V3:
  - Remove the static endpoint PCDs as requested.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2 years agoBaseTools/WorkspaceCommon: Import used BuildToolError messages.
Marvin Haeuser [Sat, 16 Jun 2018 16:15:35 +0000 (00:15 +0800)]
BaseTools/WorkspaceCommon: Import used BuildToolError messages.

Commit c14b58614ffb992dfc668966a19becb86614aafc added a few build
error message display calls to WorkspaceCommon.py without importing
the message resources explicitely. This commit adds imports the
missing directives.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoEmbeddedPkg/GdbSerialLib: avoid left shift of negative quantity
Ard Biesheuvel [Mon, 18 Jun 2018 20:46:36 +0000 (22:46 +0200)]
EmbeddedPkg/GdbSerialLib: avoid left shift of negative quantity

Clang complains about left shifting a negative value being undefined.

  EmbeddedPkg/Library/GdbSerialLib/GdbSerialLib.c:151:30:
  error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value]
  OutputData = (UINT8)((~DLAB<<7)|((BreakSet<<6)|((Parity<<3)|((StopBits<<2)| Data))));

Redefine all bit pattern constants as unsigned to work around this.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoArmPkg/ArmMtlLib: fix prototype inconsistency in MtlWaitUntilChannelFree
Ard Biesheuvel [Mon, 18 Jun 2018 18:13:47 +0000 (20:13 +0200)]
ArmPkg/ArmMtlLib: fix prototype inconsistency in MtlWaitUntilChannelFree

Align the prototype of ArmMtlLib's MtlWaitUntilChannelFree () with the
one in the ArmMtlNullLib implementation (rather than the other way around,
since edk2-platforms has a conflicting implementation as well)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoBaseTools/tools_def CLANG35: add NOOPT build target
Ard Biesheuvel [Mon, 18 Jun 2018 17:31:18 +0000 (19:31 +0200)]
BaseTools/tools_def CLANG35: add NOOPT build target

Create the missing NOOPT target for CLANG35 (which is ARM and AARCH64
only), and align it with the other toolchains: NOOPT has optimizations
disabled entirely (for source level debugging), and DEBUG is changed
from -O0 to -O1, as is the case for CLANG38 as well.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoEmbedded/EmbeddedPkg.dsc: enable NOOPT build target
Ard Biesheuvel [Mon, 18 Jun 2018 16:50:12 +0000 (18:50 +0200)]
Embedded/EmbeddedPkg.dsc: enable NOOPT build target

Enable to NOOPT build target so we can build this package with
optimizations disabled.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoArmPkg/ArmPkg.dsc: enable NOOPT build target
Ard Biesheuvel [Mon, 18 Jun 2018 16:49:30 +0000 (18:49 +0200)]
ArmPkg/ArmPkg.dsc: enable NOOPT build target

Enable to NOOPT build target so we can build this package with
optimizations disabled.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoBaseTools/tools_def IA32: drop -no-pie linker option for GCC49
Ard Biesheuvel [Mon, 18 Jun 2018 08:23:49 +0000 (10:23 +0200)]
BaseTools/tools_def IA32: drop -no-pie linker option for GCC49

As reported by Liming, GCC 4.9.2 does not support the -no-pie
linker option that we added to the GCC49 and GCC5 toolchain
profiles in commit c25d3905523a ("BaseTools/tools_def IA32:
disable PIE code generation explicitly") to work around issues
with recent distro toolchains that enable PIE code generation
by default.

So rollback the changes for GCC49 but preserve them for GCC5

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2 years agoArmPkg/ArmSmcPsciResetSystemLib: implement fallback for warm reboot
Ard Biesheuvel [Wed, 6 Jun 2018 12:32:42 +0000 (14:32 +0200)]
ArmPkg/ArmSmcPsciResetSystemLib: implement fallback for warm reboot

Implement ResetSystemLib's EnterS3WithImmediateWake() routine using
a jump back to the PEI entry point with interrupts and MMU+caches
disabled. This is only possible at boot time, when we are sure that
the current CPU is the only one up and running. Also, it depends on
the platform whether the PEI code is preserved in memory (it may be
copied to DRAM rather than execute in place), so also add a feature
PCD to selectively enable this feature.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoArmPkg/PlatformBootManagerLib: call ProcessCapsules() only once
Ard Biesheuvel [Wed, 6 Jun 2018 14:52:59 +0000 (16:52 +0200)]
ArmPkg/PlatformBootManagerLib: call ProcessCapsules() only once

ARM platforms have no restriction on when a system firmware update
capsule can be applied, and so it is not necessary to call
ProcessCapsules() twice. So let's drop the first invocation that
occurs before EndOfDxe, and rewrite the second call so that all
capsule updates will be applied when the console is up and able to
provide progress feedback.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2 years agoMdeModulePkg/DxeCapsuleLibFmp: pass progress callback only if it works
Ard Biesheuvel [Thu, 7 Jun 2018 06:41:33 +0000 (08:41 +0200)]
MdeModulePkg/DxeCapsuleLibFmp: pass progress callback only if it works

If the first call to UpdateImageProgress() fails, there is no point
in passing a pointer to it to Fmp->SetImage(), since it is highly
unlikely to succeed on any subsequent calls.

This permits the FMP implementation to fall back to an alternate means
of providing feedback to the user, e.g., via the console.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoMdeModulePkg/CapsuleRuntimeDxe: clean the capsule payload to DRAM
Ard Biesheuvel [Tue, 12 Jun 2018 10:37:08 +0000 (12:37 +0200)]
MdeModulePkg/CapsuleRuntimeDxe: clean the capsule payload to DRAM

When capsule updates are staged for processing after a warm reboot,
they are copied into memory with the MMU and caches enabled. When
the capsule PEI gets around to coalescing the capsule, the MMU and
caches may still be disabled, and so on architectures where uncached
accesses are incoherent with the caches (such as ARM and AARCH64),
we need to ensure that the data passed into UpdateCapsule() is
written back to main memory before performing the warm reboot.

Unfortunately, on ARM, the only type of cache maintenance instructions
that are suitable for this purpose operate on virtual addresses only,
and given that the UpdateCapsule() prototype includes the physical
address of a linked list of scatter/gather data structures that are
mapped at an address that is unknown to the firmware (and may not even
be mapped at all when UpdateCapsule() is invoked), we can only perform
this cache maintenance at boot time. Fortunately, both Windows and Linux
only invoke UpdateCapsule() before calling ExitBootServices(), so this
is not a problem in practice.

In the future, we may propose adding a secure firmware service that
permits performing the cache maintenance at OS runtime, in which case
this code may be enhanced to call that service if available. For now,
we just fail any UpdateCapsule() calls performed at OS runtime on ARM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2 years agoSecurityPkg/SecureBootConfigDxe: Fix invalid NV data issue.
Nickle Wang [Tue, 29 May 2018 12:08:25 +0000 (20:08 +0800)]
SecurityPkg/SecureBootConfigDxe: Fix invalid NV data issue.

Check the return value of HiiGetBrowserData() before calling HiiSetBrowserData().
HiiGetBrowserData() failed to retrieve NV data during action EFI_BROWSER_ACTION_RETRIEVE.
If NV data is invalid, stop sending it to form browser.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Nickle Wang <nickle.wang@hpe.com>
Signed-off-by: cinnamon shia <cinnamon.shia@hpe.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
2 years agoArmPlatformPkg: Include PL011UartClock Lib
Udit Kumar [Tue, 12 Jun 2018 20:14:09 +0000 (01:44 +0530)]
ArmPlatformPkg: Include PL011UartClock Lib

This patch gets PL011 baud rate clock from
pl011 uart clock lib instead of Pcd.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2 years agoBaseTools/BinToPcd: Follow PEP-8 indent of 4 spaces
Kinney, Michael D [Sat, 9 Jun 2018 05:35:02 +0000 (22:35 -0700)]
BaseTools/BinToPcd: Follow PEP-8 indent of 4 spaces

https://www.python.org/dev/peps/pep-0008/

Cc: Yanyan Sun <yanyan.sun@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools/BinToPcd: Update for Python 3 compatibility
Kinney, Michael D [Sat, 9 Jun 2018 05:13:05 +0000 (22:13 -0700)]
BaseTools/BinToPcd: Update for Python 3 compatibility

Update to be compatible with both Python 2.x and Python 3.x.
Also return error code 1 when an error is detected to support
use of this tool in scripts.

Cc: Yanyan Sun <yanyan.sun@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools/BinToPcd: --offset must be 8-byte aligned
Kinney, Michael D [Sat, 9 Jun 2018 04:15:26 +0000 (21:15 -0700)]
BaseTools/BinToPcd: --offset must be 8-byte aligned

https://bugzilla.tianocore.org/show_bug.cgi?id=974
https://bugzilla.tianocore.org/show_bug.cgi?id=965

Update help to state that --offset must be 8-byte aligned.
Verify that --offset is 8-byte aligned and print an error
message if it is not 8-byte aligned.

Cc: Yanyan Sun <yanyan.sun@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools/BinToPcd: Clarify error message for --type HII
Kinney, Michael D [Sat, 9 Jun 2018 03:49:43 +0000 (20:49 -0700)]
BaseTools/BinToPcd: Clarify error message for --type HII

https://bugzilla.tianocore.org/show_bug.cgi?id=963

Update error message for --type HII.  If either --variable-guid
or --variable-name is missing, then print an error message that
states that both --variable-guid and --variable-name are required.

Cc: Yanyan Sun <yanyan.sun@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools/BinToPcd: Fix typo in error messages
Kinney, Michael D [Sat, 9 Jun 2018 03:43:44 +0000 (20:43 -0700)]
BaseTools/BinToPcd: Fix typo in error messages

https://bugzilla.tianocore.org/show_bug.cgi?id=962

Change "PcdToBin" to "BinToPcd"

Cc: Yanyan Sun <yanyan.sun@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoArmVirtPkg: add QemuRamfbDxe
Gerd Hoffmann [Wed, 13 Jun 2018 07:29:36 +0000 (09:29 +0200)]
ArmVirtPkg: add QemuRamfbDxe

Add QemuRamfbDxe to dsc and fdf files for ArmVirt package.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg: add QemuRamfb to platform console
Gerd Hoffmann [Wed, 13 Jun 2018 07:29:35 +0000 (09:29 +0200)]
OvmfPkg: add QemuRamfb to platform console

Add QemuRamfbDxe device path to the list of platform console devices,
so ConSplitter will pick up the device even though it isn't a PCI GPU.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg: add QemuRamfbDxe
Gerd Hoffmann [Wed, 13 Jun 2018 07:29:34 +0000 (09:29 +0200)]
OvmfPkg: add QemuRamfbDxe

Add a driver for the qemu ramfb display device.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
[lersek@redhat.com: fix INF banner typo]
[lersek@redhat.com: make some local variable definitions more idiomatic]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg: add QEMU_RAMFB_GUID
Gerd Hoffmann [Wed, 13 Jun 2018 07:29:33 +0000 (09:29 +0200)]
OvmfPkg: add QEMU_RAMFB_GUID

Add GUID header file for the QemuRamfbDxe driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2 years agoMdeModulePkg/IncompPciDeviceSupport: Use correct descriptor length
Ruiyu Ni [Wed, 13 Jun 2018 08:53:17 +0000 (16:53 +0800)]
MdeModulePkg/IncompPciDeviceSupport: Use correct descriptor length

Per PI spec, the Length value is the length of the ACPI descriptor
in bytes, excluding the first two fields.
The patch fixes the code to report the correct descriptor length
by excluding 3-byte first two fields.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2 years agoBaseTools: remove including Base.h if the module type is not BASE
Yonghong Zhu [Tue, 12 Jun 2018 05:01:00 +0000 (13:01 +0800)]
BaseTools: remove including Base.h if the module type is not BASE

According the module type to include the header file.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=867
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoArmPlatformPkg: PL011 Dynamic clock freq Support
Udit Kumar [Tue, 12 Jun 2018 20:14:08 +0000 (01:44 +0530)]
ArmPlatformPkg: PL011 Dynamic clock freq Support

Some platform support dynamic clocking, which is controlled by some
jumper setting or hardware registers. Result of that is that PCD
PL011UartClkInHz would need to be updated for frequency change.

This patch implements support for dynamic frequency for PL011 uart.

This patch implements default lib, which is using Pcd. Platform which
needs dynamic clocking needs implement PL011UartClockLib

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoBaseTools Script: Formalize source files to follow DOS format
Liming Gao [Fri, 8 Jun 2018 09:03:47 +0000 (17:03 +0800)]
BaseTools Script: Formalize source files to follow DOS format

V3:
support exclude dir and file by name while traversing the directory.
remove close in with statement.

V2:
add version,description,copyright.
add flag -v,-q,--append-extensions,--override-extensions,--debug.
-q will omit default output,-v and --debug are not implemented.
add default file extensions.
support input of file path.
support muliple input path.
simplify comment.
change 'pattern'.encode() to b'pattern',I think this will be better.
change naming of variable and function to keep the same with BinToPcd.py

V1:
FormatDosFiles.py is added to clean up dos source files. It bases on
the rules defined in EDKII C Coding Standards Specification.
5.1.2 Do not use tab characters
5.1.6 Only use CRLF (Carriage Return Line Feed) line endings.
5.1.7 All files must end with CRLF
No trailing white space in one line. (To be added in spec)

The source files in edk2 project with the below postfix are dos format.
.h .c .nasm .nasmb .asm .S .inf .dec .dsc .fdf .uni .asl .aslc .vfr .idf
.txt .bat .py

The package maintainer can use this script to clean up all files in his
package. The prefer way is to create one patch per one package.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Dongao Guo <dongao.guo@intel.com>
3 years agoMdeModulePkg/SdDxe: Demote DEBUG print to DEBUG_BLKIO
Hao Wu [Tue, 12 Jun 2018 02:20:43 +0000 (10:20 +0800)]
MdeModulePkg/SdDxe: Demote DEBUG print to DEBUG_BLKIO

Similar to commit 9dca2105ad960c9946d7cc2ece40f65e1999dac7, lower the
priority of the DEBUG print in SDReadWrite() to DEBUG_BLKIO.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg/NvmExpressDxe: Adjust R/W DEBUG prints to BLKIO level
Hao Wu [Tue, 12 Jun 2018 02:09:36 +0000 (10:09 +0800)]
MdeModulePkg/NvmExpressDxe: Adjust R/W DEBUG prints to BLKIO level

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=980

Adjust the DEBUG prints within function:
NvmeRead(), NvmeWrite(), AsyncNvmeRead() and AsyncNvmeWrite()

to DEBUG_BLKIO for the consistency with other storage device drivers
(e.g. ATA, USB and etc.).

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoBaseTools: Cleanup unneeded code
Jaben Carsey [Fri, 18 May 2018 00:06:52 +0000 (08:06 +0800)]
BaseTools: Cleanup unneeded code

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: refactor to remove functions
Jaben Carsey [Fri, 18 May 2018 00:06:51 +0000 (08:06 +0800)]
BaseTools: refactor to remove functions

refactoring almost identical functions to delete and use the other.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: Fix one bug of nest !include parser
Yunhua Feng [Fri, 8 Jun 2018 08:46:48 +0000 (16:46 +0800)]
BaseTools: Fix one bug of nest !include parser

The case is DSC file include file1, file1 include file2, after parse
file2 finished, DSC parser get the wrong section type, then it would
report invalid error.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Michael D Kinney <michael.d.kinney@intel.com>
3 years agoShellPkg/Dp: Make the help info align with code
Dandan Bi [Sat, 12 May 2018 13:00:23 +0000 (21:00 +0800)]
ShellPkg/Dp: Make the help info align with code

Currently in DP, the Trace mode is enabled by default.
And the profile mode is not implemented. but the help info
of DP tool doesn't match current implementation. Which will
make user confused. So now remove the unused source code
related to the profile mode and update the help information
of DP tool.

V2: Remove the unused code related to profile mode.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoShellPkg/Dp: Initialize summary date when run DP
Dandan Bi [Sat, 12 May 2018 12:57:36 +0000 (20:57 +0800)]
ShellPkg/Dp: Initialize summary date when run DP

Issue:
When run "dp -s" or ("dp -v") command in shell several times,
the summary reuslts are different each time.

The root cause is that the previous global data "SummaryData"
is not cleaned when the dp command is callled next time.
This patch initializes the global data "SummaryData"
when the dp dymanic command is called.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoShellPkg/Dp: make sure memory is freed before exit
Dandan Bi [Fri, 11 May 2018 06:02:08 +0000 (14:02 +0800)]
ShellPkg/Dp: make sure memory is freed before exit

Run dp command now:
Firstly it will get performance records from FPDT and then
parse the DP command. And if encounter invalid parameters,
it will exit directly. Thus the performance records got before
are invalid. And what's worse is that the memory allocated in
getting performance records phase is not freed.

This patch update the code to parse the command firstly and
then get the performance records. And make sure that all the
clean work has been done before exiting.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoBaseTools/tools_def IA32: disable PIE code generation explicitly
Ard Biesheuvel [Mon, 11 Jun 2018 07:34:52 +0000 (09:34 +0200)]
BaseTools/tools_def IA32: disable PIE code generation explicitly

As a security measure, some distros now build their GCC toolchains with
PIE code generation enabled by default, because it is a prerequisite
for ASLR to be enabled when running the executable.

This typically results in slightly larger code, but it also generates
ELF relocations that our tooling cannot deal with, so let's disable it
explicitly when using GCC49 or later for IA32. (Note that this does not
apply to X64: it uses PIE code deliberately in some cases, and our
tooling does deal with the resuling relocations)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg Variable: Use comparison logic to check UINTN parameter
Liming Gao [Mon, 28 May 2018 07:30:52 +0000 (15:30 +0800)]
MdeModulePkg Variable: Use comparison logic to check UINTN parameter

Commit 180ac200da84785989443b06bcfa5db343c0bf7e changes the input parameter
from BOOLEAN to UINTN. Its comparison logic should be updated.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoIntelFrameworkPkg UefiLib: Use comparison logic to check UINTN parameter
Liming Gao [Mon, 28 May 2018 07:30:51 +0000 (15:30 +0800)]
IntelFrameworkPkg UefiLib: Use comparison logic to check UINTN parameter

Commit cb96e7d4f7afdbaef0706f9251ae479639d85a28 changes the input parameter
from BOOLEAN to UINTN. Its comparison logic should be updated.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdePkg UefiLib: Use comparison logic to check UINTN parameter
Liming Gao [Mon, 28 May 2018 07:30:50 +0000 (15:30 +0800)]
MdePkg UefiLib: Use comparison logic to check UINTN parameter

Commit d2aafe1e410c80d1046f2d1e743055882ead8489 changes the input parameter
from BOOLEAN to UINTN. Its comparison logic should be updated.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoArmVirtPkg: switch to KVM safe IoLib implementation
Ard Biesheuvel [Sun, 10 Jun 2018 18:03:35 +0000 (20:03 +0200)]
ArmVirtPkg: switch to KVM safe IoLib implementation

Switch to the new IoLib implementation that will only use KVM
safe instructions to perform MMIO memory accesses.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
3 years agoMdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVM
Ard Biesheuvel [Thu, 7 Jun 2018 10:44:12 +0000 (12:44 +0200)]
MdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVM

KVM on ARM refuses to decode load/store instructions used to perform
I/O to emulated devices, and instead relies on the exception syndrome
information to describe the operand register, access size, etc.
This is only possible for instructions that have a single input/output
register (as opposed to ones that increment the offset register, or
load/store pair instructions, etc). Otherwise, QEMU crashes with the
following error

  error: kvm run failed Function not implemented
  R00=01010101 R01=00000008 R02=00000048 R03=08000820
  R04=00000120 R05=7faaa0e0 R06=7faaa0dc R07=7faaa0e8
  R08=7faaa0ec R09=7faaa088 R10=000000ff R11=00000080
  R12=ff000000 R13=7fccfe08 R14=7faa835f R15=7faa887c
  PSR=800001f3 N--- T svc32
  QEMU: Terminated

and KVM produces a warning such as the following in the kernel log

  kvm [17646]: load/store instruction decoding not implemented

The IoLib implementation provided by MdePkg/Library/BaseIoLibIntrinsic
is based on C code, and when LTO is in effect, the MMIO accesses could
be merged with, e.g., manipulations of the loop counter, producing
opcodes that KVM does not support for emulated MMIO.

So let's add a special ArmVirt flavor of this library that implements
that actual load/store operations in assembler, ensuring that the
instructions involved can be emulated by KVM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Remove dsc nested include checking.
Derek Lin [Wed, 9 May 2018 09:03:21 +0000 (17:03 +0800)]
BaseTools: Remove dsc nested include checking.

The dsc nested include checking make unexpected build error when
building project A and switch to project B.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Derek Lin <derek.lin2@hpe.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoArmPkg/CompilerIntrinsicsLib: fix GCC8 warning for __aeabi_memcpy aliases
Michael Zimmermann [Thu, 7 Jun 2018 05:47:20 +0000 (07:47 +0200)]
ArmPkg/CompilerIntrinsicsLib: fix GCC8 warning for __aeabi_memcpy aliases

This was the warning (shown for __aeabi_memcpy, __aeabi_memcpy4 and
__aeabi_memcpy8):

  ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c:42:6:
  error: '__aeabi_memcpy8' alias between functions of incompatible types
    'void(void*, const void *, size_t)'
      {aka 'void(void *, const void *, unsigned int)'}
    and 'void *(void *, const void *, size_t)'
      {aka 'void *(void *, const void *, unsigned int)'} [-Werror=attribute-alias]
  void __aeabi_memcpy8(void *dest, const void *src, size_t n);
  ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c:19:7: note: aliased declaration here
    void *__memcpy(void *dest, const void *src, size_t n)

The problem is the different return type (void vs void*). So reshuffle
the code so the prototypes match between the aliases.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
[ardb: change prototype of internal __memcpy() and drop extra wrapper]
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoMdeModulePkg/EmmcDxe: demote DEBUG print to DEBUG_BLKIO
Ard Biesheuvel [Thu, 7 Jun 2018 09:06:47 +0000 (11:06 +0200)]
MdeModulePkg/EmmcDxe: demote DEBUG print to DEBUG_BLKIO

Lower the priority of the DEBUG print in EmmcReadWrite(), which
is emitted for each read or write operation to the eMMC device,
which clutters up the log output of builds created with DEBUG_INFO
enabled.

Suggested-by: Pipat Methavanitpong <methavanitpong.pipat@socionext.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoCorebootModulePkg/CbSupportDxe: Remove SCI_EN setting
Benjamin You [Mon, 4 Jun 2018 03:23:21 +0000 (11:23 +0800)]
CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting

Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event.
However, this should not be done because this causes OS to skip triggering
FADT.SMI_CMD, which leads to the functions implemented in the SMI
handler being omitted.

This issue was identified by Matt Delco <delco@google.com>.

The fix does the following:
- The SCI_EN bit setting is removed from CbSupportDxe driver.
- Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to
  output some error message and ASSERT (FALSE) if ALL of the following
  conditions are met:
  1) HARDWARE_REDUCED_ACPI is not set;
  2) SMI_CMD field is zero;
  3) SCI_EN bit is zero;
  which indicates the ACPI enabling status is inconsistent: SCI is not
  enabled but the ACPI table does not provide a means to enable it through
  FADT->SMI_CMD. This may cause issues in OS.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Matt Delco <delco@google.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Matt Delco <delco@google.com>
3 years agoShellPkg/UefiShellAcpiViewCommandLib: Fix ECC issues
Dandan Bi [Tue, 5 Jun 2018 01:20:05 +0000 (09:20 +0800)]
ShellPkg/UefiShellAcpiViewCommandLib: Fix ECC issues

1. Separate variable definition and initialization.
2. Make the variable naming following Edk2 rule.

V2: Remove the updates of guard macros in header files.

Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Evan Lloyd <evan.lloyd@arm.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoShellPkg/UefiShellAcpiViewCommandLib: Fix ECC issues
Dandan Bi [Mon, 4 Jun 2018 01:14:51 +0000 (09:14 +0800)]
ShellPkg/UefiShellAcpiViewCommandLib: Fix ECC issues

Make the function comments follow EDK2 coding style.

Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Evan Lloyd <evan.lloyd@arm.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoBaseTools/UPT: Update the import statement to use StringUtils
Yonghong Zhu [Thu, 7 Jun 2018 05:06:44 +0000 (13:06 +0800)]
BaseTools/UPT: Update the import statement to use StringUtils

The patch 5a57246eab80 Rename String to StringUtils, but it didn't
update the UPT Tool for the import statement which cause UPT tool
break.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/Library/BaseSerialPortLib16550: Ensure FIFO Polled Mode
Leo Duran [Thu, 24 May 2018 19:07:30 +0000 (03:07 +0800)]
MdeModulePkg/Library/BaseSerialPortLib16550: Ensure FIFO Polled Mode

Put the UART in FIFO Polled Mode by clearing IER after setting FCR.
Also, add comments to show DLAB state for registers 0 and 1.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Cc: Star Zeng <star.zeng@intel.com>
CC: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoSignedCapsulePkg/SystemFirmwareUpdateDxe: Use progress API
Kinney, Michael D [Thu, 29 Mar 2018 15:35:07 +0000 (08:35 -0700)]
SignedCapsulePkg/SystemFirmwareUpdateDxe: Use progress API

https://bugzilla.tianocore.org/show_bug.cgi?id=801

Use PlatformFlashWriteWithProgress() instead of PlatformFLashWrite()
so the user can be informed of the progress as a capsule is used
to update a firmware image in a firmware device.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg/DxeCapsuleLibFmp: Add progress bar support
Kinney, Michael D [Thu, 15 Feb 2018 22:02:06 +0000 (14:02 -0800)]
MdeModulePkg/DxeCapsuleLibFmp: Add progress bar support

https://bugzilla.tianocore.org/show_bug.cgi?id=801

Based on content from the following branch/commits:
https://github.com/Microsoft/MS_UEFI/tree/share/MsCapsuleSupport

* Change Update_Image_Progress() to UpdateImageProcess()
* Call DisplayUpdateProgressLib from UpdateImageProgress().
* Split out a boot service and runtime version of
  UpdateImageProgress() so the DisplayUpdateProgressLib is
  not used at runtime.
* If gEdkiiFirmwareManagementProgressProtocolGuid is present,
  then use its progress bar color and watchdog timer value.
* If gEdkiiFirmwareManagementProgressProtocolGuid is not present,
  then use default progress bar color and 5 min watchdog timer.
* Remove Print() calls during capsule processing.  Instead,
  the DisplayUpdateProgressLib is used to inform the user
  of progress during a capsule update.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg/Ata/AtaAtapiPassThru: Enable/disable DEVSLP per policy
Ruiyu Ni [Tue, 29 May 2018 10:12:51 +0000 (18:12 +0800)]
MdeModulePkg/Ata/AtaAtapiPassThru: Enable/disable DEVSLP per policy

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg/AtaAtapiPassThru: enable/disable PUIS per policy
Ruiyu Ni [Tue, 29 May 2018 05:08:21 +0000 (13:08 +0800)]
MdeModulePkg/AtaAtapiPassThru: enable/disable PUIS per policy

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
3 years agoMdeModulePkg: Add AtaAtapiPolicy protocol definition
Ruiyu Ni [Tue, 29 May 2018 05:07:32 +0000 (13:07 +0800)]
MdeModulePkg: Add AtaAtapiPolicy protocol definition

The patch adds AtaAtapiPolicy protocol which is produced by platform
and consumed by AtaAtapiPassThruDxe driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg/AtaAtapiPassThru: Spin up Power up in Standby devices
Ruiyu Ni [Tue, 29 May 2018 02:51:25 +0000 (10:51 +0800)]
MdeModulePkg/AtaAtapiPassThru: Spin up Power up in Standby devices

The patch adds support to certain devices that support PUIS (Power
up in Standby).
For those devices that supports SET_FEATURE spin up, SW needs to
send SET_FEATURE subcommand to spin up the devices.
For those devices that doesn't support SET_FEATURE spin up, SW needs
to send read sectors command to spin up the devices.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
3 years agoBaseTools: Fix Section header size larger than elf file size bug
Yunhua Feng [Fri, 1 Jun 2018 09:21:02 +0000 (17:21 +0800)]
BaseTools: Fix Section header size larger than elf file size bug

Add the logic to handle the case that Section header size larger than
elf file size.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Check elf sections alignment with MAX_COFF_ALIGNMENT
Yunhua Feng [Mon, 4 Jun 2018 08:12:28 +0000 (16:12 +0800)]
BaseTools: Check elf sections alignment with MAX_COFF_ALIGNMENT

Add the logic to check whether mCoffAlignment is larger than
MAX_COFF_ALIGNMENT, and report error for it.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoCryptoPkg PeiCryptLib: Enable SHA384/512 support
Zhang, Chao B [Wed, 6 Jun 2018 03:25:32 +0000 (11:25 +0800)]
CryptoPkg PeiCryptLib: Enable SHA384/512 support

Enable SHA384/512 support in PEI phase.

Cc: Long Qin <qin.long@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Long Qin <qin.long@intel.com>
3 years agoUefiCpuPkg: Remove X86 ASM and S files
Liming Gao [Mon, 4 Jun 2018 05:36:40 +0000 (13:36 +0800)]
UefiCpuPkg: Remove X86 ASM and S files

NASM has replaced ASM and S files.
1. Remove ASM from all modules expect for the ones in ResetVector directory.
The ones in ResetVector directory are included by Vtf0.nasmb. They are
also nasm style.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
3 years agoSourceLevelDebugPkg: Remove X86 ASM and S files
Liming Gao [Mon, 4 Jun 2018 05:36:30 +0000 (13:36 +0800)]
SourceLevelDebugPkg: Remove X86 ASM and S files

NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoIntelFrameworkModulePkg: Remove X86 ASM and S files
Liming Gao [Mon, 4 Jun 2018 05:36:20 +0000 (13:36 +0800)]
IntelFrameworkModulePkg: Remove X86 ASM and S files

NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
3 years agoMdeModulePkg: Remove X86 ASM and S files
Liming Gao [Mon, 4 Jun 2018 05:35:58 +0000 (13:35 +0800)]
MdeModulePkg: Remove X86 ASM and S files

NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdePkg: Remove X86 ASM and S files
Liming Gao [Mon, 4 Jun 2018 05:26:22 +0000 (13:26 +0800)]
MdePkg: Remove X86 ASM and S files

NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
3 years agoArmPkg/ArmDisassemblerLib: fix check for MSR instruction
Michael Zimmermann [Thu, 7 Jun 2018 07:09:07 +0000 (09:09 +0200)]
ArmPkg/ArmDisassemblerLib: fix check for MSR instruction

GCC8 reported it with the following warning:
ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c: In function 'DisassembleArmInstruction':
ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c:397:30: error: bitwise
comparison always evaluates to false [-Werror=tautological-compare]
if ((OpCode  & 0x0db00000) == 0x03200000) {

This condition tries to be true for both the immediate and the register
version of the MSR instruction. They get identified inside the if-block
using the variable I, which contains the value of bit 25.

The problem with the comparison reported by GCC is that the
bitmask excludes bit 25, while the value requires it to be set to one:
0x0db00000: 0000 11011 0 11 00 00 0000 000000000000
0x03200000: 0000 00110 0 10 00 00 0000 000000000000
                   ^
So the solution is to just don't require that bit to be set, because
it gets checked later using 'I', which results in the following value:
0x01200000: 0000 00010 0 10 00 00 0000 000000000000

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoMdeModulePkg/DisplayUpdateProgressLib: Fix ECC issues
Dandan Bi [Tue, 5 Jun 2018 02:01:04 +0000 (10:01 +0800)]
MdeModulePkg/DisplayUpdateProgressLib: Fix ECC issues

Make the comment align with Edk2 coding style.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoBaseTools/VolInfo: Update EFI FV FILETYPES for new MM types.
Ezra Godfrey [Mon, 30 Apr 2018 14:33:31 +0000 (22:33 +0800)]
BaseTools/VolInfo: Update EFI FV FILETYPES for new MM types.

Add support for the following types to VolInfo:
  EFI_FV_FILETYPE_MM_STANDALONE
  EFI_FV_FILETYPE_MM_CORE_STANDALONE

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ezra Godfrey <egodfrey.qdt@qualcommdatacenter.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoBaseTools: Display both Hex and integer value format of PCD value
Yunhua Feng [Thu, 24 May 2018 02:25:21 +0000 (10:25 +0800)]
BaseTools: Display both Hex and integer value format of PCD value

If the PCD's datum type is UINT8, UINT16, UINT32 or UINT64, then in
the report will display both hexadecimal format and integer format
of PCD value.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: Sort PCD by token space first then by PcdCName
Yunhua Feng [Thu, 24 May 2018 03:25:21 +0000 (11:25 +0800)]
BaseTools: Sort PCD by token space first then by PcdCName

Sort PCD by token space first, then by PcdCName in the build report.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoIntelSiliconPkg IntelVTdDxe: Fix incorrect code to clear VTd error
Star Zeng [Tue, 5 Jun 2018 08:04:38 +0000 (16:04 +0800)]
IntelSiliconPkg IntelVTdDxe: Fix incorrect code to clear VTd error

According to VTd spec, Software writes the value read from this
field (F) to Clear it. But current code is using 0 to clear the
field, that is incorrect.

And R_FSTS_REG register value clearing should be not in the for loop.

Without this patch, we will see same VTd error message appears again
and again after it occurs first time.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoEmbeddedPkg/TimeBaseLib: Add function to get Week day.
Meenakshi Aggarwal [Mon, 4 Jun 2018 16:31:44 +0000 (22:01 +0530)]
EmbeddedPkg/TimeBaseLib: Add function to get Week day.

This patch add function EfiTimeToWday() which returns
day of the week.
It is needed by our upcoming patches in edk2-platforms.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
3 years agoArmPkg/PlatformBootManagerLib: load platform boot options
Haojian Zhuang [Mon, 23 Apr 2018 06:21:54 +0000 (14:21 +0800)]
ArmPkg/PlatformBootManagerLib: load platform boot options

Make platform driver to create predefined boot options and related
hot keys.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
3 years agoEmbeddedPkg: add platform boot manager protocol
Haojian Zhuang [Mon, 23 Apr 2018 06:21:53 +0000 (14:21 +0800)]
EmbeddedPkg: add platform boot manager protocol

Create the PlatformBootManagerProtocol that is used to add
predefined boot options in platform driver. This interface
will be used in ArmPkg/PlatformBootManagerLib.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>