mirror_edk2.git
4 years agoIntelFsp2Pkg: Remove CarBase and CarSize from FSP_GLOBAL_DATA
Satya Yarlagadda [Wed, 20 Jul 2016 06:49:15 +0000 (14:49 +0800)]
IntelFsp2Pkg: Remove CarBase and CarSize from FSP_GLOBAL_DATA

CarBase and CarSize in Fsp Global data structure are no longer needed as
Boot loader doesn't pass them to FSP even in case that BL chooses to skip calling
the FspTempRamInit API. In case of FspTempramInit is called, we can use the PCDs
to identify the CarBase and Size. Hence we remove the relevant code.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoFix IPv6 HTTPClient vendor class data
Michael Chang [Thu, 21 Jul 2016 01:58:44 +0000 (09:58 +0800)]
Fix IPv6 HTTPClient vendor class data

The size of the ClassIdentifier is apparently wrong in the structure. In my
testing it caused the vendor class data to be displayed as bogus
"HTTPClient:Arch00016x:UNDI00300". After correcting the size the vendor class
data is "HTTPClient:Arch00016:UNDI003000" which looks good to me.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Chang <mchang@suse.com>
Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
4 years agoSecurityPkg: AuthVariableLib: Revert UserPhysicalPresent feature from AuthVariableLib
Zhang, Chao B [Thu, 21 Jul 2016 06:59:54 +0000 (14:59 +0800)]
SecurityPkg: AuthVariableLib: Revert UserPhysicalPresent feature from AuthVariableLib

Physical Presence state reporting is constrained by physical presence caching in variable driver. For example, reporting must be prior to Physical Presence caching. Physical Presence state becomes constant rather than instant after caching. Therefore, PlatformSecureLib is responsible for reporting Physical Presence state in expected way.

This reverts commit 90fa53213ec458b5c4f8851c09aeb3de977531e5.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
4 years agoBaseTools/tools_def: switch GCC/X64 to the PIE small model
Ard Biesheuvel [Fri, 15 Jul 2016 22:16:11 +0000 (00:16 +0200)]
BaseTools/tools_def: switch GCC/X64 to the PIE small model

The ordinary small code model for x86_64 cannot be used in UEFI, since
it assumes the executable is loaded in the first 2 GB of memory.
Therefore, we use the large model instead, which can execute anywhere,
but uses absolute 64-bit wide quantities for all symbol references,
which is costly in terms of code size.

So switch to the PIE small code model, this uses 32-bit relative
references where possible, but does not make any assumptions about the
load address (i.e., all absolute symbol references are 64-bits wide).
Note that, due to the 'protected' visibility pragma introduced in an
earlier patch, there is no need for the EDK2 build system to deal with
GOT related ELF relocation types.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg X64: force 'protected' visibility when building with -fpic
Ard Biesheuvel [Fri, 15 Jul 2016 22:16:10 +0000 (00:16 +0200)]
MdePkg X64: force 'protected' visibility when building with -fpic

When building position independent (PIC) ELF objects, the GCC compiler
assumes that each symbol with external linkage may potentially end up
being exported from a shared library, which means that each of those
symbols may be subject to symbol preemption, i.e., the executable
linking to the shared library at runtime may override symbols exported
by the shared library, and every internal reference held by the shared
library itself *must* be made to point to the overridden version instead.

For this reason, PIC code symbol references always go via the Global
Offset Table (GOT), even if the code in question references symbols that
are defined in the same compilation unit. The GOT refers to each symbol
by absolute address, and so each entry is subject to runtime relocation.

Since not every symbol with external linkage is ultimately exported from
a shared library, the GCC compiler allows control over symbol visibility
using attributes, command line arguments and pragmas, where 'protected'
means that the symbol is only referenced by the shared library itself.
Due to the poor hygiene in EDK2 regarding the use of the 'static'
modifier, many symbols that are local to their compilation unit end up
being referenced indirectly via the GOT when building PIC code.

In UEFI, there are no shared libraries and so there is no need to deal
with symbol preemption, and we can mark every symbol reference protected.
The only method that applies to all symbol definitions as well as
declarations is the #pragma. So set the visibility 'protected' pragma when
building PIC code for X64 using GCC. Note that this affects code generated
with the -fpie compiler switch as well as the -fpic compiler switch.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg CryptoPkg EdkCompatibilityPkg: retire NO_BUILTIN_VA_FUNCS define
Ard Biesheuvel [Sun, 17 Jul 2016 10:12:16 +0000 (12:12 +0200)]
MdePkg CryptoPkg EdkCompatibilityPkg: retire NO_BUILTIN_VA_FUNCS define

This is never set anymore, so unsetting it or testing whether it is unset
no longer makes any sense.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoBaseTools/tools_def: enable Os optimization for GCC X64 builds
Ard Biesheuvel [Fri, 15 Jul 2016 22:16:09 +0000 (00:16 +0200)]
BaseTools/tools_def: enable Os optimization for GCC X64 builds

Now that we switched to the __builtin_ms_va_list VA_LIST type for
GCC/X64, we can trust the compiler to do the right thing even under
optimization, and so we can enable -Os optimization all the way back
to GCC44, and drop the -D define that prevents the use of the __builtin
VA_LIST types. Note that this requires the -maccumulate-outgoing-args
switch as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoEdkCompatibilityPkg: Enable new MS VA intrinsics for GNUC x86 64bits build
Ard Biesheuvel [Sun, 17 Jul 2016 10:11:32 +0000 (12:11 +0200)]
EdkCompatibilityPkg: Enable new MS VA intrinsics for GNUC x86 64bits build

Align EdkCompatibilityPkg with this change from MdePkg

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg: Enable new MS VA intrinsics for GNUC x86 64bits build
Shi, Steven [Fri, 15 Jul 2016 22:16:08 +0000 (00:16 +0200)]
MdePkg: Enable new MS VA intrinsics for GNUC x86 64bits build

Both GCC and LLVM 3.8 64bits support new variable argument (VA)
intrinsics for Microsoft ABI, enable these new VA intrinsics for
GNUC family 64bits code build. These VA intrinsics are only
permitted use in 64bits code, so not use them in 32bits code build.
The original 32bits GNU VA intrinsics has the same calling convention
as MS, so we don't need change them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
[ardb: update CPP logic so that the change only applies to X64]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoCryptoPkg: set new define to avoid MS ABI VA_LIST on GCC/X64
Ard Biesheuvel [Sun, 17 Jul 2016 09:57:45 +0000 (11:57 +0200)]
CryptoPkg: set new define to avoid MS ABI VA_LIST on GCC/X64

Set the #define NO_MSABI_VA_FUNCS that will be introduced in a subsequent
patch to avoid the use of the MS ABI in variadic functions. In EDK2, such
functions normally require the EFIAPI modifier to be used, but for external
libraries such as OpenSSL, which lack these annotations, it is easier to
simply revert to the default SysV style VA_LIST ABI.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdePkg: avoid __builtin_unreachable() on GCC v4.4
Ard Biesheuvel [Thu, 14 Jul 2016 12:10:14 +0000 (14:10 +0200)]
MdePkg: avoid __builtin_unreachable() on GCC v4.4

GCC v4.4 does not implement __builtin_unreachable(), so avoid using
it when building with this version or earlier.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: SMM_CPU_DATA_BLOCK is not cleared
Jeff Fan [Fri, 15 Jul 2016 06:24:28 +0000 (14:24 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: SMM_CPU_DATA_BLOCK is not cleared

The commit 8b9311 changed the zeroing of mSmmMpSyncData of type
SMM_DISPATCHER_MP_SYNC_DATA by the following patch.
 -    ZeroMem (mSmmMpSyncData, mSmmMpSyncDataSize);
 +    mSmmMpSyncData->SwitchBsp = FALSE;

mSmmMpSyncDataSize not only includes SMM_DISPATCHER_MP_SYNC_DATA, but
also includes the SMM_CPU_DATA_BLOCK array and one BOOLEAN variable
array as shown here:

  mSmmMpSyncDataSize = sizeof (SMM_DISPATCHER_MP_SYNC_DATA) +
       (sizeof (SMM_CPU_DATA_BLOCK) + sizeof (BOOLEAN)) *
       gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;

This patch restores the original ZeroMem() to clear all CPU Sync data.
The commit 8b9311 may cause unexpected behavior.

v2:
  Mentioned CandidateBsp array in comments to make it more accurate.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
4 years agoCryptoPkg/OpensslLib: Upgrade OpenSSL version to 1.0.2h
Qin Long [Wed, 13 Jul 2016 05:27:11 +0000 (13:27 +0800)]
CryptoPkg/OpensslLib: Upgrade OpenSSL version to 1.0.2h

OpenSSL 1.0.2h was released with several severity fixes at
03-May-2016 (https://www.openssl.org/news/secadv/20160503.txt).
Upgrade the supported OpenSSL version in CryptoPkg/OpensslLib to
catch the latest release 1.0.2h.

Cc: Ting Ye <ting.ye@intel.com>
Cc: David Woodhouse <David.Woodhouse@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qin Long <qin.long@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoMdeModulePkg RamDiskDxe: Not use hardcode 'SectionInstance' to locate SSDT
Hao Wu [Tue, 12 Jul 2016 12:10:42 +0000 (20:10 +0800)]
MdeModulePkg RamDiskDxe: Not use hardcode 'SectionInstance' to locate SSDT

This commit will scan all the EFI raw section instances within the
module's FV to make sure the NVDIMM root device SSDT can be properly
located.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Zhang Chao B <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoMdePkg BaseLib: Add the missing nasm source file InternalSwitchStack.nasm
Liming Gao [Thu, 14 Jul 2016 06:02:47 +0000 (14:02 +0800)]
MdePkg BaseLib: Add the missing nasm source file InternalSwitchStack.nasm

BaseLib Ia32 InternalSwitchStack.S has no matched InternalSwitchStack.nasm.
Use ObjDump to verify the output object files be same.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
4 years agoIntelFsp2Pkg: Add missing modules in Package DSC
Liming Gao [Fri, 8 Jul 2016 14:22:51 +0000 (22:22 +0800)]
IntelFsp2Pkg: Add missing modules in Package DSC

Package DSC is used to verify the module source build.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoIntelFsp2WrapperPkg: Add missing modules in Package DSC
Liming Gao [Fri, 8 Jul 2016 14:22:26 +0000 (22:22 +0800)]
IntelFsp2WrapperPkg: Add missing modules in Package DSC

Package DSC is used to verify the module source build.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoIntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample:Update code to pass build
Liming Gao [Mon, 11 Jul 2016 02:24:16 +0000 (10:24 +0800)]
IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample:Update code to pass build

1. Update its library class to PlatformSecLib
2. Update source code to refer to the matched header file

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoVlv2TbltDevicePkg/PlatformInitPei: Explicit call to dump MTRR Setting
Jeff Fan [Tue, 19 Jul 2016 00:50:08 +0000 (08:50 +0800)]
Vlv2TbltDevicePkg/PlatformInitPei: Explicit call to dump MTRR Setting

Mtrr library instance removed MtrrDebugPrintAllMtrrs() from MtrrSetAllMtrrs() to
make MP safe. We need to explicitly call MtrrDebugPrintAllMtrrs() to dump MTRR
setting.

CC: David Wei <david.wei@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
4 years agoUefiCpuPkg/CpuDxe: StartupAllAPs in parallel mode
Jeff Fan [Fri, 1 Jul 2016 07:52:40 +0000 (15:52 +0800)]
UefiCpuPkg/CpuDxe: StartupAllAPs in parallel mode

SetMemoryAttributes() will sync BSP's MTRRs settings to all APs by StartupAllAPs
service in serial mode. It may caused much performance impact if there are too
much processors in system. This update is to invoke StartupAllAps in parallel
mode. IA32 SDM does suggest to program MTRRs in parallel mode.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
4 years agoUefiCpuPkg/MtrrLib: Add notes for usage by BSP/APs
Jeff Fan [Tue, 19 Jul 2016 00:41:57 +0000 (08:41 +0800)]
UefiCpuPkg/MtrrLib: Add notes for usage by BSP/APs

Except for MtrrSetAllMtrrs(), others services are not suggested to be invoked by
APs because they are not necessary and may invoke DEBUG() to dump MTRR setting.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed: Laszlo Ersek <lersek@redhat.com>

4 years agoUefiCpuPkg/MtrrLib: Remove MTRRs display from MtrrSetAllMtrrs()
Jeff Fan [Tue, 12 Jul 2016 14:08:58 +0000 (22:08 +0800)]
UefiCpuPkg/MtrrLib: Remove MTRRs display from MtrrSetAllMtrrs()

MtrrSetAllMtrrs() maybe used by APs to sync BSP's MTRR settings. BSP's MTRR
setting should be displayed if EFI_D_CACHE flag is set when MTRR updated. In
MtrrSetAllMtrrs(), it's not necessary to display MTRR setting again due to the
MTRR settings should be always same among BSP/APs. This updating could avoid
APs output MTRR setting at the same time and make display message corrupted.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
4 years agoShellPkg: Fix echo to support displaying special characters
Ruiyu Ni [Mon, 18 Jul 2016 09:50:20 +0000 (17:50 +0800)]
ShellPkg: Fix echo to support displaying special characters

Run 'echo -t' without the patch will get the result:
  echo: Unknown flag - '-t'
  The expected result is to display '-t' literally.
  This patch adds special handle for 'echo'. 'echo' will not use the
  general parameter parsing library.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg: Add Shell[Get|Set]RawCmdLine to ShellCommandLib
Ruiyu Ni [Mon, 18 Jul 2016 09:46:59 +0000 (17:46 +0800)]
ShellPkg: Add Shell[Get|Set]RawCmdLine to ShellCommandLib

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg: Move FindFirstCharacter/GetNextParameter to ShellCommandLib
Ruiyu Ni [Mon, 18 Jul 2016 10:06:33 +0000 (18:06 +0800)]
ShellPkg: Move FindFirstCharacter/GetNextParameter to ShellCommandLib

And add Shell prefix to the two library APIs.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/ShellCommandLib.h: Formalize EOL
Ruiyu Ni [Mon, 18 Jul 2016 10:01:35 +0000 (18:01 +0800)]
ShellPkg/ShellCommandLib.h: Formalize EOL

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/UefiShellCommandLib.c: Formalize EOL
Ruiyu Ni [Mon, 18 Jul 2016 02:48:40 +0000 (10:48 +0800)]
ShellPkg/UefiShellCommandLib.c: Formalize EOL

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg: Fix VS2010/2012 build failure
Ruiyu Ni [Tue, 19 Jul 2016 02:26:19 +0000 (10:26 +0800)]
ShellPkg: Fix VS2010/2012 build failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
4 years agoOvmfPkg/PlatformPei: silence X64 VS2015x86 warning
Laszlo Ersek [Thu, 14 Jul 2016 15:59:44 +0000 (17:59 +0200)]
OvmfPkg/PlatformPei: silence X64 VS2015x86 warning

VS2015x86 reports the following warning for
"OvmfPkg/PlatformPei/MemDetect.c":

> MemDetect.c(357): error C2220: warning treated as error - no 'object'
>                   file generated
> MemDetect.c(357): warning C4244: '=': conversion from 'UINT64' to
>                   'UINT32', possible loss of data

LowerMemorySize is first assigned from GetSystemMemorySizeBelow4gb(),
which returns UINT32. Change the type of LowerMemorySize accordingly.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoOvmfPkg/PciHostBridgeLib: silence IA32 VS2015x86 warnings
Laszlo Ersek [Thu, 14 Jul 2016 15:34:38 +0000 (17:34 +0200)]
OvmfPkg/PciHostBridgeLib: silence IA32 VS2015x86 warnings

When compiling "OvmfPkg\Library\PciHostBridgeLib\XenSupport.c" for IA32,
the VS2015x86 compiler emits the following:

> XenSupport.c(41): error C2220: warning treated as error - no 'object'
>                                file generated
> XenSupport.c(41): warning C4244: 'function': conversion from 'UINT64' to
>                                  'UINTN', possible loss of data
> XenSupport.c(48): warning C4244: 'function': conversion from 'UINT64' to
>                                  'UINTN', possible loss of data
> XenSupport.c(49): warning C4244: 'function': conversion from 'UINT64' to
>                                  'UINTN', possible loss of data
> XenSupport.c(50): warning C4244: 'function': conversion from 'UINT64' to
>                                  'UINTN', possible loss of data
> XenSupport.c(222): warning C4244: 'function': conversion from 'UINT64'
>                                   to 'UINTN', possible loss of data
> XenSupport.c(241): warning C4244: 'function': conversion from 'UINT64'
>                                   to 'UINTN', possible loss of data

PciLib functions take UINTN addresses that were encoded with the
PCI_LIB_ADDRESS() macro. We carry addresses from the macro invocations to
the function calls in two UINT64 variables however. This loses no data,
but it alerts VS2015x86. Change the variable types to UINTN.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: remove superfluous ENDs from NASM source
Laszlo Ersek [Thu, 14 Jul 2016 14:36:37 +0000 (16:36 +0200)]
UefiCpuPkg/PiSmmCpuDxeSmm: remove superfluous ENDs from NASM source

Commits 28ee5816465b1 and 246cd9085f806 added these ENDs as part of the
manual conversion from *.asm files. However, the ENDs makes no sense for
NASM. Although they don't break the build, NASM complains about them:

  label alone on a line without a colon might be in error

(This NASM warning category dates back to NASM 0.95, commit
6768eb71d8deb.)

Remove the ENDs.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoBaseTools/tools_def.template: bump minimum required NASM versions
Laszlo Ersek [Thu, 14 Jul 2016 11:29:10 +0000 (13:29 +0200)]
BaseTools/tools_def.template: bump minimum required NASM versions

NASM had been unable to assemble segment register operations before the
following git commit:

  http://repo.or.cz/nasm.git/commitdiff/21d4ccc3c338

That commit was first released in NASM 2.10:

  http://repo.or.cz/nasm.git/commitdiff/ff62f33da0a2

This makes NASM 2.07 unusable for edk2 in general, because now we have a
lot of X64 assembly code that works with segment registers. For example
in:

  UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm

Bump the minimum required version to 2.10, for use with GCC toolchains.

Furthermore, list NASM 2.12.01 as a requirement for all other toolchains.
In particular, for source level debugging, VS20xx requires CodeView 8
debug symbols, and only NASM 2.12.01 and later produce those. (Suggested
by Liming, Mike, and Andrew.)

Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/14612
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoMdeModulePkg/PciHostBridgeDxe: fix Ia32 GCC44 build error
Laszlo Ersek [Thu, 14 Jul 2016 09:53:50 +0000 (11:53 +0200)]
MdeModulePkg/PciHostBridgeDxe: fix Ia32 GCC44 build error

> cc1: warnings being treated as errors
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c:
>   In function 'GetProposedResources':
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c:1388:
>   error: integer constant is too large for 'long' type

Append a ULL suffix to the replacement text of PCI_RESOURCE_LESS that is
aligned with the style of the EFI_RESOURCE_SATISFIED and
EFI_RESOURCE_NOT_SATISFIED macros.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoIntelFsp2Pkg BaseFspPlatformLib: Remove Boot Loader tempram Migration
Satya Yarlagadda [Wed, 13 Jul 2016 13:02:46 +0000 (21:02 +0800)]
IntelFsp2Pkg BaseFspPlatformLib: Remove Boot Loader tempram Migration

In FSP2.0, Boot loader should migrate its temp ram before
calling the tempramexit API to tear down the tempram. so, we don't need the
function to migrate the BL TempRam in the IntelFsp2Pkg.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoShellPkg/Ping6: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:43:47 +0000 (17:43 +0800)]
ShellPkg/Ping6: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Ifconfig6: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:41:19 +0000 (17:41 +0800)]
ShellPkg/Ifconfig6: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/UefiShellLib.c: Handle memory allocation failure
Ruiyu Ni [Thu, 14 Jul 2016 05:15:34 +0000 (13:15 +0800)]
ShellPkg/UefiShellLib.c: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/IfConfig: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:39:58 +0000 (17:39 +0800)]
ShellPkg/IfConfig: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/UefiShellLib: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:39:37 +0000 (17:39 +0800)]
ShellPkg/UefiShellLib: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Mv: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:38:51 +0000 (17:38 +0800)]
ShellPkg/Mv: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Cp: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:38:24 +0000 (17:38 +0800)]
ShellPkg/Cp: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Cd: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 09:38:05 +0000 (17:38 +0800)]
ShellPkg/Cd: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/If: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 07:47:16 +0000 (15:47 +0800)]
ShellPkg/If: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/For: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 07:45:08 +0000 (15:45 +0800)]
ShellPkg/For: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/DrvDiag: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 07:44:43 +0000 (15:44 +0800)]
ShellPkg/DrvDiag: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/DrvCfg: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 07:44:23 +0000 (15:44 +0800)]
ShellPkg/DrvCfg: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/DevTree: Handle memory allocation failure
Ruiyu Ni [Wed, 13 Jul 2016 07:43:55 +0000 (15:43 +0800)]
ShellPkg/DevTree: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Edit: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 10:13:41 +0000 (18:13 +0800)]
ShellPkg/Edit: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/LoadPciRom: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 10:06:58 +0000 (18:06 +0800)]
ShellPkg/LoadPciRom: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/EfiDecompress: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 10:00:01 +0000 (18:00 +0800)]
ShellPkg/EfiDecompress: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/EfiCompress: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 09:52:41 +0000 (17:52 +0800)]
ShellPkg/EfiCompress: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/DMem: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 09:39:43 +0000 (17:39 +0800)]
ShellPkg/DMem: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/UefiShellCommandLib.c: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 09:38:06 +0000 (17:38 +0800)]
ShellPkg/UefiShellCommandLib.c: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/ConsistMapping.c: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 07:01:17 +0000 (15:01 +0800)]
ShellPkg/ConsistMapping.c: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/UefiShellBcfgCommandLib: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 05:56:04 +0000 (13:56 +0800)]
ShellPkg/UefiShellBcfgCommandLib: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/UefiHandleParsingLib.c: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 05:51:54 +0000 (13:51 +0800)]
ShellPkg/UefiHandleParsingLib.c: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Dp: Handle memory allocation failure
Ruiyu Ni [Tue, 12 Jul 2016 05:42:59 +0000 (13:42 +0800)]
ShellPkg/Dp: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/ShellProtocol.c: Handle memory allocation failure
Ruiyu Ni [Thu, 14 Jul 2016 07:04:38 +0000 (15:04 +0800)]
ShellPkg/ShellProtocol.c: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/ShellAddEnvVarToList: Handle memory allocation failure
Ruiyu Ni [Mon, 11 Jul 2016 05:56:49 +0000 (13:56 +0800)]
ShellPkg/ShellAddEnvVarToList: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/IsVolatileEnv: Handle memory allocation failure
Ruiyu Ni [Fri, 8 Jul 2016 07:18:14 +0000 (15:18 +0800)]
ShellPkg/IsVolatileEnv: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoShellPkg/Shell.c: Handle memory allocation failure
Ruiyu Ni [Fri, 8 Jul 2016 06:47:48 +0000 (14:47 +0800)]
ShellPkg/Shell.c: Handle memory allocation failure

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
4 years agoMdeModulePkg: Fix bug in TCP which not sending out ACK in certain circumstance.
Fu Siyuan [Tue, 12 Jul 2016 01:47:58 +0000 (09:47 +0800)]
MdeModulePkg: Fix bug in TCP which not sending out ACK in certain circumstance.

Consider the situation as shown in below chart. The last ACK message has
acknowledged the Tcb->RcvWl2, and all the segments until Tcb->RcvNxt have
been received by TCP driver. The Tcb->RcvNxt is not acknowledged due to the
delayed ACK. In this case an incoming segment (Seg->Seq, Seg->End) should
not be accepted by TCP driver, and an immediate ACK is required.

Current TcpSeqAcceptable() thought it’s an acceptable segment incorrectly, it
continues the TcpInput() process instead of sending out an ACK and droping the
segment immediately.

Tcb->RcvWl2                       Tcb->RcvNxt        Tcb->RcvWl2 + Tcb->RcvWnd
        Seg->Seq       Seg->End         |                          |
    |     |               |             |                          |
 ---+-----+---------------+-------------+--------------------------+-----------
           <income segment>             <----Acceptable Range--- -->

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Eugene Cohen <eugene@hp.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-By: Ye Ting <ting.ye@intel.com>
4 years agoNetworkPkg: Fix bug in TCP which not sending out ACK in certain circumstance.
Fu Siyuan [Fri, 8 Jul 2016 03:59:13 +0000 (11:59 +0800)]
NetworkPkg: Fix bug in TCP which not sending out ACK in certain circumstance.

Consider the situation as shown in below chart. The last ACK message has
acknowledged the Tcb->RcvWl2, and all the segments until Tcb->RcvNxt have
been received by TCP driver. The Tcb->RcvNxt is not acknowledged due to the
delayed ACK. In this case an incoming segment (Seg->Seq, Seg->End) should
not be accepted by TCP driver, and an immediate ACK is required.

Current TcpSeqAcceptable() thought it’s an acceptable segment incorrectly, it
continues the TcpInput() process instead of sending out an ACK and droping the
segment immediately.

Tcb->RcvWl2                       Tcb->RcvNxt        Tcb->RcvWl2 + Tcb->RcvWnd
        Seg->Seq       Seg->End         |                          |
    |     |               |             |                          |
 ---+-----+---------------+-------------+--------------------------+-----------
           <income segment>             <----Acceptable Range--- -->

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Eugene Cohen <eugene@hp.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-By: Ye Ting <ting.ye@intel.com>
4 years agoBaseTools: Fix a bug for FixedPcd value generation in AutoGen file
Yonghong Zhu [Wed, 13 Jul 2016 09:00:03 +0000 (17:00 +0800)]
BaseTools: Fix a bug for FixedPcd value generation in AutoGen file

If the library is listed in [Components] section for build only, its
used FixedPcd Value is not generated into AutoGen code. This patch
cover this case to generate the FixedPcd Value in AutoGen file.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
4 years agoShellPkg: Fix issue about Ifconfig6 -r command.
Zhang Lubo [Thu, 14 Jul 2016 02:31:44 +0000 (10:31 +0800)]
ShellPkg: Fix issue about Ifconfig6 -r command.

Follow the Shell Spec, when the interface name is Specified,
we need to refresh the Ipv6 configuration.

Cc: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
Reviewed-by: Sriram Subramanian <sriram-s@hpe.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
4 years agoOvmfPkg/PlatformPei: program MSR_IA32_FEATURE_CONTROL from fw_cfg
Laszlo Ersek [Thu, 7 Jul 2016 13:02:11 +0000 (15:02 +0200)]
OvmfPkg/PlatformPei: program MSR_IA32_FEATURE_CONTROL from fw_cfg

Under certain circumstances, QEMU exposes the "etc/msr_feature_control"
fw_cfg file, with a 64-bit little endian value. The firmware is supposed
to write this value to MSR_IA32_FEATURE_CONTROL (0x3a), on all processors,
on the normal and the S3 resume boot paths.

Utilize EFI_PEI_MPSERVICES_PPI to implement this feature.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Fixes: https://github.com/tianocore/edk2/issues/97
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
4 years agoOvmfPkg: include UefiCpuPkg/CpuMpPei
Laszlo Ersek [Wed, 6 Jul 2016 16:09:16 +0000 (18:09 +0200)]
OvmfPkg: include UefiCpuPkg/CpuMpPei

In the next patch we're going to put EFI_PEI_MP_SERVICES_PPI to use.

CpuMpPei uses the following PCDs from gUefiCpuPkgTokenSpaceGuid, beyond
those already used by CpuDxe:

- PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize: these
  control whether CpuMpPei performs microcode update. If the region size
  is zero, then the microcode update is skipped. UefiCpuPkg.dec sets the
  region size to zero by default, which is appropriate for OVMF.

- PcdCpuApLoopMode and PcdCpuApTargetCstate: the former controls how
  CpuMpPei puts the APs to sleep: 1 -- HLT, 2 -- MWAIT, 3 -- busy wait
  (with PAUSE). The latter PCD is only relevant if the former PCD is 2
  (MWAIT). In order to be consistent with SeaBIOS and with CpuDxe itself,
  we choose HLT. That's the default set by UefiCpuPkg.dec.

Furthermore, although CpuMpPei could consume SecPeiCpuExceptionHandlerLib
technically, it is supposed to consume PeiCpuExceptionHandlerLib. See:

- http://thread.gmane.org/gmane.comp.bios.edk2.devel/12703

- git commit a81abf161666 ("UefiCpuPkg/ExceptionLib: Import
  PeiCpuExceptionHandlerLib module"), part of the series linked above.

Jeff recommended to resolve CpuExceptionHandlerLib to
PeiCpuExceptionHandlerLib for all PEIMs:

- http://thread.gmane.org/gmane.comp.bios.edk2.devel/14471/focus=14477

Since at the moment we have no resolution in place that would cover this
for PEIMs (from either [LibraryClasses] or [LibraryClasses.common.PEIM]),
it's easy to do.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
4 years agoOvmfPkg: remove PcdS3AcpiReservedMemoryBase, PcdS3AcpiReservedMemorySize
Laszlo Ersek [Tue, 12 Jul 2016 20:23:32 +0000 (22:23 +0200)]
OvmfPkg: remove PcdS3AcpiReservedMemoryBase, PcdS3AcpiReservedMemorySize

No module in OvmfPkg uses these PCDs any longer.

The first PCD mentioned is declared by OvmfPkg, so we can remove even the
declaration.

The second PCD comes from IntelFrameworkModulePkg. The module that
consumes PcdS3AcpiReservedMemorySize is called
"IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe", and it is built
into OVMF. However, AcpiS3SaveDxe consumes the PCD only conditionally: it
depends on the feature PCD called PcdFrameworkCompatibilitySupport, which
we never enable in OVMF.

The 32KB gap that used to be the S3 permanent PEI memory is left unused in
MEMFD for now; it never hurts to have a few KB available there, for future
features.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
4 years agoOvmfPkg/PlatformPei: rebase and resize the permanent PEI memory for S3
Laszlo Ersek [Tue, 12 Jul 2016 22:52:54 +0000 (00:52 +0200)]
OvmfPkg/PlatformPei: rebase and resize the permanent PEI memory for S3

Move the permanent PEI memory for the S3 resume boot path to the top of
the low RAM (just below TSEG if the SMM driver stack is included in the
build). The new size is derived from CpuMpPei's approximate memory demand.

Save the base address and the size in new global variables, regardless of
the boot path. On the normal boot path, use these variables for covering
the area with EfiACPIMemoryNVS type memory.

PcdS3AcpiReservedMemoryBase and PcdS3AcpiReservedMemorySize become unused
in PlatformPei; remove them.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
4 years agoOvmfPkg/PlatformPei: create one memory HOB at S3 resume too, for CpuMpPei
Laszlo Ersek [Thu, 7 Jul 2016 07:29:12 +0000 (09:29 +0200)]
OvmfPkg/PlatformPei: create one memory HOB at S3 resume too, for CpuMpPei

CpuMpPei will have to place the AP startup vector in memory under 1MB. For
this, CpuMpPei borrows memory under 1MB, but it needs a memory resource
descriptor HOB to exist there even on the S3 resume path (see the
GetWakeupBuffer() function). Produce such a HOB as an exception on the S3
resume path.

CpuMpPei is going be dispatched no earlier than PlatformPei, because
CpuMpPei has a depex on gEfiPeiMemoryDiscoveredPpiGuid, and PlatformPei
calls PublishSystemMemory().

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Clean up CheckFeatureSupported()
Jeff Fan [Sat, 2 Jul 2016 04:01:02 +0000 (12:01 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Clean up CheckFeatureSupported()

Removed EFIAPI and parameter from CheckFeatureSupported() and removed
CheckProcessorFeature() totally.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Check XD/BTS features in SMM relocation
Jeff Fan [Sat, 2 Jul 2016 03:55:58 +0000 (11:55 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Check XD/BTS features in SMM relocation

CheckProcessorFeature() invokes MpService->StartupAllAps() to detect
XD/BTS features on normal boot path. It's not necessary and may cause
performance impact, because INIT-SIPI-SIPI must be sent to APs if APs
are in hlt-loop mode. XD/BTS feature detection is moved to
SmmInitHandler() in SMM relocation during normal boot path.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Add SMM S3 boot flag
Jeff Fan [Sat, 2 Jul 2016 03:08:04 +0000 (11:08 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Add SMM S3 boot flag

It will be set to TRUE during S3 resume.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Add MemoryMapped in SetProcessorRegister()
Jeff Fan [Wed, 29 Jun 2016 01:00:13 +0000 (09:00 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Add MemoryMapped in SetProcessorRegister()

REGISTER_TYPE in UefiCpuPkg/Include/AcpiCpuData.h defines a MemoryMapped
enum value.  However support for the MemoryMapped enum is missing from
the implementation of SetProcessorRegister().  This patch adds support
for MemoryMapped type SetProcessorRegister().

One spin lock is added to avoid potential conflict when multiple processor
update the same memory space.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoUefiCpuPkg/PiSmmCpuDxeSmm: Remove duplicate aligned buffer on S3 path
Jeff Fan [Mon, 27 Jun 2016 07:41:50 +0000 (15:41 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Remove duplicate aligned buffer on S3 path

InitializeMpSyncData() invokes InitializeSmmCpuSemaphores() to allocate an
aligned buffer for all locks and semaphores. However, this function is
invoked on S3 resume path again to reset mSmmMpSyncData. It causes
an additional aligned buffer to be allocated.

This update moves InitializeSmmCpuSemaphores() into
InitializeMpServiceData() that is only invoked on normal boot.
InitializeMpSyncData() is updated to reset the locks/semaphore in
mSmmMpSyncData.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
4 years agoArmPlatformPkg/ArmJuno: Correct AXI->PCIe translation comments
Jeremy Linton [Thu, 14 Jul 2016 13:58:30 +0000 (08:58 -0500)]
ArmPlatformPkg/ArmJuno: Correct AXI->PCIe translation comments

The AXI<->PCIe translation comments are out of date with
respect to the code. In the first case the AXI master port
is incorrectly called a slave. In the second case the the
translation direction indicated for the slave port is the
wrong direction.

Correct both of these comments to reflect what the code is
doing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
4 years agoArmPlatformPkg/ArmJuno: fix Juno PIO host bridge mapping
Jeremy Linton [Thu, 14 Jul 2016 13:58:29 +0000 (08:58 -0500)]
ArmPlatformPkg/ArmJuno: fix Juno PIO host bridge mapping

The Juno PIO mapping is 8M, so it should be using a 32-bit
PIO address translation. Further, PIO addresses should start
at 0 and be translated to/from the ARM MMIO region.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
4 years agoSecurityPkg DxeTpmMeasureBootLib: Add comments in TcgMeasurePeImage()
Liming Gao [Wed, 13 Jul 2016 12:28:19 +0000 (20:28 +0800)]
SecurityPkg DxeTpmMeasureBootLib: Add comments in TcgMeasurePeImage()

The input PeImage in TcgMeasurePeImage() has been checked.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoSecurityPkg DxeImageVerificationLib: Add comments in HashPeImage()
Liming Gao [Wed, 13 Jul 2016 12:28:18 +0000 (20:28 +0800)]
SecurityPkg DxeImageVerificationLib: Add comments in HashPeImage()

The input PeImage in HashPeImage() has been checked.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoSecurityPkg Tcg2Dxe: Add check for the PE/COFF image
Liming Gao [Wed, 13 Jul 2016 12:28:17 +0000 (20:28 +0800)]
SecurityPkg Tcg2Dxe: Add check for the PE/COFF image

Use BasePeCoffLib PeCoffLoaderGetImageInfo() to check the PE/COFF image.

In V2, add specific ImageRead() to make sure the PE/COFF image content
read is within the image buffer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoSecurityPkg TrEEDxe: Add check for the PE/COFF image.
Liming Gao [Wed, 13 Jul 2016 12:28:16 +0000 (20:28 +0800)]
SecurityPkg TrEEDxe: Add check for the PE/COFF image.

Use BasePeCoffLib PeCoffLoaderGetImageInfo() to check the PE/COFF image.

In V2, add specific ImageRead() to make sure the PE/COFF image content
read is within the image buffer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoSecurityPkg SecureBootConfigDxe: Add check for the external PE/COFF image.
Liming Gao [Wed, 13 Jul 2016 12:28:15 +0000 (20:28 +0800)]
SecurityPkg SecureBootConfigDxe: Add check for the external PE/COFF image.

Use BasePeCoffLib PeCoffLoaderGetImageInfo() to check the PE/COFF image.

In V2, add specific ImageRead() to make sure the PE/COFF image content
read is within the image buffer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
4 years agoIntelFsp2WrapperPkg: Remove unused header files from Fspm and Fsps WrapperPeim
Liming Gao [Thu, 14 Jul 2016 02:16:29 +0000 (10:16 +0800)]
IntelFsp2WrapperPkg: Remove unused header files from Fspm and Fsps WrapperPeim

PlatformSecLib.h is not used and removed.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoMdePkg/BaseSynchronizationLib: spin lock alignment is 32 at least
Jeff Fan [Tue, 12 Jul 2016 03:10:27 +0000 (11:10 +0800)]
MdePkg/BaseSynchronizationLib: spin lock alignment is 32 at least

Some processor may return small cache line size, we should return 32 bytes at
least for spin lock alignment.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
4 years agoUefiCpuPkg/CpuMpPei: Remove PmodeOffset and LmodeOffset
Jeff Fan [Tue, 12 Jul 2016 00:49:33 +0000 (08:49 +0800)]
UefiCpuPkg/CpuMpPei: Remove PmodeOffset and LmodeOffset

Remove Pmode(Entry)Offset/Lmode(Entry)Offset and use unified Mode(Entry)Offset
to clean up the definition of MP_ASSEMBLY_ADDRESS_MAP and MP_CPU_EXCHANGE_INFO.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei: Remove un-used variables and functions
Jeff Fan [Mon, 11 Jul 2016 11:52:00 +0000 (19:52 +0800)]
UefiCpuPkg/CpuMpPei: Remove un-used variables and functions

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei: Do not load new GDT table
Jeff Fan [Mon, 11 Jul 2016 11:46:36 +0000 (19:46 +0800)]
UefiCpuPkg/CpuMpPei: Do not load new GDT table

Do not load the new GDT table and just to use the exiting BSP's GDT table set up
by SEC phase.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei/X64: Use CodeSegment and DataSegment fields
Jeff Fan [Mon, 11 Jul 2016 11:40:05 +0000 (19:40 +0800)]
UefiCpuPkg/CpuMpPei/X64: Use CodeSegment and DataSegment fields

Using CodeSegment and DataSegment fields in ExchangeInfo instead of the hardcode
MACROs for x64 arch. Switch AP from real mode to long mode directly, so needn't
the CS/DS of protected mode.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei/X64: Remove hard code CPU BIST value
Jeff Fan [Mon, 11 Jul 2016 06:35:26 +0000 (14:35 +0800)]
UefiCpuPkg/CpuMpPei/X64: Remove hard code CPU BIST value

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei/Ia32: Use CodeSegment and DataSegment fields
Jeff Fan [Mon, 11 Jul 2016 05:21:10 +0000 (13:21 +0800)]
UefiCpuPkg/CpuMpPei/Ia32: Use CodeSegment and DataSegment fields

Using CodeSegment and DataSegment fields in ExchangeInfo instead of the hardcode
MACROs.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei: Add CodeSegment and DataSegment fields
Jeff Fan [Mon, 11 Jul 2016 05:08:06 +0000 (13:08 +0800)]
UefiCpuPkg/CpuMpPei: Add CodeSegment and DataSegment fields

Added CodeSegment and DataSegment fields in MP_CPU_EXCHANGE_INFO. They are set
to the values of current BSP's CS and DS.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoBaseTools: Update the FV region name as upper letter
Yonghong Zhu [Mon, 11 Jul 2016 07:52:09 +0000 (15:52 +0800)]
BaseTools: Update the FV region name as upper letter

Since in the GenFds phase, the FV is generated as upper letter. This
patch update the FV region name as upper letter, it can fix the build
report generate failure on case sensitive file system.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
4 years agoArmVirtPkg/PlatformBootManagerLib: remove stale FvFile boot options
Laszlo Ersek [Wed, 13 Jul 2016 15:40:15 +0000 (17:40 +0200)]
ArmVirtPkg/PlatformBootManagerLib: remove stale FvFile boot options

(This patch ports OvmfPkg commit 2eb358986052 to ArmVirtPkg. That
functionality was not added to QemuBootOrderLib, because it was (and is)
independent from QEMU and fw_cfg.)

Remove any boot options that point to binaries built into the firmware and
have become stale due to any of the following:
- FvMain's base address or size changed (historical -- see commit
  e191a3114f4c),
- FvMain's FvNameGuid changed,
- the FILE_GUID of the pointed-to binary changed,
- the referenced binary is no longer built into the firmware.

For example, multiple such "EFI Internal Shell" boot options can coexist.
They technically differ from each other, but may not describe any built-in
shell binary exactly. Such options can accumulate in a varstore over time,
and while they remain generally bootable (thanks to the efforts of
BmGetFileBufferByFvFilePath()), they look bad.

Filter out any stale options.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Fixes: https://github.com/tianocore/edk2/issues/107
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
4 years agoOvmfPkg/PlatformPei: add missing auto variable initialization
Ard Biesheuvel [Wed, 13 Jul 2016 14:50:35 +0000 (16:50 +0200)]
OvmfPkg/PlatformPei: add missing auto variable initialization

The E820EntriesCount variable in XenPublishRamRegions() may be
referenced without being initialized on RELEASE builds, since the
ASSERT that fires if the call to XenGetE820Map() fails is compiled
out in that case. So initialize it to 0.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
4 years agoArmPkg/ArmGicLib: manage GICv3 SPI state at the distributor
Ard Biesheuvel [Thu, 7 Jul 2016 17:18:39 +0000 (19:18 +0200)]
ArmPkg/ArmGicLib: manage GICv3 SPI state at the distributor

Unlike SGIs and PPIs, which are private to the CPU and are managed at
the redistributor level (which is also a per-CPU construct), shared
interrupts (SPIs) are shared between all CPUs, and therefore managed at
the distributor level (just as on GICv2).

Reported-by: Narinder Dhillon <ndhillonv2@gmail.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
4 years agoArmPkg/ArmMmuLib: avoid type promotion in TCR_EL1 assignment
Ard Biesheuvel [Wed, 13 Jul 2016 07:06:49 +0000 (09:06 +0200)]
ArmPkg/ArmMmuLib: avoid type promotion in TCR_EL1 assignment

Commit fafb7e9c110e ("ArmPkg: correct TTBR1_EL1 settings in TCR_EL1")
introduced a symbolic constant TCR_TG1_4KB which resolves to (2 << 30),
and ORs it into the value to be written into TCR_EL1 (if executing at
EL1). Since the constant is implicitly typed as signed int, and has the
sign bit set, the promotion that occurs when casting to UINT64 results
in a TCR value that has bits [63:32] all set, which includes mostly
RES0 bits but also the TBIn, AS and IPS fields.

So explicitly redefine all TCR related constants as 'unsigned long'
types, using the UL suffix. To avoid confusion in the future, the
inappropriately named VTCR_EL23_xxx constants have the leading V
removed, and the actual VTCR_EL2 related constants are dropped, given
that we never configure stage 2 translation in UEFI.

Reported-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
4 years agoUefiCpuPkg/CpuMpPei: Remove unnecessary variable
Jeff Fan [Fri, 1 Jul 2016 06:27:26 +0000 (14:27 +0800)]
UefiCpuPkg/CpuMpPei: Remove unnecessary variable

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei: Dump message if microcode signature not matched
Jeff Fan [Fri, 1 Jul 2016 06:52:12 +0000 (14:52 +0800)]
UefiCpuPkg/CpuMpPei: Dump message if microcode signature not matched

Verification microcode signature is one enhancement and not one requirement from
IA32 SDM. This update is just to dump debug message instead of ASSERT() if the
updated microcode signature does not match the loaded microcode signature.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoUefiCpuPkg/CpuMpPei: Skip microcode check/load if it has been loaded
Jeff Fan [Fri, 1 Jul 2016 06:51:10 +0000 (14:51 +0800)]
UefiCpuPkg/CpuMpPei: Skip microcode check/load if it has been loaded

Actually, there is only one microcode region in platform. If microcode has been
loaded, its signature will not be zero and should be loaded successfully.
We needn't to check microcode region and load microcode again. This update is to
skip checking/loading microcode if current microcode signature is not zero.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
4 years agoOvmfPkg: add PciHotPlugInitDxe
Laszlo Ersek [Thu, 30 Jun 2016 18:16:06 +0000 (20:16 +0200)]
OvmfPkg: add PciHotPlugInitDxe

After IncompatiblePciDeviceSupportDxe, this is another small driver /
protocol implementation that tweaks the behavior of the PCI bus driver in
edk2.

The protocol is specified in the Platform Init Spec v1.4a, Volume 5,
Chapter 12.6 "PCI Hot Plug PCI Initialization Protocol". This
implementation steers the PCI bus driver to reserve the following
resources ("padding") for each PCI bus, in addition to the BARs of the
devices on that PCI bus:
- 2MB of 64-bit non-prefetchable MMIO aperture,
- 512B of IO port space.

The goal is to reserve room for devices hot-plugged at runtime even if the
bridge receiving the device is empty at boot time.

The 2MB MMIO size is inspired by SeaBIOS. The 512B IO port size is
actually only 1/8th of the PCI spec mandated reservation, but the
specified size of 4096 has proved wasteful (given the limited size of our
IO port space -- see commit bba734ab4c7c). Especially on Q35, where every
PCIe root port and downstream port qualifies as a separate bridge (capable
of accepting a single device).

Test results for this patch:
- regardless of our request for 64-bit MMIO reservation, it is downgraded
  to 32-bit,
- although we request 512B alignment for the IO port space reservation,
  the next upstream bridge rounds it up to 4096B.

Cc: "Johnson, Brian J." <bjohnson@sgi.com>
Cc: Alex Williamson <alex.williamson@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Suggested-by: Andrew Fish <afish@apple.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>