Gary Lin [Mon, 25 Jun 2018 10:31:36 +0000 (18:31 +0800)]
BaseTools: Replace StringIO.StringIO with io.BytesIO
Replace StringIO.StringIO with io.BytesIO to be compatible with python3.
This commit also removes "import StringIO" from those python scripts
that don't really use it.
Gary Lin [Mon, 25 Jun 2018 10:31:35 +0000 (18:31 +0800)]
BaseTools: Fix old python2 idioms
Based on "futurize -f lib2to3.fixes.fix_idioms"
* Change some type comparisons to isinstance() calls:
type(x) == T -> isinstance(x, T)
type(x) is T -> isinstance(x, T)
type(x) != T -> not isinstance(x, T)
type(x) is not T -> not isinstance(x, T)
Bug 973 just mentions UsbBusDxe, but UsbBusPei has similar issue.
HUB descriptor has variable length.
But the code uses stack (HubDescriptor in PeiDoHubConfig) with fixed
length sizeof(EFI_USB_HUB_DESCRIPTOR) to hold HUB descriptor data.
It uses hard code length value (12) for SuperSpeed path.
And it uses HubDesc->Length for none SuperSpeed path, then there will
be stack overflow when HubDesc->Length is greater than
sizeof(EFI_USB_HUB_DESCRIPTOR).
The patch updates the code to use a big enough buffer to hold the
descriptor data.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
HUB descriptor has variable length.
But the code uses stack (HubDesc in UsbHubInit) with fixed length
sizeof(EFI_USB_HUB_DESCRIPTOR) to hold HUB descriptor data.
It uses hard code length value (32 that is greater than
sizeof(EFI_USB_HUB_DESCRIPTOR)) for SuperSpeed path, then there will
be stack overflow when IOMMU is enabled because the Unmap operation
will copy the data from device buffer to host buffer.
And it uses HubDesc->Length for none SuperSpeed path, then there will
be stack overflow when HubDesc->Length is greater than
sizeof(EFI_USB_HUB_DESCRIPTOR).
The patch updates the code to use a big enough buffer to hold the
descriptor data.
The definition EFI_USB_SUPER_SPEED_HUB_DESCRIPTOR is wrong (HubDelay
field should be UINT16 type) and no code is using it, the patch
removes it.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Bi, Dandan [Fri, 22 Jun 2018 08:56:20 +0000 (16:56 +0800)]
ShellPkg/dp: Update dp tool to parse new Perf record
Since performance library instances have been updated
to create new FPDT records for new Perf macros.
So enhance dp tool to parse the new FPDT records.
Enhancement mainly includes:
1. parse the single records for PERF_EVENT macro
2. Parse the new added FPDT_DUAL_GUID_STRING_EVENT_RECORD
This commit adds the PEI BlockIo support for NVM Express devices.
The driver will consume the EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI for NVM
Express host controllers within the system. And then produces the
BlockIo(2) PPIs for each controller.
The implementation of this driver is currently based on the NVM Express 1.1
Specification, which is available at:
http://nvmexpress.org/resources/specifications/
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Chasel, Chiu [Fri, 22 Jun 2018 10:22:47 +0000 (18:22 +0800)]
IntelFsp2Pkg: SplitFspBin.py to support x64 drivers
FSP binary potentially can include X64 drivers to
simplify implementation or support new features so
update SplitFspBin.py to support x64 image headers.
Cc: Jiewen Yao <Jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Girish Pathak [Tue, 19 Jun 2018 13:53:53 +0000 (14:53 +0100)]
ArmPkg/ArmScmiDxe: Dynamically allocate buffer for protocol ids
Dynamically allocate the buffer to receive the SCMI protocol list.
This makes MAX_PROTOCOLS redundant, so it is removed.
It also fixes one minor code alignment issue and removes an unused
macro PROTOCOL_MASK.
Girish Pathak [Tue, 19 Jun 2018 13:53:52 +0000 (14:53 +0100)]
ArmPkg/ArmScmiDxe: Fix ASSERT error in SCMI DXE
This change fixes a bug in the SCMI DXE which is observed with the
upcoming release of the SCP firmware.
The PROTOCOL_ID_MASK (0xF) which is used to generate an index in
the ProtocolInitFxns is wrong because protocol ids can be
anywhere in 0x10 - 15 or 0x80 - FF range. This mask generates
the same index for two different protocols e.g. for protocol ids
0x10 and 0x90, which causes duplicate initialization of a protocol
resulting in a failure.
This change removes the use of PROTOCOL_ID_MASK and instead
uses a list of protocol ids and their initialization functions
to identify a supported protocol and initialize it.
Yunhua Feng [Sun, 17 Jun 2018 09:22:21 +0000 (17:22 +0800)]
BaseTools: introduce !error statement
The DSC and FDF file can use `!error` statement. The argument of this
statement is an error message, it causes build tool to stop at the
location where the statement is encountered and error message following
the `!error` statement is output as a message.
Ard Biesheuvel [Thu, 21 Jun 2018 07:17:52 +0000 (09:17 +0200)]
ArmPkg/ArmMmuLib ARM: assume page tables are in writeback cacheable memory
Given that these days, our ARM port only supports ARMv7 and later, we
can assume that the page table walker's memory accesses are cache
coherent, and so there is no need to perform cache maintenance. It
does require the page tables themselves to reside in memory mapped as
writeback cacheable so ASSERT() that this is the case.
Ard Biesheuvel [Wed, 20 Jun 2018 19:01:52 +0000 (21:01 +0200)]
ArmPkg/ArmMmuLib ARM: remove cache maintenance of block mapping contents
Peculiarly enough, the current page table manipulation code takes it
upon itself to write back and invalidate the memory contents covered
by page and section mappings when their memory attributes change. It
is not generally the case that data must be written back when such a
change occurs, even when switching from cacheable to non-cacheable
attributes, and in some cases, it is actually causing problems. (The
cache maintenance is also performed on the PCIe MMIO regions as they
get mapped by the PCI bus driver, and under virtualization, each
cache maintenance operation on an emulated MMIO region triggers a
round trip to the host and back)
Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Jian J Wang [Wed, 13 Jun 2018 03:05:44 +0000 (11:05 +0800)]
MdeModulePkg/Core: remove SMM check for Heap Guard feature detection
CpuDxe driver is updated to be able to access DXE page table in SMM mode,
which means Heap Guard can get correct memory paging attributes in what
environment. It's not necessary to exclude SMM from detecting Heap Guard
feature support.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Jian J Wang [Thu, 14 Jun 2018 01:51:34 +0000 (09:51 +0800)]
UefiCpuPkg/CpuDxe: allow accessing (DXE) page table in SMM mode
The MdePkg/Library/SmmMemoryAllocationLib, used only by DXE_SMM_DRIVER,
allows to free memory allocated in DXE (before EndOfDxe). This is done
by checking the memory range and calling gBS services to do real
operation if the memory to free is out of SMRAM. If some memory related
features, like Heap Guard, are enabled, gBS interface will turn to
EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes(), provided by
DXE driver UefiCpuPkg/CpuDxe, to change memory paging attributes. This
means we have part of DXE code running in SMM mode in certain
circumstances.
Because page table in SMM mode is different from DXE mode and CpuDxe
always uses current registers (CR0, CR3, etc.) to get memory paging
attributes, it cannot get the correct attributes of DXE memory in SMM
mode from SMM page table. This will cause incorrect memory manipulations,
like fail the releasing of Guard pages if Heap Guard is enabled.
The solution in this patch is to store the DXE page table information
(e.g. value of CR0, CR3 registers, etc.) in a global variable of CpuDxe
driver. If CpuDxe detects it's in SMM mode, it will use this global
variable to access page table instead of current processor registers.
This can avoid retrieving wrong DXE memory paging attributes and changing
SMM page table attributes unexpectedly.
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Eric Dong [Tue, 19 Jun 2018 05:15:39 +0000 (13:15 +0800)]
UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On AMD processors the second SendIpi in the SendInitSipiSipi and
SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
undesired side-effects during MP initialization.
This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
the second SendIpi and its associated MicroSecondDelay (200).
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran <leo.duran@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
MdePkg/IndustryStandard/Ipmi: Use union for bitmap fields
This commit enhances the bitmap fields defined in the IPMI header files,
union types will be used to provide the users with both the individual
bitmap access and the whole byte/word access.
Currently, DebugCommunicationLibUsb uses the hardcoded endpoints 0x82
and 0x01 to communicate with the EHCI Debug Device. These, however,
are not standardized and may vary across different hardware.
To solve this problem, the endpoints are retrieved from the
USB Device Descriptor directly.
V2:
- Store endpoint data in the USB Debug Port handle structure.
V3:
- Remove the static endpoint PCDs as requested.
Marvin Haeuser [Sat, 16 Jun 2018 16:15:35 +0000 (00:15 +0800)]
BaseTools/WorkspaceCommon: Import used BuildToolError messages.
Commit c14b58614ffb992dfc668966a19becb86614aafc added a few build
error message display calls to WorkspaceCommon.py without importing
the message resources explicitely. This commit adds imports the
missing directives.
Ard Biesheuvel [Mon, 18 Jun 2018 20:46:36 +0000 (22:46 +0200)]
EmbeddedPkg/GdbSerialLib: avoid left shift of negative quantity
Clang complains about left shifting a negative value being undefined.
EmbeddedPkg/Library/GdbSerialLib/GdbSerialLib.c:151:30:
error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value]
OutputData = (UINT8)((~DLAB<<7)|((BreakSet<<6)|((Parity<<3)|((StopBits<<2)| Data))));
Redefine all bit pattern constants as unsigned to work around this.
Ard Biesheuvel [Mon, 18 Jun 2018 18:13:47 +0000 (20:13 +0200)]
ArmPkg/ArmMtlLib: fix prototype inconsistency in MtlWaitUntilChannelFree
Align the prototype of ArmMtlLib's MtlWaitUntilChannelFree () with the
one in the ArmMtlNullLib implementation (rather than the other way around,
since edk2-platforms has a conflicting implementation as well)
Create the missing NOOPT target for CLANG35 (which is ARM and AARCH64
only), and align it with the other toolchains: NOOPT has optimizations
disabled entirely (for source level debugging), and DEBUG is changed
from -O0 to -O1, as is the case for CLANG38 as well.
Ard Biesheuvel [Mon, 18 Jun 2018 08:23:49 +0000 (10:23 +0200)]
BaseTools/tools_def IA32: drop -no-pie linker option for GCC49
As reported by Liming, GCC 4.9.2 does not support the -no-pie
linker option that we added to the GCC49 and GCC5 toolchain
profiles in commit c25d3905523a ("BaseTools/tools_def IA32:
disable PIE code generation explicitly") to work around issues
with recent distro toolchains that enable PIE code generation
by default.
So rollback the changes for GCC49 but preserve them for GCC5
Ard Biesheuvel [Wed, 6 Jun 2018 12:32:42 +0000 (14:32 +0200)]
ArmPkg/ArmSmcPsciResetSystemLib: implement fallback for warm reboot
Implement ResetSystemLib's EnterS3WithImmediateWake() routine using
a jump back to the PEI entry point with interrupts and MMU+caches
disabled. This is only possible at boot time, when we are sure that
the current CPU is the only one up and running. Also, it depends on
the platform whether the PEI code is preserved in memory (it may be
copied to DRAM rather than execute in place), so also add a feature
PCD to selectively enable this feature.
Ard Biesheuvel [Wed, 6 Jun 2018 14:52:59 +0000 (16:52 +0200)]
ArmPkg/PlatformBootManagerLib: call ProcessCapsules() only once
ARM platforms have no restriction on when a system firmware update
capsule can be applied, and so it is not necessary to call
ProcessCapsules() twice. So let's drop the first invocation that
occurs before EndOfDxe, and rewrite the second call so that all
capsule updates will be applied when the console is up and able to
provide progress feedback.
Ard Biesheuvel [Thu, 7 Jun 2018 06:41:33 +0000 (08:41 +0200)]
MdeModulePkg/DxeCapsuleLibFmp: pass progress callback only if it works
If the first call to UpdateImageProgress() fails, there is no point
in passing a pointer to it to Fmp->SetImage(), since it is highly
unlikely to succeed on any subsequent calls.
This permits the FMP implementation to fall back to an alternate means
of providing feedback to the user, e.g., via the console.
Ard Biesheuvel [Tue, 12 Jun 2018 10:37:08 +0000 (12:37 +0200)]
MdeModulePkg/CapsuleRuntimeDxe: clean the capsule payload to DRAM
When capsule updates are staged for processing after a warm reboot,
they are copied into memory with the MMU and caches enabled. When
the capsule PEI gets around to coalescing the capsule, the MMU and
caches may still be disabled, and so on architectures where uncached
accesses are incoherent with the caches (such as ARM and AARCH64),
we need to ensure that the data passed into UpdateCapsule() is
written back to main memory before performing the warm reboot.
Unfortunately, on ARM, the only type of cache maintenance instructions
that are suitable for this purpose operate on virtual addresses only,
and given that the UpdateCapsule() prototype includes the physical
address of a linked list of scatter/gather data structures that are
mapped at an address that is unknown to the firmware (and may not even
be mapped at all when UpdateCapsule() is invoked), we can only perform
this cache maintenance at boot time. Fortunately, both Windows and Linux
only invoke UpdateCapsule() before calling ExitBootServices(), so this
is not a problem in practice.
In the future, we may propose adding a secure firmware service that
permits performing the cache maintenance at OS runtime, in which case
this code may be enhanced to call that service if available. For now,
we just fail any UpdateCapsule() calls performed at OS runtime on ARM.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Nickle Wang [Tue, 29 May 2018 12:08:25 +0000 (20:08 +0800)]
SecurityPkg/SecureBootConfigDxe: Fix invalid NV data issue.
Check the return value of HiiGetBrowserData() before calling HiiSetBrowserData().
HiiGetBrowserData() failed to retrieve NV data during action EFI_BROWSER_ACTION_RETRIEVE.
If NV data is invalid, stop sending it to form browser.
BaseTools/BinToPcd: Update for Python 3 compatibility
Update to be compatible with both Python 2.x and Python 3.x.
Also return error code 1 when an error is detected to support
use of this tool in scripts.
Cc: Yanyan Sun <yanyan.sun@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Update help to state that --offset must be 8-byte aligned.
Verify that --offset is 8-byte aligned and print an error
message if it is not 8-byte aligned.
Cc: Yanyan Sun <yanyan.sun@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Update error message for --type HII. If either --variable-guid
or --variable-name is missing, then print an error message that
states that both --variable-guid and --variable-name are required.
Cc: Yanyan Sun <yanyan.sun@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Ruiyu Ni [Wed, 13 Jun 2018 08:53:17 +0000 (16:53 +0800)]
MdeModulePkg/IncompPciDeviceSupport: Use correct descriptor length
Per PI spec, the Length value is the length of the ACPI descriptor
in bytes, excluding the first two fields.
The patch fixes the code to report the correct descriptor length
by excluding 3-byte first two fields.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Udit Kumar [Tue, 12 Jun 2018 20:14:08 +0000 (01:44 +0530)]
ArmPlatformPkg: PL011 Dynamic clock freq Support
Some platform support dynamic clocking, which is controlled by some
jumper setting or hardware registers. Result of that is that PCD
PL011UartClkInHz would need to be updated for frequency change.
This patch implements support for dynamic frequency for PL011 uart.
This patch implements default lib, which is using Pcd. Platform which
needs dynamic clocking needs implement PL011UartClockLib
Liming Gao [Fri, 8 Jun 2018 09:03:47 +0000 (17:03 +0800)]
BaseTools Script: Formalize source files to follow DOS format
V3:
support exclude dir and file by name while traversing the directory.
remove close in with statement.
V2:
add version,description,copyright.
add flag -v,-q,--append-extensions,--override-extensions,--debug.
-q will omit default output,-v and --debug are not implemented.
add default file extensions.
support input of file path.
support muliple input path.
simplify comment.
change 'pattern'.encode() to b'pattern',I think this will be better.
change naming of variable and function to keep the same with BinToPcd.py
V1:
FormatDosFiles.py is added to clean up dos source files. It bases on
the rules defined in EDKII C Coding Standards Specification.
5.1.2 Do not use tab characters
5.1.6 Only use CRLF (Carriage Return Line Feed) line endings.
5.1.7 All files must end with CRLF
No trailing white space in one line. (To be added in spec)
The source files in edk2 project with the below postfix are dos format.
.h .c .nasm .nasmb .asm .S .inf .dec .dsc .fdf .uni .asl .aslc .vfr .idf
.txt .bat .py
The package maintainer can use this script to clean up all files in his
package. The prefer way is to create one patch per one package.
Yunhua Feng [Fri, 8 Jun 2018 08:46:48 +0000 (16:46 +0800)]
BaseTools: Fix one bug of nest !include parser
The case is DSC file include file1, file1 include file2, after parse
file2 finished, DSC parser get the wrong section type, then it would
report invalid error.
projects / mirror_edk2.git / log