mirror_edk2.git
6 years agoOvmfPkg: introduce gRootBridgesConnectedEventGroupGuid
Laszlo Ersek [Sun, 13 Mar 2016 16:35:05 +0000 (17:35 +0100)]
OvmfPkg: introduce gRootBridgesConnectedEventGroupGuid

QEMU's ACPI table generator can only create meaningful _CRS objects --
apertures -- for the root buses if all of the PCI devices behind those
buses are actively decoding their IO and MMIO resources, at the time of
the firmware fetching the "etc/table-loader" fw_cfg file. This is not a
QEMU error; QEMU follows the definition of BARs (which are meaningless
when decoding is disabled).

Currently we hook up AcpiPlatformDxe to the PCI Bus driver's
gEfiPciEnumerationCompleteProtocolGuid cue. Unfortunately, when the PCI
Bus driver installs this protocol, it's *still* not the right time for
fetching "etc/table-loader": although resources have been allocated and
BARs have been programmed with them, the PCI Bus driver has also cleared
IO and MMIO decoding in the command registers of the devices.

Furthermore, we couldn't reenable IO and MMIO decoding temporarily in our
gEfiPciEnumerationCompleteProtocolGuid callback even if we wanted to,
because at that time the PCI Bus driver has not produced PciIo instances
yet.

Our Platform BDSes are responsible for connecting the root bridges, hence
they know exactly when the PciIo instances become available -- not when
PCI enumeration completes (signaled by the above protocol), but when the
ConnectController() calls return.

This is when our Platform BDSes should explicitly cue in AcpiPlatformDxe.
Then AcpiPlatformDxe can temporarily enable IO and MMIO decoding for all
devices, while it contacts QEMU for the ACPI payload.

This patch introduces the event group GUID that we'll use for unleashing
AcpiPlatformDxe from our Platform BDSes.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoOvmfPkg: OvmfPkg.dec: add horizontal whitespace under Guids and Protocols
Laszlo Ersek [Tue, 22 Mar 2016 09:16:44 +0000 (10:16 +0100)]
OvmfPkg: OvmfPkg.dec: add horizontal whitespace under Guids and Protocols

We'll need more room in the next patch. No functional changes.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoOvmfPkg/PlatformBdsLib: rebase to EfiEventGroupSignal
Laszlo Ersek [Tue, 22 Mar 2016 16:37:36 +0000 (17:37 +0100)]
OvmfPkg/PlatformBdsLib: rebase to EfiEventGroupSignal

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoArmVirtPkg/PlatformIntelBdsLib: rebase to EfiEventGroupSignal
Laszlo Ersek [Tue, 22 Mar 2016 16:37:36 +0000 (17:37 +0100)]
ArmVirtPkg/PlatformIntelBdsLib: rebase to EfiEventGroupSignal

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Quickly-acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoIntelFrameworkPkg/FrameworkUefiLib: implement EfiEventGroupSignal
Laszlo Ersek [Tue, 22 Mar 2016 16:07:14 +0000 (17:07 +0100)]
IntelFrameworkPkg/FrameworkUefiLib: implement EfiEventGroupSignal

This patch follows the implementation seen in MdePkg's UefiLib instance,
so that FrameworkUefiLib also covers the UefiLib.h library class header
completely.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoIntelFrameworkPkg/FrameworkUefiLib: move InternalEmptyFunction to UefiLib.c
Laszlo Ersek [Tue, 22 Mar 2016 16:01:22 +0000 (17:01 +0100)]
IntelFrameworkPkg/FrameworkUefiLib: move InternalEmptyFunction to UefiLib.c

The InternalEmptyFunction() is currently only used by code in
"UefiNotTiano.c" -- "Library functions that abstract areas of conflict
between framework and UEFI 2.0.". In the next patches,
InternalEmptyFunction() will be used from "UefiLib.c" as well, hence
promote it to "general utility" status: move the function definition to
"UefiLib.c", and place the function declaration (which is already extern)
into "UefiLibInternal.h".

Fix a typo in the function's name while at it.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoMdePkg/UefiLib: introduce EfiEventGroupSignal
Laszlo Ersek [Tue, 22 Mar 2016 16:07:14 +0000 (17:07 +0100)]
MdePkg/UefiLib: introduce EfiEventGroupSignal

This is a small convenience function that eases signaling an event group
(identified by GUID). An example where it can be used is Platform BDS
signaling the End-of-DXE event group.

The naming follows EfiNamedEventSignal().

The patch modifies the library class header, and updates the most commonly
used library instance at once. Other library instances in the edk2 tree
will be adapted in the following patches.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoMdePkg/UefiLib: move InternalEmptyFunction to UefiLib.c
Laszlo Ersek [Tue, 22 Mar 2016 16:01:22 +0000 (17:01 +0100)]
MdePkg/UefiLib: move InternalEmptyFunction to UefiLib.c

The InternalEmptyFunction() is currently only used by code in
"UefiNotTiano.c" -- "Library functions that abstract areas of conflict
between framework and UEFI 2.0.". In the next patches,
InternalEmptyFunction() will be used from "UefiLib.c" as well, hence
promote it to "general utility" status: move the function definition to
"UefiLib.c", and place the function declaration (which is already extern)
into "UefiLibInternal.h".

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoBaseTools: not include the undefined macro in response file
Yonghong Zhu [Wed, 23 Mar 2016 06:54:36 +0000 (14:54 +0800)]
BaseTools: not include the undefined macro in response file

In last Nmake patch, when we generate the response file, we would replace
all the Macros in the make file. Once there have undefined macro used,
the tool direct report error. In this patch, we use following solution to
resolve the failure.
1. Add all the defined macros into AutoGenObject macro dict
2. For the undefined macros which used in the Make file, when we generate
the response file, we not include this macro, let make phase to handle.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoMdeModulePkg/BootMaintenanceManagerUiLib: Remove type casting in ChooseFile
Dandan Bi [Tue, 22 Mar 2016 02:50:23 +0000 (10:50 +0800)]
MdeModulePkg/BootMaintenanceManagerUiLib: Remove type casting in ChooseFile

The type casting is not necessary and now remove it.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Gary Lin <glin@suse.com>
6 years agoMdeModulePkg/BootMaintManagerUiLib: Declare EFIAPI for ChooseFile handler
Dandan Bi [Tue, 22 Mar 2016 02:38:01 +0000 (10:38 +0800)]
MdeModulePkg/BootMaintManagerUiLib: Declare EFIAPI for ChooseFile handler

The BootMaintenanceManagerUiLib use ChooseFile() from FileExplorerLib
to select files. And the third parameter in ChooseFile() is CHOOSE_HANDLER,
per the definition of CHOOSE_HANDLER, it must use EFIAPI as the calling
convention. But the calling convention was not specified for following
handlers: CreateBootOptionFromFile, CreateDriverOptionFromFile,
BootFromFile. Now specifies the calling convention for those functions.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Gary Lin <glin@suse.com>
6 years agoMdeModulePkg RamDiskDxe: Remove unnecessary TPL raise operations
Hao Wu [Tue, 8 Mar 2016 01:40:57 +0000 (09:40 +0800)]
MdeModulePkg RamDiskDxe: Remove unnecessary TPL raise operations

There is no asynchronous operations to the registered RAM disks link list
maintained within RamDiskDxe driver, therefore, the TPL raise and restore
operations when dealing with the link list are unnecessary.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
6 years agoMdeModulePkg RamDiskDxe: Uninstall DEVICE_PATH_PROTOCOL with correct param
Hao Wu [Tue, 8 Mar 2016 01:35:14 +0000 (09:35 +0800)]
MdeModulePkg RamDiskDxe: Uninstall DEVICE_PATH_PROTOCOL with correct param

Previously, the code uninstalls the DEVICE_PATH_PROTOCOL with the device
path given by caller of the 'RamDiskUnregister' function. The given device
path might be different from the one used to install the
DEVICE_PATH_PROTOCOL.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
6 years agoMdeModulePkg RamDiskDxe: Remove unnecessary 'DisconnectController' calls
Hao Wu [Tue, 8 Mar 2016 01:30:07 +0000 (09:30 +0800)]
MdeModulePkg RamDiskDxe: Remove unnecessary 'DisconnectController' calls

The 'DisconnectController' function calls after
'UninstallMultipleProtocolInterfaces' are unnecessary, since
'DisconnectController' is called inside function
'UninstallMultipleProtocolInterfaces'.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
6 years agoMdeModulePkg/Bds: BDS hotkey shouldn't work on inactive consoles
Ruiyu Ni [Fri, 18 Mar 2016 07:48:49 +0000 (15:48 +0800)]
MdeModulePkg/Bds: BDS hotkey shouldn't work on inactive consoles

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Sunny Wang <sunnywang@intel.com>
6 years agoArmPkg/AArch64Mmu: use correct AP[] bits in ArmClearMemoryRegionReadOnly
Ard Biesheuvel [Thu, 17 Mar 2016 13:55:00 +0000 (14:55 +0100)]
ArmPkg/AArch64Mmu: use correct AP[] bits in ArmClearMemoryRegionReadOnly

The function ArmClearMemoryRegionReadOnly() was supposed to undo the
effect of ArmSetMemoryRegionReadOnly(), but instead, it sets the permissions
to EL0-no access, EL1-read-only. Since the EL0 bit should be 1 to align
with EL2/3 (where the bit is SBO), use TT_AP_RW_RW instead, which makes the
entry read-write for EL0 when executing at EL1, and read-write for all other
levels.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
6 years agoArmPkg/ArmExceptionLib: reimplement register stack/unstack routines
Ard Biesheuvel [Thu, 17 Mar 2016 13:05:28 +0000 (14:05 +0100)]
ArmPkg/ArmExceptionLib: reimplement register stack/unstack routines

This replaces the somewhat opaque preprocessor based stack/unstack macros
with open coded ldp/stp sequences to preserve the interrupted context
before handing over to the exception handler in C.

This removes various arithmetic operations on the stack pointer, and
reduces the exception return critical section to its minimum size (i.e.,
the bare minimum required to populate the ELR and SPSR registers and invoke
the eret).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmPkg/ArmExceptionLib: avoid indirect call if using vector table in place
Ard Biesheuvel [Thu, 17 Mar 2016 10:39:01 +0000 (11:39 +0100)]
ArmPkg/ArmExceptionLib: avoid indirect call if using vector table in place

If we are using the vector table in place, there is no need to make an
indirect call to the common handler routine from the vector table entries,
so just use a straight branch instruction in that case.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmPkg/ArmExceptionLib: make build time define visible to the compiler
Ard Biesheuvel [Thu, 17 Mar 2016 10:33:58 +0000 (11:33 +0100)]
ArmPkg/ArmExceptionLib: make build time define visible to the compiler

The global gArmRelocateVectorTable is a build time constant, but due to
its external linkage and lack of constness, the compiler does not see that.
So turn it into a static boolean, and at the same time, make the function
CopyExceptionHandlers() (which is only called if gArmRelocateVectorTable is
set) static as well, so that the compiler can eliminate it completely if
we are using the vector table in place.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmPkg/ArmExceptionLib: don't restore ESR and FAR upon exception return
Ard Biesheuvel [Thu, 17 Mar 2016 07:55:39 +0000 (08:55 +0100)]
ArmPkg/ArmExceptionLib: don't restore ESR and FAR upon exception return

ESR and FAR are populated by the hardware upon exception entry, and
describe the exception, not the interrupted context. So there is no point
in restoring their values before returning from the exception.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmPkg/ArmExceptionLib: stack FPSR on common path
Ard Biesheuvel [Thu, 17 Mar 2016 07:54:11 +0000 (08:54 +0100)]
ArmPkg/ArmExceptionLib: stack FPSR on common path

We have three code paths to stack/unstack the exception context, one for
each of EL3, EL2 and EL1. However, they all access the same copy of FPSR
so move that access to the common path.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmPkg/ArmExceptionLib: fold exception handler prologue into vector table
Ard Biesheuvel [Wed, 16 Mar 2016 15:45:39 +0000 (16:45 +0100)]
ArmPkg/ArmExceptionLib: fold exception handler prologue into vector table

Unlike the AArch32 vector table, which has room for a single instruction
for each exception type, the AArch64 exception table has 128 byte slots,
which can easily hold the shared prologues that are emitted out of line.

So refactor this code into a single macro, and expand it into each vector
table slot. Since the address of the command handler entry point is no
longer patched in by the C code, we can just emit the literal into each
vector entry directly.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmPkg/AsmMacroIoLibV8: remove undocumented assumption from ELx macros
Ard Biesheuvel [Thu, 17 Mar 2016 08:07:28 +0000 (09:07 +0100)]
ArmPkg/AsmMacroIoLibV8: remove undocumented assumption from ELx macros

The macros EL1_OR_EL2() and EL1_OR_EL2_OR_EL3() allow conditional execution
of assembly sequences based on the current exception level, by jumping to
caller supplied labels 1f, 2f or 3f. However, the jump to 1f is actually
a fallthrough, which means the EL1 code needs to follow right after the
macro invocation, and the 1f label is ignored.

So let's fix this by making all jumps explicit.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoBaseTools: Fix nmake failure due to command-line length limitation
Yonghong Zhu [Wed, 16 Mar 2016 03:06:44 +0000 (11:06 +0800)]
BaseTools: Fix nmake failure due to command-line length limitation

NMAKE is limited to command-line length of 4096 characters. Due to the
large number of /I directives specified on command line (one per include
directory), the path length of WORKSPACE is multiplied by the number of
/I directives and can exceed the limit.
This patch:
1. Add new build option -l, --cmd-len to set the maximum command line
length, default value is 4096.
2. Generate the response file only if the command line length exceed its
maximum characters (default is 4096) when build the module. Cover
PP_FLAGS, CC_FLAGS, VFRPP_FLAGS, APP_FLAGS, ASLPP_FLAGS, ASLCC_FLAGS and
ASM_FLAGS.
3. The content of the response file is combine from the FLAGS option and
INC option.
4. When build failure, it would print out the response file's file
location and its content.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoMdePkg/Pci22.h: Fix a coding style issue
Ruiyu Ni [Fri, 18 Mar 2016 06:04:51 +0000 (14:04 +0800)]
MdePkg/Pci22.h: Fix a coding style issue

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
6 years agoMdeModulePkg DxeCore: Address boundary check for Type AllocateAddress
Star Zeng [Fri, 18 Mar 2016 01:52:44 +0000 (09:52 +0800)]
MdeModulePkg DxeCore: Address boundary check for Type AllocateAddress

Check for Type AllocateAddress,
if NumberOfPages is 0 or
if (NumberOfPages << EFI_PAGE_SHIFT) is above MAX_ADDRESS or
if (Start + NumberOfBytes) rolls over 0 or
if Start is above MAX_ADDRESS or
if End is above MAX_ADDRESS,
return EFI_NOT_FOUND.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoMdeModulePkg DxeCore: Check Start consistently in CoreConvertPagesEx
Star Zeng [Fri, 18 Mar 2016 01:46:24 +0000 (09:46 +0800)]
MdeModulePkg DxeCore: Check Start consistently in CoreConvertPagesEx

Current check:
ASSERT (NumberOfPages);
ASSERT ((Start & EFI_PAGE_MASK) == 0);
ASSERT (End > Start) ;

if (NumberOfPages == 0 ||
    ((Start & EFI_PAGE_MASK) != 0) ||
    (Start > (Start + NumberOfBytes))) {

This patch is to update "(Start > (Start + NumberOfBytes))" to "(Start >= End)"
to be consistent with "ASSERT (End > Start)"

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoNt32Pkg: Switch the DebugLibReportStatusCode to MdeModulePkg
Cinnamon Shia [Wed, 16 Mar 2016 02:45:16 +0000 (10:45 +0800)]
Nt32Pkg: Switch the DebugLibReportStatusCode to MdeModulePkg

Switch the DebugLibReportStatusCode from IntelFrameworkPkg to MdeModulePkg.
The functionality and the code between them are almost the same.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoOvmfPkg/PlatformPei: suppress wrong VS2008 warning (use of uninited local)
Laszlo Ersek [Fri, 18 Mar 2016 23:08:47 +0000 (00:08 +0100)]
OvmfPkg/PlatformPei: suppress wrong VS2008 warning (use of uninited local)

VS2008 seems to think that the "PciExBarBase" variable (introduced in
commit 7b8fe63561b4) can be evaluated for the
AddReservedMemoryBaseSizeHob() function call with its value being
uninitialized / indeterminate. This is not the case (see
"mHostBridgeDevId"); suppress the warning.

Reported-by: David Woodhouse <dwmw2@infradead.org>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/8871/focus=9431
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoMdeModulePkg PlatformVarCleanupLib: Locate VarCheck protocol when using
Star Zeng [Thu, 17 Mar 2016 05:31:44 +0000 (13:31 +0800)]
MdeModulePkg PlatformVarCleanupLib: Locate VarCheck protocol when using

Do not locate VarCheck protocol in Constructor, then the
gEdkiiVarCheckProtocolGuid could be removed from [Depex].
It will be more flexible for the library Consumer to work without VarCheck
protocol installed, for example at recovery boot mode with EmuRuntimeDxe.

The unused UefiLib is also been removed from [LibraryClasses] in *.inf.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
6 years agoArmPkg: update CpuDxe to use CpuExceptionHandlerLib
Cohen, Eugene [Mon, 7 Mar 2016 15:16:38 +0000 (15:16 +0000)]
ArmPkg: update CpuDxe to use CpuExceptionHandlerLib

Use the new ARM/AArch64 implementation of the base
CpuExceptionHandlerLib library from CpuDxe to centralize
exception handling.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
6 years agoOmap35xxPkg: drop CpuExceptionHandlerLib library class resolution
Ard Biesheuvel [Wed, 16 Mar 2016 14:04:18 +0000 (15:04 +0100)]
Omap35xxPkg: drop CpuExceptionHandlerLib library class resolution

Remove the null resolution for CpuExceptionHandlerLib: this version will
no longer work once we update ARM's CpuDxe to depend on the ARM specific
version. Since this module does not actually rely on it, let's just remove
all mention of it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoBeagleBoardPkg: move to ARM version of CpuExceptionHandlerLib
Ard Biesheuvel [Wed, 16 Mar 2016 14:03:40 +0000 (15:03 +0100)]
BeagleBoardPkg: move to ARM version of CpuExceptionHandlerLib

Change our resolution for the previously unused CpuExceptionHandlerLib
from the null implementation to the newly added implementation specific
to AARCH64 and ARM. This is needed since our CpuDxe will start using it
in a subsequent patch.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
6 years agoArmVirtPkg/ArmVirtQemu: move to ARM version of CpuExceptionHandlerLib
Ard Biesheuvel [Wed, 16 Mar 2016 10:03:55 +0000 (11:03 +0100)]
ArmVirtPkg/ArmVirtQemu: move to ARM version of CpuExceptionHandlerLib

Change our resolution for the previously unused CpuExceptionHandlerLib
from the null implementation to the newly added implementation specific
to AARCH64 and ARM. This is needed since our CpuDxe will start using it
in a subsequent patch.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
6 years agoShellPkg: Remove the unused local variable.
Qiu Shumin [Thu, 17 Mar 2016 02:04:08 +0000 (10:04 +0800)]
ShellPkg: Remove the unused local variable.

Remove the unused local variable to refine the code.

Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc:Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
6 years agoMdeModulePkg: Fixed incorrect return value of MatchString
Cecil Sheng [Thu, 17 Mar 2016 02:23:47 +0000 (10:23 +0800)]
MdeModulePkg: Fixed incorrect return value of MatchString

In UEFI2.6, CapturePtr's in the Captures array returned by MatchString
are to be separatedly allocated so that they can be freed by the
caller.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cecil Sheng <cecil.sheng@hpe.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
6 years agoMdeModulePkg: ConSplitterDxe: use U64 mult/div wrappers in AbsPtr scaling
Laszlo Ersek [Wed, 16 Mar 2016 12:54:01 +0000 (13:54 +0100)]
MdeModulePkg: ConSplitterDxe: use U64 mult/div wrappers in AbsPtr scaling

This is an emergency fix for UINT64 multiplications and divisions not
being done with the right BaseLib functions -- they break Ia32 builds.

Fixes: 30ed3422ab2de03abf7c1433ebb482f6e5e16f45
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
6 years agoArmPkg: ARM/AArch64 implementation of CpuExceptionHandlerLib
Cohen, Eugene [Mon, 7 Mar 2016 15:16:35 +0000 (15:16 +0000)]
ArmPkg: ARM/AArch64 implementation of CpuExceptionHandlerLib

Introduce ARM and AArch64 instances of the CpuExceptionHandlerLib which
provides exception handling and registration of handlers regardless of
execution phase.

Two variants of the ArmExceptionLib are provided: one where exception
handlers reside within the module (meeting appropriate architectural
alignment requirements for the vector table) and another one that will
relocate a copy of thee xception handlers to an address specified by
PcdCpuVectorBaseAddress. The ArmRelocateExceptionLib is intended for use
in cases where ArmExceptionLib is too large for the application
(uncompressed XIP images) as driven by the vector table alignment padding.

The AArch64 build of this library supports execution at EL1, EL2, and EL3
exception levels.

Tested on ARM, and AArch64 with SEC, DXE Core, and CpuDxe modules.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
6 years agoArmPkg/ArmLib: add ArmReadHcr to enable read-modify-write of HCR
Cohen, Eugene [Mon, 7 Mar 2016 15:16:27 +0000 (15:16 +0000)]
ArmPkg/ArmLib: add ArmReadHcr to enable read-modify-write of HCR

Add ArmReadHcr() to ArmLib to enable read-modify-write of the HCR system
register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
6 years agoMdeModulePkg: Rescale ConSplitter Absolute Pointer.
Derek Lin [Wed, 9 Mar 2016 08:34:31 +0000 (16:34 +0800)]
MdeModulePkg: Rescale ConSplitter Absolute Pointer.

ConSplitter's Absolute Pointer should scale virtual device's resolution like what Simple Pointer do.
Before this change, caller will get Virtual device's resolution but physical device's current point.
This change let caller get Virtual device's resolution with virtual device's current point.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Derek Lin <derek.lin2@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
6 years agoShellPkg: Per UEFI Shell 2.2 SPEC to make Shell supports 'NoNesting'.
Qiu Shumin [Tue, 8 Mar 2016 02:26:29 +0000 (10:26 +0800)]
ShellPkg: Per UEFI Shell 2.2 SPEC to make Shell supports 'NoNesting'.

This patch makes Shell support -nonesting invocation option. This option
specifies that EFI_SHELL_PROTOCOL.Execute API nesting of a new Shell
instance is optional and dependent on the 'nonesting' Shell environment
variable.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Jim Dailey <Jim_Dailey@Dell.com>
6 years agoNetworkPkg: Fix the driver model issue in HTTP Boot driver.
Fu Siyuan [Mon, 14 Mar 2016 02:43:42 +0000 (10:43 +0800)]
NetworkPkg: Fix the driver model issue in HTTP Boot driver.

The HTTP Boot driver have some UEFI driver model problems which will make the
code ASSERT when it's disconnected.
First, the driver opens the HttpSb protocol BY_CHILD without BY_DRIVER attribute.
So the driver binding stop won't be called when HTTP driver is disconnected, so
a child handle is left and made HTTP driver binding stop function goes into error.
This patch remove this unnecessary OpenProtocol and only unload the HII from when
both the IP4 and IP6 stack have been stopped completely.
The second issue is the HTTP boot driver always use the driver's image handle as
it's driver binding handle, it's not correct. HTTP Boot driver provides 2 separate
driver binding protocols from IP4 and IP6 stack, so it has 2 driver binding handle.
So this patch fix the code to use correct driver binding handle when create/open
a HTTP child handle.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
6 years agoMdeModulePkg: Coding style update for DxeHttpLib.inf
Jiaxin Wu [Tue, 15 Mar 2016 00:28:47 +0000 (08:28 +0800)]
MdeModulePkg: Coding style update for DxeHttpLib.inf

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>
6 years agoIntelFrameworkModulePkg/LegacyBootMaintUiLib: Refine the code
Dandan Bi [Wed, 9 Mar 2016 03:11:52 +0000 (11:11 +0800)]
IntelFrameworkModulePkg/LegacyBootMaintUiLib: Refine the code

Remove the ASSERT code that may be triggered in LegacyBootMaintUiLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
6 years agoMdeModulePkg: Refine the UI code
Dandan Bi [Mon, 14 Mar 2016 06:37:55 +0000 (14:37 +0800)]
MdeModulePkg: Refine the UI code

Remove the ASSERT in UI code that may be triggered,
and clean up the useless code.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
6 years agoMdeModulePkg/DriverSampleDxe: Uninstall the ConfigAccess protocol
Dandan Bi [Tue, 15 Mar 2016 01:44:16 +0000 (09:44 +0800)]
MdeModulePkg/DriverSampleDxe: Uninstall the ConfigAccess protocol

In DriverSampleInit, has installed the configAccess protocol to
the DriverHandle[1], but don't uninstall it in DriverSampleUnload.
Now uninstall the configAccess protocol.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
6 years agoBaseTools: add new command line option to support override PCD value
Yonghong Zhu [Thu, 25 Feb 2016 08:13:31 +0000 (16:13 +0800)]
BaseTools: add new command line option to support override PCD value

this patch add new feature to support override PCD value on the command
line. The value from the command line is the highest priority.
1.Add option(--pcd) to support both PcdName and TokenSpaceGuild.PcdName
2.For void* type PCD, use following format:
  cstring PCD: --pcd PcdName="string"
  unicodestring PCD: --pcd PcdName=L"string"
  CArray PCD: --pcd PcdName=B"{0x1, 0x2}"
3.Build Report, use *B to show the PCD value was overridden in the
command line.
4.Error Condition:
Report error if the PCD is not found
Report error if the PcdName is found under multiple different TokenSpaceGuid
Report error if PCD value syntax is incorrect
Report error if void* type PCD value exceed its max size

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoOvmfPkg/LegacyRegion: Support legacy region manipulation of Q35
Ruiyu Ni [Tue, 15 Mar 2016 08:10:40 +0000 (16:10 +0800)]
OvmfPkg/LegacyRegion: Support legacy region manipulation of Q35

Current implementation only supports legacy region of 440 chip.
When QEMU is launched in Q35 mode using CSM enabled OVMF image,
LegacyBios driver fails to start due to the legacy region
[0xC0000, 0xFFFFF] cannot be written.

v2:
 * just updates the comments.

v3:
 * uses PcdOvmfHostBridgePciDevId as Jordan suggested.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Justen Jordan <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoBaseTools: Support recent versions of cx_freeze.
Marvin Haeuser [Sun, 21 Feb 2016 00:46:59 +0000 (08:46 +0800)]
BaseTools: Support recent versions of cx_freeze.

This patch fixes the assumed invalid command to start recent versions
of cx_freeze on Windows, which are python and not Windows
executables. To launch them correctly, the '$(PYTHON_HOME)\python'
prefix has been added, so that Python can interpret the tool.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
6 years agoBaseTools: Add two macros into AutoGenObject macro dict
Yonghong Zhu [Fri, 11 Mar 2016 10:58:44 +0000 (18:58 +0800)]
BaseTools: Add two macros into AutoGenObject macro dict

Add DEST_DIR_OUTPUT and DEST_DIR_DEBUG into AutoGenObject macro dict.
Because some module (eg: BaseUefiCpuLib) may use this macro in the make
file.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoBaseTools: Mentioned get_vsvars.bat at ReadMe
Peter Kirmeier [Sat, 12 Mar 2016 21:28:33 +0000 (05:28 +0800)]
BaseTools: Mentioned get_vsvars.bat at ReadMe

When someone doesn't know where to find or what to do with
vsvars32.bat, get_vsvars.bat can be used.

CC: Yonghong Zhu <yonghong.zhu@intel.com>
CC: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Peter Kirmeier <topeterk@freenet.de>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoMdePkg: Add UEFI2.6 HII Image Ex and Image Decoder protocol definition.
Cecil Sheng [Mon, 14 Mar 2016 02:52:27 +0000 (10:52 +0800)]
MdePkg: Add UEFI2.6 HII Image Ex and Image Decoder protocol definition.

Add the definition for the new UEFI 2.6 EFI_HII_IMAGE_EX_PROTOCOL and
EFI_IMAGE_DECODER_PROTOCOL.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cecil Sheng <cecil.sheng@hpe.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
6 years agoMdeModulePkg: Add PcdMaxPeiPerformanceLogEntries16 PROMPT&HELP STR to *.uni
Star Zeng [Mon, 14 Mar 2016 01:48:26 +0000 (09:48 +0800)]
MdeModulePkg: Add PcdMaxPeiPerformanceLogEntries16 PROMPT&HELP STR to *.uni

Commit 7c50b3434377cbb49ce4514ee31339000a5cadc0 introduced
PcdMaxPeiPerformanceLogEntries16 to support > 256 PEI performance log
entries, but its PROMPT&HELP STR were forgotten to be added into *.uni.

Commit 7c50b3434377cbb49ce4514ee31339000a5cadc0 also updated
PcdMaxPeiPerformanceLogEntries HELP STR.

This patch is to add PcdMaxPeiPerformanceLogEntries16 PROMPT&HELP STR and
update PcdMaxPeiPerformanceLogEntries HELP STR in *.uni.

Cc: Shumin Qiu <shumin.qiu@intel.com>
Cc: Cinnamon Shia <cinnamon.shia@hpe.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
Reviewed-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
6 years agoNetworkPkg: fix function comments in HttpBootDxe.
Fu Siyuan [Thu, 10 Mar 2016 02:08:54 +0000 (10:08 +0800)]
NetworkPkg: fix function comments in HttpBootDxe.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>
6 years agoCryptoPkg: Fix the potential system hang issue
Jiaxin Wu [Fri, 11 Mar 2016 03:02:00 +0000 (11:02 +0800)]
CryptoPkg: Fix the potential system hang issue

This patch is used to fix the potential system hang
caused by the NULL 'time' parameter usage.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Long Qin <qin.long@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: David Woodhouse <David.Woodhouse@intel.com>
6 years agoArmPlatformPkg: PL061: support multiple controller
Haojian Zhuang [Mon, 14 Mar 2016 05:30:37 +0000 (13:30 +0800)]
ArmPlatformPkg: PL061: support multiple controller

Support multiple PL061 controllers. If platform gpio driver couldn't be
found, PL061 gpio driver will continue to load PcdPL061GpioBase as the
register base.

It could be compatible with the use case of current PL061 gpio driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
6 years agoEmbeddedPkg: enhance for multiple gpio controllers
Haojian Zhuang [Mon, 14 Mar 2016 05:30:36 +0000 (13:30 +0800)]
EmbeddedPkg: enhance for multiple gpio controllers

EmbeddedGpio only supports one gpio controller in one platform. Now
create PLATFORM_GPIO_CONTROLLER to support multiple gpio controllers
in one platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
6 years agoShellPkg: Fix Shell ASSERT when read 'TAB' key fail from 'ConIn'.
Qiu Shumin [Fri, 11 Mar 2016 05:32:52 +0000 (13:32 +0800)]
ShellPkg: Fix Shell ASSERT when read 'TAB' key fail from 'ConIn'.

Free 'FoundFileList' when read 'TAB' key fail to avoid memory leak and ASSERT.

Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
6 years agoBaseTools/BPDG: Fix the bug to get the PCD Size
Yonghong Zhu [Sun, 13 Mar 2016 10:13:04 +0000 (18:13 +0800)]
BaseTools/BPDG: Fix the bug to get the PCD Size

The original bug is only consider int format of PcdSize, but forgot the
Hex format. The fix is use the already exist variable PCD.PcdBinSize
which done to translate PCD size cover both format.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoUefiCpuPkg/Include: Add top level MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:54:30 +0000 (14:54 -0800)]
UefiCpuPkg/Include: Add top level MSR include file

Add top level MSR include file that includes the Architecural MSR
include file and all family specific MSR files from the Msr
subdirectory

Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR).

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Pentium MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:06:31 +0000 (14:06 -0800)]
UefiCpuPkg/Include: Add Pentium MSR include file

Add Pentium MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-20.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add P6 MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:06:11 +0000 (14:06 -0800)]
UefiCpuPkg/Include: Add P6 MSR include file

Add P6 MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-19.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Pentium M MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:05:47 +0000 (14:05 -0800)]
UefiCpuPkg/Include: Add Pentium M MSR include file

Add Pentium M MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-18.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Core Solo/Duo MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:05:17 +0000 (14:05 -0800)]
UefiCpuPkg/Include: Add Core Solo/Duo MSR include file

Add Core Solo/Duo MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-17.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Pentium 4 MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:04:28 +0000 (14:04 -0800)]
UefiCpuPkg/Include: Add Pentium 4 MSR include file

Add Pentium 4 MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-16.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Xeon Phi MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:04:02 +0000 (14:04 -0800)]
UefiCpuPkg/Include: Add Xeon Phi MSR include file

Add Xeon Phi MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-15.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Skylake MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:03:38 +0000 (14:03 -0800)]
UefiCpuPkg/Include: Add Skylake MSR include file

Add Skylake MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-14.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Xeon Processor D MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:03:12 +0000 (14:03 -0800)]
UefiCpuPkg/Include: Add Xeon Processor D MSR include file

Add Xeon Processor D MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-13.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Broadwell MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:02:30 +0000 (14:02 -0800)]
UefiCpuPkg/Include: Add Broadwell MSR include file

Add Broadwell MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-12.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Haswell-E MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:01:40 +0000 (14:01 -0800)]
UefiCpuPkg/Include: Add Haswell-E MSR include file

Add Haswell-E MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-11.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Haswell MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:00:58 +0000 (14:00 -0800)]
UefiCpuPkg/Include: Add Haswell MSR include file

Add Haswell MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-10.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Ivy Bridge MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:00:31 +0000 (14:00 -0800)]
UefiCpuPkg/Include: Add Ivy Bridge MSR include file

Add Ivy Bridge MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-9.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Sandy Bridge MSR include file
Michael Kinney [Tue, 8 Mar 2016 22:00:03 +0000 (14:00 -0800)]
UefiCpuPkg/Include: Add Sandy Bridge MSR include file

Add Sandy Bridge MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-8.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Xeon E7 MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:59:31 +0000 (13:59 -0800)]
UefiCpuPkg/Include: Add Xeon E7 MSR include file

Add Xeon E7 MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-7.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Xeon 5600 MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:59:06 +0000 (13:59 -0800)]
UefiCpuPkg/Include: Add Xeon 5600 MSR include file

Add Xeon 5600 MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-6.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Nehalem MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:58:17 +0000 (13:58 -0800)]
UefiCpuPkg/Include: Add Nehalem MSR include file

Add Nehalem MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-5.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Silvermont MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:57:47 +0000 (13:57 -0800)]
UefiCpuPkg/Include: Add Silvermont MSR include file

Add Silvermont MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-4.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Atom MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:57:13 +0000 (13:57 -0800)]
UefiCpuPkg/Include: Add Atom MSR include file

Add Atom MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-3.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Core 2 MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:56:42 +0000 (13:56 -0800)]
UefiCpuPkg/Include: Add Core 2 MSR include file

Add Core 2 MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-2.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoUefiCpuPkg/Include: Add Architectural MSR include file
Michael Kinney [Tue, 8 Mar 2016 21:54:54 +0000 (13:54 -0800)]
UefiCpuPkg/Include: Add Architectural MSR include file

Add Architectural MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-1.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
6 years agoCryptoPkg/OpensslLib: Upgrade OpenSSL version to 1.0.2g
Qin Long [Fri, 11 Mar 2016 21:57:18 +0000 (13:57 -0800)]
CryptoPkg/OpensslLib: Upgrade OpenSSL version to 1.0.2g

OpenSSL 1.0.2g was released with several severity fixes at
01-Mar-2016(https://www.openssl.org/news/secadv/20160301.txt).
Upgrade the supported OpenSSL version in CryptoPkg/OpensslLib to
catch the latest release 1.0.2g.
(NOTE: RT4175 from David Woodhouse was included in 1.0.2g. The
       new-generated patch will remove this part. And the line
       endings were still kept as before in this version for
       consistency)

CC: Ting Ye <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qin Long <qin.long@intel.com>
Reviewed-by: David Woodhouse <David.Woodhouse@intel.com>
6 years agoCryptoPkg/OpensslLib: Convert saved opensslconf.h to DOS line endings
David Woodhouse [Fri, 11 Mar 2016 21:16:51 +0000 (13:16 -0800)]
CryptoPkg/OpensslLib: Convert saved opensslconf.h to DOS line endings

Until we fix the git repository to store line endings properly and then
just check them out in the appropriate form for the platform, let's make
process_files.sh convert the opensslconf.h to DOS line endings when it
creates it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Qin Long <qin.long@intel.com>
6 years agoArmVirtPkg/VirtFdtDxe: set /chosen/linux,pci-probe-only to 1 in DTB
Ard Biesheuvel [Thu, 10 Mar 2016 10:36:31 +0000 (17:36 +0700)]
ArmVirtPkg/VirtFdtDxe: set /chosen/linux,pci-probe-only to 1 in DTB

Unlike Linux on x86, which typically honors the PCI configuration performed
by the firmware, Linux on ARM assumes that the PCI subsystem needs to be
configured from scratch. This is not entirely unreasonable given the
historical background of embedded systems using very basic bootloaders,
but is no longer tenable with Linux on arm64 moving to UEFI and ACPI in the
server space. For this reason, PCI support in the arm64 kernel running under
ACPI is likely to move to the x86 model of honoring the PCI configuration
done by the firmware.

So let's align with that in our DT based configuration as well, and set the
/chosen/linux,pci-probe-only property to 1 in the Device Tree before we
hand it to the OS.

In case we are exposing an emulated VGA PCI device to the guest, which may
subsequently get exposed via the Graphics Output protocol and driven as an
efifb by the OS, this ensures the PCI resource allocations for the framebuffer
are not overridden, since that would cause the framebuffer to stop working.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
6 years agoSecurityPkg: Clear LocalAuthSession content after use.
Jiewen Yao [Thu, 10 Mar 2016 05:52:15 +0000 (21:52 -0800)]
SecurityPkg: Clear LocalAuthSession content after use.

Some commands in DxeTcg2PhysicalPresenceLib accept
AuthSession as input parameter and copy to local
command buffer. After use, this AuthSession content
should be zeroed, because there might be some secrete
there.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
6 years agoSecurityPkg: Add Tpm2 prefix to lib to avoid conflict.
Jiewen Yao [Wed, 9 Mar 2016 04:47:15 +0000 (20:47 -0800)]
SecurityPkg: Add Tpm2 prefix to lib to avoid conflict.

Tpm2Ptp.c is library, but it miss Tpm2 prefix for
IsPtpPresence() and GetPtpInterface(). There might
be risk as name symbol conflict. This patch adds Tpm2
prefix for them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
Tested-by: "Wu, Hao A" <hao.a.wu@intel.com>
6 years agoSecurityPkg: Fix Tcg2 SubmitRequestToPreOSFunction() fail in second times.
Jiewen Yao [Thu, 10 Mar 2016 05:44:40 +0000 (21:44 -0800)]
SecurityPkg: Fix Tcg2 SubmitRequestToPreOSFunction() fail in second times.

Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction()
has check if current request is same as previous.
But it forget check RequestParameter, which causes
second request fail to process, if RequestParameter
is different.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
6 years agoBaseTools: update the mail address for stack trace info
Yonghong Zhu [Mon, 29 Feb 2016 02:32:07 +0000 (10:32 +0800)]
BaseTools: update the mail address for stack trace info

Update the mail address from edk2-devel@lists.sourceforge.net to
edk2-devel@lists.01.org.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
6 years agoSecurityPkg: SecureBootConfigDxe: Update coding style
Zhang, Chao B [Thu, 10 Mar 2016 01:21:42 +0000 (09:21 +0800)]
SecurityPkg: SecureBootConfigDxe: Update coding style

Update code to follow EDK2 coding style.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chao Zhang<chao.b.zhang@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
6 years agoNetworkPkg: Refine the code of shell app under networkPkg.
Zhang, Lubo [Wed, 9 Mar 2016 06:20:40 +0000 (14:20 +0800)]
NetworkPkg: Refine the code of shell app under networkPkg.

refine the code of ifconfig6 and ping6 application.

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
6 years agoMdeModulePkg: Add missing pcd description to MdeModulePkg.uni
Dandan Bi [Wed, 9 Mar 2016 04:23:25 +0000 (12:23 +0800)]
MdeModulePkg: Add missing pcd description to MdeModulePkg.uni

Since PcdHiiOsRuntimeSupport has added in the MdeModulePkg.dec file,
now add the usage information in the uni file.

Cc: Qiu Shumin <shumin.qiu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
6 years agoNetworkPkg: Fix IpsecConfig GCC build failure issue
Jiaxin Wu [Tue, 8 Mar 2016 08:08:40 +0000 (16:08 +0800)]
NetworkPkg: Fix IpsecConfig GCC build failure issue

This issue is caused by the string token ID for help message,
which is defined in the internal head file.
This head file is used for reference more than once. So,
multiple definition for the string token ID error will be
enrolled.

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Zhang, Lubo <lubo.zhang@intel.com>
6 years agoOvmfPkg: PciHostBridgeLib: permit access to the full extended config space
Laszlo Ersek [Fri, 4 Mar 2016 00:49:54 +0000 (01:49 +0100)]
OvmfPkg: PciHostBridgeLib: permit access to the full extended config space

By now OVMF makes MdeModulePkg/Bus/Pci/PciHostBridgeDxe go through
MMCONFIG (when running on Q35). Enable the driver to address each B/D/F's
config space up to and including offset 0xFFF.

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
6 years agoOvmfPkg: match PCI config access to machine type (if not USE_OLD_PCI_HOST)
Laszlo Ersek [Fri, 4 Mar 2016 00:33:38 +0000 (01:33 +0100)]
OvmfPkg: match PCI config access to machine type (if not USE_OLD_PCI_HOST)

If USE_OLD_PCI_HOST is FALSE, then we switch all executable module types
supported by DxePciLibI440FxQ35 to the following library instance stack:

  BasePciSegmentLibPci  [class: PciSegmentLib]
    DxePciLibI440FxQ35  [class: PciLib]
      BasePciCf8Lib     [class: PciCf8Lib]
      BasePciExpressLib [class: PciExpressLib]

Every module will select 0xCF8 vs. ECAM based on the OVMF platform type
(i440fx or Q35). Notably, MdeModulePkg/Bus/Pci/PciHostBridgeDxe is among
the affected drivers.

The BasePciExpressLib instance is where the PcdPciExpressBaseAddress PCD
fills its original role.

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
6 years agoOvmfPkg: add DxePciLibI440FxQ35
Laszlo Ersek [Thu, 3 Mar 2016 23:53:12 +0000 (00:53 +0100)]
OvmfPkg: add DxePciLibI440FxQ35

This library is a trivial unification of the following two PciLib
instances (and the result is easily diffable against each):
- MdePkg/Library/BasePciLibCf8
- MdePkg/Library/BasePciLibPciExpress

The PCI config access method is determined in the constructor function,
from the dynamic PCD "PcdOvmfHostBridgePciDevId" that is set by
PlatformPei.

The library instance is usable in DXE phase or later modules: the PciLib
instances being unified have no firmware phase / client module type
restrictions, and here the only PCD access is made in the constructor
function. That is, even before a given client executable's entry point is
invoked.

The library instance depends on PlatformPei both for setting the PCD
mentioned above, and also for enabling MMCONFIG on Q35. PEI and earlier
phase modules are not expected to need extended config access even on Q35.

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
6 years agoOvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG / ECAM) on Q35
Laszlo Ersek [Thu, 3 Mar 2016 19:46:22 +0000 (20:46 +0100)]
OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG / ECAM) on Q35

The comments in the code should speak for themselves; here we note only
two facts:

- The PCI config space writes (to the PCIEXBAR register) are performed
  using the 0xCF8 / 0xCFC IO ports, by virtue of PciLib being resolved to
  BasePciLibCf8. (This library resolution will permanently remain in place
  for the PEI phase.)

- Since PCIEXBAR counts as a chipset register, it is the responsibility of
  the firmware to reprogram it at S3 resume. Therefore
  PciExBarInitialization() is called regardless of the boot path. (Marcel
  recently posted patches for SeaBIOS that implement this.)

This patch suffices to enable PCIEXBAR (and the dependent ACPI table
generation in QEMU), for the sake of "PCIeHotplug" in the Linux guest:

  ACPI: MCFG 0x000000007E17F000 00003C
        (v01 BOCHS  BXPCMCFG 00000001 BXPC 00000001)
  PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0x80000000-0x8fffffff]
       (base 0x80000000)
  PCI: MMCONFIG at [mem 0x80000000-0x8fffffff] reserved in E820
  acpi PNP0A08:00: _OSC: OS supports
                   [ExtendedConfig ASPM ClockPM Segments MSI]
  acpi PNP0A08:00: _OSC: OS now controls
                   [PCIeHotplug PME AER PCIeCapability]

In the following patches, we'll equip the core PCI host bridge / root
bridge driver and the rest of DXE as well to utilize ECAM on Q35.

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Ref: https://github.com/tianocore/edk2/issues/32
Ref: http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/10548
Suggested-by: Marcel Apfelbaum <marcel@redhat.com>
Reported-by: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoOvmfPkg: PlatformPei: lower the 32-bit PCI MMIO base to 2GB on Q35
Laszlo Ersek [Tue, 8 Mar 2016 12:01:03 +0000 (13:01 +0100)]
OvmfPkg: PlatformPei: lower the 32-bit PCI MMIO base to 2GB on Q35

Gerd has advised us that long term support Q35 machine types have no low
RAM above 2GB, hence we should utilize the [2GB, 3GB) gap -- that we
currently leave unused -- for MMIO. (Plus, later in this series, for the
PCIEXBAR too.)

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Ref: https://github.com/tianocore/edk2/issues/32
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/8707/focus=8817
Suggested-by: Gerd Hoffmann <kraxel@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
6 years agoOvmfPkg: IndustryStandard/Q35MchIch9.h: add PCIEXBAR macros
Laszlo Ersek [Thu, 3 Mar 2016 18:04:28 +0000 (19:04 +0100)]
OvmfPkg: IndustryStandard/Q35MchIch9.h: add PCIEXBAR macros

Section 5.1.16 ("PCIEXBAR -- PCI Express Register Range Base Address") in
Intel document #316966-002 (already referenced near the top of this header
file) describes the Q35 DRAM Controller register that configures the
memory-mapped PCI config space (also known as MMCONFIG, and ECAM /
Enhanced Configuration Access Method).

In this patch we add the macros we'll need later. We'll only support the
256 MB memory-mapped config space -- enough for buses [0, 255].

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Ref: https://github.com/tianocore/edk2/issues/32
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
6 years agoBaseTools ConvertMasmToNasm: Support Python 3
Jordan Justen [Mon, 7 Mar 2016 07:38:59 +0000 (23:38 -0800)]
BaseTools ConvertMasmToNasm: Support Python 3

The script is updated to support both python 2.7 and python 3.

v2:
 * Use io.open() rather than open() (Jaben)

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
6 years agoBaseTools ConvertMasmToNasm: Fix exception when no arguments are given
Jordan Justen [Thu, 3 Mar 2016 08:44:38 +0000 (00:44 -0800)]
BaseTools ConvertMasmToNasm: Fix exception when no arguments are given

Convert to use the argparse library rather than optparse.

As part of the conversion, the script will now give an error message
if no arguments are given. Previously the script would give an
exception when no arguments were given.

Fixes: https://github.com/tianocore/edk2/issues/65
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
6 years agoBaseTools ConvertMasmToNasm: Fix running script outside of a git tree
Jordan Justen [Wed, 10 Feb 2016 18:08:37 +0000 (10:08 -0800)]
BaseTools ConvertMasmToNasm: Fix running script outside of a git tree

The script previously would hit an exception if it was run outside of
a git tree.

The exception looked like:

edk2/BaseTools/Scripts/ConvertMasmToNasm.py Version 0.01
Traceback (most recent call last):
  File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 986, in <module>
    ConvertAsmApp()
  File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 984, in __init__
    ConvertAsmFile(src, dst, self)
  File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 209, in __init__
    CommonUtils.__init__(self, clone)
  File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 69, in __init__
    self.gitemail = clone.gitemail
AttributeError: ConvertAsmApp instance has no attribute 'gitemail'

Fixes: https://github.com/tianocore/edk2/issues/63
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>