fanwang2 [Mon, 18 Dec 2017 09:41:48 +0000 (17:41 +0800)]
ShellPkg: Fix a build error in Ping6 shell command.
Last check in involved a build error, this patch is to
fix this issue.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wang Fan <fan.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
fanwang2 [Mon, 18 Dec 2017 01:21:22 +0000 (09:21 +0800)]
ShellPkg: Update Api from NetLibDetectMedia to NetLibDetectMediaWaitTimeout.
Since new Api NetLibDetectMediaWaitTimeout was involved to support connecting
state handling, and it is forward compatible. So apply this Api in ShellPkg.
V2:
*Define time period in a macro instead of hard code.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wang Fan <fan.wang@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Signed-off-by: fanwang2 <fan.wang@intel.com>
fanwang2 [Mon, 18 Dec 2017 01:20:26 +0000 (09:20 +0800)]
NetworkPkg: Update Api from NetLibDetectMedia to NetLibDetectMediaWaitTimeout.
Since new Api NetLibDetectMediaWaitTimeout was involved to support connecting
state handling, and it is forward compatible. So apply this Api in NetworkPkg.
V2:
*Define time period in a macro instead of hard code.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wang Fan <fan.wang@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Signed-off-by: fanwang2 <fan.wang@intel.com>
fanwang2 [Mon, 18 Dec 2017 01:16:36 +0000 (09:16 +0800)]
MdeModulePkg: Update Api from NetLibDetectMedia to NetLibDetectMediaWaitTimeout.
Since new Api NetLibDetectMediaWaitTimeout was involved to support connecting
state handling, and it is forward compatible. So apply this Api in MdeModulePkg.
V2:
*Define time period in a macro instead of hard code.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wang Fan <fan.wang@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Signed-off-by: fanwang2 <fan.wang@intel.com>
Jian J Wang [Fri, 15 Dec 2017 02:25:12 +0000 (10:25 +0800)]
MdeModulePkg/DxeIplPeim: fix incorrect page table split during protecting
The root cause of this issue is that, during splitting page table, the page
size should be the value of next level (smaller one) instead of current level.
The wrong page size will then cause wrong page table introduced, which will
break the normal boot.
Validation works include booting to Windows 10 and Fedora 26 on real Intel
platform and OVMF emulated platform in addition to manual checks on page
table with JTAG tool.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Star Zeng [Thu, 14 Dec 2017 08:20:32 +0000 (16:20 +0800)]
MdeModulePkg PiSmmCore: Use SxDispatch in SmmEndOfDxeHandler()
As some implementation of SMM Child Dispatcher (including SxDispatch)
may deny the handler registration after SmmReadyToLock, using
SxDispatch in SmmReadyToBootHandler() will be too late.
This patch updates code to use SxDispatch in SmmEndOfDxeHandler()
instead of SmmReadyToBootHandler().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Jiaxin Wu [Wed, 13 Dec 2017 08:58:01 +0000 (16:58 +0800)]
NetworkPkg/UefiPxeBcDxe: Allow the NULL configuration for NewStationIP/NewSubnetMask
According the UEFI Spec for PxeBc.SetStationIP():
If NewStationIP is NULL, then the current IP address will not be modified.
...
If NewSubnetMask is NULL, then the current subnet mask will not be modified.
Currently, EfiPxeBcSetStationIP() doesn't comply with UEFI Spec. This patch is
to fix the issue.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Jiaxin Wu [Tue, 12 Dec 2017 03:02:47 +0000 (11:02 +0800)]
NetworkPkg/UefiPxeBcDxe: Fix Pxe.Dhcp() return status code.
According UEFI Spec, if valid PXE offer is not received, Pxe.Dhcp()
should return EFI_NO_RESPONSE, but currently, EFI_TIMEOUT is returned
from Pxe.Dhcp().
This patch is to fix the above issue.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
V2:
Update function name, add more detail description.
V1:
Check and assert invalid RegisterCpuFeature function parameter
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bell Song <binx.song@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Jiaxin Wu [Tue, 5 Dec 2017 06:23:39 +0000 (14:23 +0800)]
MdeModulePkg/Ip4Dxe: Cleanup the resource after error happen during Ip4StartAutoConfig().
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wang Fan <fan.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Yonghong Zhu [Tue, 12 Dec 2017 07:18:22 +0000 (15:18 +0800)]
BaseTools: back up the binary files when hash value is same
V2: change to use InfBuildData but not ModuleAutoGen
We meet the case that first build with --hash option, then build it
again with --hash and --binary-destination option, since the hash value
is same, tool will not build the driver again, it cause the binary
files are not backed up.
Yonghong Zhu [Wed, 6 Dec 2017 09:36:56 +0000 (17:36 +0800)]
BaseTools: Not cache the .efi file location into build option
We don't need cache the .efi file location into build option, otherwise
when we change the --binary-destination location, it would cause the
hash value is different.
Jian J Wang [Mon, 11 Dec 2017 01:32:27 +0000 (09:32 +0800)]
MdeModulePkg/PiSmmCore: Fix issues in Heap Guard
One issue is that macros defined in HeapGuard.h
GUARD_HEAP_TYPE_PAGE
GUARD_HEAP_TYPE_POOL
doesn't match the definition of PCD PcdHeapGuardPropertyMask in
MdeModulePkg.dec. This patch fixed it by exchanging the BIT0 and BIT1
of them.
Another is that method AdjustMemoryF() will return a bigger NumberOfPages than
the value passed in. This is caused by counting twice of a shared Guard page
which can be used for both head and tail Guard of the memory before it and
after it. This happens only when partially freeing just one page in the middle
of a bunch of allocated pages. The freed page should be turned into a new
Guard page.
Cc: Jie Lin <jie.lin@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Jian J Wang [Sat, 9 Dec 2017 11:15:49 +0000 (19:15 +0800)]
MdeModulePkg/DxeCore: Fix issues in Heap Guard
One issue is that macros defined in HeapGuard.h
GUARD_HEAP_TYPE_PAGE
GUARD_HEAP_TYPE_POOL
doesn't match the definition of PCD PcdHeapGuardPropertyMask in
MdeModulePkg.dec. This patch fixed it by exchanging the BIT0 and BIT1
of them.
Another is that method AdjustMemoryF() will return a bigger NumberOfPages than
the value passed in. This is caused by counting twice of a shared Guard page
which can be used for both head and tail Guard of the memory before it and
after it. This happens only when partially freeing just one page in the middle
of a bunch of allocated pages. The freed page should be turned into a new
Guard page.
Cc: Jie Lin <jie.lin@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Ard Biesheuvel [Fri, 8 Dec 2017 18:15:08 +0000 (18:15 +0000)]
ArmPlatformPkg: retire obsolete PCDs
Retire a whole bunch of ArmPlatformPkg PCDs that are either related
to the ARM BDS, to secure world execution or to stuff that has been
migrated to edk2-platforms.
Create a new LcdGraphicsOutputDxe driver from the existing sources that
takes its hardware abstractions from a LcdHwLib library instance rather
than from a .c file linked directly. All we need is a new .inf file, and
a minimal tweak to LcdGraphicsOutputDxe.h to reuse the LcdHwlib prototypes
rather than open code them.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
[ardb: add it to ArmPlatformPkg.dsc so we can build test it standalone] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Ard Biesheuvel [Fri, 1 Dec 2017 09:41:10 +0000 (09:41 +0000)]
ArmPlatformPkg: introduce LcdHwLib library class
Add the declaration and include file for the new LcdHwLib library class,
which will allow us to abstract away from platform variations in the
LCD graphics output driver.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
[ardb: add NULL implementation as well and add it to ArmPlatformPkg.dsc] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Laszlo Ersek [Tue, 12 Dec 2017 11:14:35 +0000 (12:14 +0100)]
MdeModulePkg/PiSmmCore: fix GCC build error
> MdeModulePkg/Core/PiSmmCore/PiSmmCore.c: In function
> 'SmmReadyToBootHandler':
> MdeModulePkg/Core/PiSmmCore/PiSmmCore.c:323:14: error: passing argument
> 3 of 'SmmLocateProtocol' from incompatible pointer type [-Werror]
> );
> ^
> In file included from MdeModulePkg/Core/PiSmmCore/PiSmmCore.c:15:0:
> MdeModulePkg/Core/PiSmmCore/PiSmmCore.h:586:1: note: expected 'void **'
> but argument is of type 'struct EFI_SMM_SX_DISPATCH2_PROTOCOL **'
> SmmLocateProtocol (
> ^
> cc1: all warnings being treated as errors
Cc: Eric Dong <eric.dong@intel.com> Cc: Star Zeng <star.zeng@intel.com> Fixes: 7b9b55b2ef7be13608605dc58a54b9ca04be4e40
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
When UEFI receives ICMP echo packets it will enter Ip4IcmpReplyEcho
function, and then call Ip4Output. However, if Ip4Output gets some
error and exits early, e.g. fails to find the route entry, memory
buffer of "Data" gets no chance to be freed and memory leak will be
caused. If there is such an attacker in the network, we will see UEFI
runs out of memory and system hangs.
So we explicitly free the memory when error status is returned.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Junbiao Hong <hongjunbiao@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Jiaxin Wu [Fri, 17 Nov 2017 03:09:01 +0000 (11:09 +0800)]
NetworkPkg/DnsDxe: Avoid to access the freed memory buffer.
The HostNameToIp() is a asynchronous function, so the caller
may free the HostName buffer immediately once HostNameToIp()
is returned. Then DNS driver may access the freed memory buffer
later.
This patch is to fix above issue.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wang Fan <fan.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Jiaxin Wu [Fri, 1 Dec 2017 08:30:18 +0000 (16:30 +0800)]
NetworkPkg/DnsDxe: Fix the potential memory leak issue.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wang Fan <fan.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Jiaxin Wu [Thu, 16 Nov 2017 06:28:33 +0000 (14:28 +0800)]
NetworkPkg/DnsDxe: Update RetryCount/RetryInterval to comply with UEFI spec.
According to UEFI spec:
"Retry number if no response received after RetryInterval. If zero, use
the parameter configured through Dns.Configure() interface."
"Minimum interval of retry is 2 second. If the retry interval is less
than 2 second, then use the 2 second. If zero, use the parameter configured
through Dns.Configure() interface."
For both DNS.HostNameToIp and DNS.GeneralLookUp, the value of RetryCount /
RetryInterval need to be updated to comply with UEFI spec.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wang Fan <fan.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Jiaxin Wu [Thu, 16 Nov 2017 01:03:08 +0000 (09:03 +0800)]
NetworkPkg/DnsDxe: Remove the unnecessary if condition check in DNS.Config
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wang Fan <fan.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Fu Siyuan [Tue, 5 Dec 2017 06:10:40 +0000 (14:10 +0800)]
MdeModulePkg/TcpIoLib: Check input Timeout before calling CheckEvent() service.
For TcpIoConnect() and TcpIoAccept(), this patch adds the check for Timeout event
before calling CheckEvent() service so as to avoid the unnecessary function call.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
Jian J Wang [Tue, 12 Dec 2017 01:16:35 +0000 (09:16 +0800)]
UefiCpuPkg/CpuDxe: Enable protection for newly added page table
One of the functionalities of CpuDxe is to update memory paging attributes.
If page table protection is applied, it must be disabled temporarily before
any attributes update and enabled again afterwards.
This patch makes use of the same way as DxeIpl to allocate page table memory
from reserved memory pool, which helps to reduce potential "split" operation
and recursive calling of SetMemorySpaceAttributes().
Laszlo (lersek@redhat.com) did a regression test on QEMU virtual platform with
one middle version of this series patch. The details can be found at
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Jian J Wang [Tue, 28 Nov 2017 13:49:31 +0000 (21:49 +0800)]
MdeModulePkg/DxeIpl: Mark page table as read-only
This patch will set the memory pages used for page table as read-only
memory after the paging is setup. CR0.WP must set to let it take into
effect.
A simple page table memory management mechanism, page table pool concept,
is introduced to simplify the page table memory allocation and protection.
It will also help to reduce the potential recursive "split" action during
updating memory paging attributes.
The basic idea is to allocate a bunch of continuous pages of memory in
advance as one or more page table pools, and all future page tables
consumption will happen in those pool instead of system memory. If the page
pool is reserved at the boundary of 2MB page and with same size of 2MB page,
there's no page granularity "split" operation will be needed, because the
memory of new page tables (if needed) will be usually in the same page as
target page table you're working on.
And since we have centralized page tables (a few 2MB pages), it's easier
to protect them by changing their attributes to be read-only once and for
all. There's no need to apply the protection for new page tables any more
as long as the pool has free pages available.
Once current page table pool has been used up, one can allocate another 2MB
memory pool and just set this new 2MB memory block to be read-only instead of
setting the new page tables one page by one page.
Two new PCDs PcdPageTablePoolUnitSize and PcdPageTablePoolAlignment are used
to specify the size and alignment for page table pool. For IA32 processor
0x200000 (2MB) is the only choice for both of them to meet the requirement of
page table pool.
Laszlo (lersek@redhat.com) did a regression test on QEMU virtual platform with
one middle version of this series patch. The details can be found at
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Star Zeng [Mon, 11 Dec 2017 06:45:51 +0000 (14:45 +0800)]
MdeModulePkg: Correct function description for AllocateBuffer
DUAL_ADDRESS_CYCLE is missing in the EFI_UNSUPPORTED
return status description.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Star Zeng [Mon, 11 Dec 2017 06:42:26 +0000 (14:42 +0800)]
MdePkg PciIo.h: Correct function description for ALLOCATE_BUFFER
DUAL_ADDRESS_CYCLE is missing in the EFI_UNSUPPORTED
return status description.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Ard Biesheuvel [Fri, 8 Dec 2017 15:48:14 +0000 (15:48 +0000)]
MdePkg/Uefi ARM: only support native ARM/Thumb images
The ARM calling convention is fundamentally incompatible with EBC,
and having a cross compatible machine type identical to the native
type does not make a lot of sense either. So restrict the compatible
machine type for ARM to EFI_IMAGE_MACHINE_ARMTHUMB_MIXED, and remove
the cross compatible.
Move ClearFirst4KPage/IsNullDetectionEnabled definition from DxeIpl.h to
VirtualMemory.h as they are implemented in VirtualMemory.c and only used
in IA32/X64 ARCH.
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Ruiyu Ni [Thu, 7 Dec 2017 02:48:04 +0000 (10:48 +0800)]
UefiCpuPkg/MtrrLib: Correct debug message
When printing the ascii format of memory attribute in debug message,
%s was used, but %a should be used.
The patch additionally changes %x to %r for EFI_STATUS.
The whole patch doesn't impact functionality of the MtrrLib.
Just debug message fix.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Cc: Ming Shao <ming.shao@intel.com>
Zhang, Chao B [Fri, 4 Aug 2017 06:48:52 +0000 (14:48 +0800)]
SecurityPkg:Tcg2Smm:Enabling TPM SIRQ interrupt support
1. Report TPM SIRQ interrupt resource through _CRS
2. Expose _SRS to update interrupt resource & FIFO/TIS interrupt related registers
defined in TCG PC Client Platform TPM Profile (PTP) Specification spec
https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-TPM-Profile-for-TPM-2-0-v43-150126.pdf
Note: IHV/OEM need to carefully verify this feature with OS TPM driver to make sure there is no impact to system/HW
Cc: Long Qin <qin.long@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
Ruiyu Ni [Thu, 7 Dec 2017 09:54:41 +0000 (17:54 +0800)]
MdeModulePkg/ScsiDisk: Return EFI_NO_MEDIA when no media presents
Current code always return EFI_MEDIA_CHANGED no matter the media
is removed from CD/DVD drive or the media is changed.
It doesn't strictly follow the UEFI Spec.
Update code to return EFI_NO_MEDIA when media is removed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Ard Biesheuvel [Fri, 8 Dec 2017 14:55:22 +0000 (14:55 +0000)]
ArmPkg/PlatformBootManagerLib: print firmware version to console
If gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString is set to
a non-empty string, print it to the console at boot. Note that this
is independent of DEBUG/RELEASE or graphical vs serial console,
although we do attempt to stay clear of the logo and progress bar
in graphical mode, by printing it top center.
Ard Biesheuvel [Tue, 5 Dec 2017 10:10:47 +0000 (10:10 +0000)]
ArmPlatformPkg: add package .DSC file
Now that we have removed all the cruft from ArmPlatformPkg, add a .DSC
file that builds all the remaining components standalone, i.e., outside
of the context of any particular platform. This is primarily intended
for build time testing.
Ard Biesheuvel [Tue, 5 Dec 2017 10:09:59 +0000 (10:09 +0000)]
ArmPlatformPkg: add Null implementation of NorFlashPlatformLib
In order to be able to build ArmPlatformPkg components outside of
the context of a particular platform, add Null implementation of
NorFlashPlatformLib.
Ard Biesheuvel [Tue, 5 Dec 2017 10:04:47 +0000 (10:04 +0000)]
ArmPlatformPkg/PrePeiCoreMPCore: use a unique GUID
PrePeiCoreMPCore reuses the GUID of its unicore sibling, which is
usually fine, given that platforms never include both. However, it
prevents us from creating a package .DSC that does include both, so
update the GUID to a fresh one.
ArmPlatformLibNullSec is built from a secondary .inf that omits
ArmPlatformLibNullMem.c from the [Sources] section so the library
can be used in a SEC context. This is slightly dodgy, given that
the resulting library is incomplete. Let's just remove this version,
since it isn't used anywhere anyway.
Ard Biesheuvel [Mon, 4 Dec 2017 21:57:55 +0000 (21:57 +0000)]
ArmPlatformPkg/LcdGraphicsOutputDxe: move headers into driver directory
The HdLcd.h and PL111Lcd.h header files are internal headers that should
not be used by other drivers. So move them from Include/Drivers into the
driver directory instead.
Ard Biesheuvel [Wed, 15 Nov 2017 14:27:49 +0000 (14:27 +0000)]
ArmPlatformPkg: remove ArmPlatformSysConfigLib library class
The only remaining user of ArmPlatformSysConfigLib has absorbed this
definition into its own edk2-platforms package, so let's remove it from
the shared code.
Ard Biesheuvel [Thu, 7 Dec 2017 08:53:03 +0000 (08:53 +0000)]
BaseTool/tools_def GCC5: enable optimization for ARM/AARCH64 DEBUG builds
Enable optimization for DEBUG builds, to make it more usable in terms of
performance, and to give more coverage to the LTO builds. Also, some
diagnostics are only enabled when optimization is enabled.
NOOPT builds can now also be created, which will retain the behavior DEBUG
builds had previously.
Note that this aligns ARM and AARCH64 with the x86 architectures, which
already use optimization for DEBUG builds.
In order to preserve existing behavior for users of older toolchains,
keep GCC49 and older as-is.
Commit 8b6366f87584 ("BaseTools/GCC: set -Wno-unused-const-variable
on RELEASE builds") suppresses warnings about unused constant
variables in RELEASE builds when building with GCC, given that they
break the build under our warnings-as-errors policy.
Ard Biesheuvel [Wed, 6 Dec 2017 11:30:05 +0000 (11:30 +0000)]
BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.
In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them needlessly slow. Instead, let's add a NOOPT flavor as
well, and enable optimization for DEBUG like the other architectures
do. (Note that this will require some trivial changes to the platform
description files)
Leif Lindholm [Tue, 5 Dec 2017 16:10:15 +0000 (16:10 +0000)]
BaseTools: align ERROR/WARNING/RETURN macros with MdePkg versions
BaseTools' BaseTypes.h defined the ENCODE_ERROR macro as
#define ENCODE_ERROR(a) ((RETURN_STATUS)(MAX_BIT | (a)))
whereas MdePkg defines it as
#define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT | (StatusCode)))
When building with GCC 6.3 (at least) the former triggers
"error: overflow in implicit constant conversion [-Werror=overflow]"
Resolve this by aligning it with the latter one.
This also requires aligning the BaseTools typedef of RETURN_STATUS with
the MdePkg one: INTN -> UINTN.
While at it, update adjacent ENCODE_WARNING and RETURN_ERROR as well.
Add an explicit initialization of *Alignment to 0 in GenFfs.c
GetAlignmentFromFile to get rid of a warning occuring with GCC after
this change (-Werror=maybe-uninitialized).
Jian J Wang [Thu, 7 Dec 2017 12:17:49 +0000 (20:17 +0800)]
MdeModulePkg/DxeIpl: Enable paging for Stack Guard
Stack guard feature makes use of paging mechanism to monitor if there's a
stack overflow occurred during boot.
This patch will check setting of PCD PcdCpuStackGuard. If it's TRUE, DxeIpl
will setup page table and set the page at which the stack base locates to be
NOT PRESENT. If stack is used up and memory access cross into the last page
of it, #PF exception will be triggered.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com
Jian J Wang [Thu, 7 Dec 2017 12:17:32 +0000 (20:17 +0800)]
MdeModulePkg/Core/Dxe: Call new API InitializeCpuExceptionHandlersEx instead
Original API InitializeCpuExceptionHandlers is used in DxeMain to initialize
exception handlers but it does not support setting up stack switch required
by Stack Guard feature. Using the new API instead to make sure Stack Guard
feature is applicable to most part of code.
Since this API is called before memory service initialization, there's no
way to call AllocateXxx API to reserve memory. Global variables are used
for this special case. GDT table is reserved at least 2KB which should be
big enough for all current use cases.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com
Jian J Wang [Thu, 7 Dec 2017 12:17:05 +0000 (20:17 +0800)]
UefiCpuPkg/CpuDxe: Initialize stack switch for MP
In current MP implementation, BSP and AP shares the same exception
configuration. Stack switch required by Stack Guard feature needs that BSP
and AP have their own configuration. This patch adds code to ask BSP and AP
to do exception handler initialization separately.
Since AP is not supposed to do memory allocation, all memory needed to
setup stack switch will be reserved in BSP and pass to AP via new API
EFI_STATUS
EFIAPI
InitializeCpuExceptionHandlersEx (
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL,
IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
);
Following two new PCDs are introduced to configure how to setup new stack
for specified exception handlers.
Jian J Wang [Thu, 7 Dec 2017 12:16:29 +0000 (20:16 +0800)]
UefiCpuPkg/MpLib: Add GDTR, IDTR and TR in saved AP data
In current implementation of CPU MP service, AP is initialized with data
copied from BSP. Stack switch required by Stack Guard feature needs different
GDT, IDT table and task gates for each logic processor. This patch adds GDTR,
IDTR and TR into structure CPU_VOLATILE_REGISTERS and related code in save
and restore methods. This can make sure that any changes to GDT, IDT and task
gate for an AP will be kept from overwritten by BSP settings.
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com
Jian J Wang [Thu, 7 Dec 2017 12:16:04 +0000 (20:16 +0800)]
ArmPkg/ArmExceptionLib: Add implementation of new API
This patch add implementation of following new API introduced into
CpuExceptionHandlerLib. Since this lib hasn't support Stack Guard
and stack switch, the new method just calls original
InitializeCpuExceptionHandlers.
EFI_STATUS
EFIAPI
InitializeCpuExceptionHandlersEx (
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL,
IN CPU_EXCEPTION_INIT_DATA *InitDataEx OPTIONAL
);
Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Jian J Wang [Thu, 7 Dec 2017 12:15:12 +0000 (20:15 +0800)]
UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com
Jian J Wang [Thu, 7 Dec 2017 12:14:10 +0000 (20:14 +0800)]
MdeModulePkg/CpuExceptionHandlerLib.h: Add a new API InitializeCpuExceptionHandlersEx
A new API InitializeCpuExceptionHandlersEx() is introduced to support
initializing exception handlers with extra functionalities which need
extra init data, such as stack switch for Stack Guard feature.
EFI_STATUS
EFIAPI
InitializeCpuExceptionHandlersEx (
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL,
IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
);
By default, this method should include all functionalities implemented by
InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
This is could be done by calling InitializeCpuExceptionHandlers() directly
in this method besides the extra works.
InitData is optional and its use and content are processor arch dependent.
The typical usage of it is to convey resources which have to be reserved
elsewhere and are necessary for the extra initialization of exception.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com
PcdCpuStackSwitchExceptionList is used to specify which exception will
have separate stack for its handler. For Stack Guard feature, #PF must
be specified at least.
PcdCpuKnownGoodStackSize is used to specify the size of knwon good stack for an
exception handler. Cpu driver or other drivers should use this PCD to reserve
new stack memory for exceptions specified by above PCD.
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com