Yunhua Feng [Wed, 7 Feb 2018 13:37:26 +0000 (21:37 +0800)]
BaseTools: Update Expression.py for string comparison and MACRO replace issue
1. Fix string comparison incorrect issue, we expected "ABC" is greater than
"AAD" since the second char 'B' is greater than 'A'.
2. fix MACRO not replace issue.
Laszlo Ersek [Tue, 6 Feb 2018 21:18:36 +0000 (22:18 +0100)]
OvmfPkg/PlatformPei: sync AmdSevInitialize() definition with declaration
"Platform.h" declares the AmdSevInitialize() function without EFIAPI, but
the definition in "AmdSev.c" includes EFIAPI.
GCC toolchains without LTO do not catch this error because "AmdSev.c" does
not include "Platform.h"; i.e. the declaration used by callers such as
"Platform.c" is not actually matched against the function definition at
build time.
With LTO enabled, the mismatch is found -- however, as a warning only, due
to commit f8d0b9662993 ("BaseTools GCC5: disable warnings-as-errors for
now", 2016-08-03).
Include the header in the C file (which turns the issue into a hard build
error on all GCC toolchains), plus sync the declaration from the header
file to the C file.
There's been no functional breakage because AmdSevInitialize() takes no
parameters.
Laszlo Ersek [Tue, 6 Feb 2018 21:08:07 +0000 (22:08 +0100)]
ShellPkg/UefiShellDebug1CommandsLib: sync Compress() definition with decl.
"Compress.h" declares the Compress() function as EFIAPI, but the
definition in "Compress.c" lacks EFIAPI.
GCC toolchains without LTO do not catch this error because "Compress.c"
does not include "Compress.h"; i.e. the declaration used by callers such
as "EfiCompress.c" is not actually matched against the function definition
at build time.
With LTO enabled, the mismatch is found -- however, as a warning only, due
to commit f8d0b9662993 ("BaseTools GCC5: disable warnings-as-errors for
now", 2016-08-03).
Include the header in the C file (which turns the issue into a hard build
error on all GCC toolchains), plus sync the declaration from the header
file to the C file. Finally, remove EFIAPI from both declaration and
definition -- this was the original intent of commit c4e74e9b814c
("ShellPkg/UefiShellDebug1CommandsLib: Remove unnecessary EFIAPI",
2016-10-09), but it missed the header file.
(Gary meant to address that omission in Oct 2017:
[edk2] [PATCH] ShellPkg/UefiShellDebug1CommandsLib: Remove EFIAPI from
Compress()
Yonghong Zhu [Wed, 7 Feb 2018 01:17:08 +0000 (09:17 +0800)]
BaseTools: Enhance error handling for unsupported toolchain Flags/Path
Case1: Cover the Tool PATH is not exist, eg: build MdeModule under GCC5
toolchain and IPF arch.
Case2: Cover the Tool FLAGS is not exist, eg: build OvmfPkg under
CLANG35 toolchain and X64 arch.
Zhang, Chao B [Thu, 8 Feb 2018 06:22:39 +0000 (14:22 +0800)]
SecurityPkg: Tcg2Smm: Refine type cast in pointer abstraction
Pointer subtraction is not performed by pointers to elements of the same
array object. Such behavior is undefined by C11 standard and might lead to
potential issues, Refine pointer subtraction by first casting each pointer
to UINTN.
Ruiyu Ni [Tue, 6 Feb 2018 07:26:41 +0000 (15:26 +0800)]
UefiCpuPkg/FeaturesLib: Fix Haswell CPU hang with 50% throttling
Today's implementation only assumes SandyBridge CPU supports
Extended On-Demand Clock Modulation Duty Cycle.
Actually it is supported when CPUID.06h.EAX[5] == 1.
When platform requests 50% throttling, it causes value 1000b
set to the low-4 bits of IA32_CLOCK_MODULATION.
But the wrong code sets 1000b to bits[1-3] which causes assertion.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Dandan Bi [Wed, 17 Jan 2018 01:31:18 +0000 (09:31 +0800)]
MdeModulePkg/SmmCorePerformanceLib:Track FPDT record in SMM phase
V3:
a. Handle the case when string is empty in String Record.
b. Use gEdkiiFpdtExtendedFirmwarePerformanceGuid to report status
code.
c. Refine the code logic.
V2:
Update SmmCorePerformanceLib to report the buffer address of
boot performance records instead of records contents.
Updated to convert Pref entry to FPDT record in SMM phase and then
export records to FPDT table.
Dandan Bi [Fri, 19 Jan 2018 05:01:38 +0000 (13:01 +0800)]
MdeModulePkg/DxeCorePerformanceLib:Track FPDT record in DXE phase
V4:
a.Update the GUID for status code in DxeCorePerformanceLib and
FirmwarePerformanceDxe.
b. Add check for Insert FPDT record in DxeCorePerformanceLib
to avoid re-entry case.
V3:
a. Handle the case when string is empty in String Record.
b. refine the code logic.
V2:
Update DxecorePerformanceLib to report the boot performance table
address instead of records contents.
Updated to convert Pref entry to FPDT record in DXE phase and then
allocate boot performance table to save the record and report
the address of boot performance table to FirmwarePerformanceDxe.
Jian J Wang [Tue, 6 Feb 2018 02:08:25 +0000 (10:08 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: fix infinite loop issue in SMM profile
> v2:
> Reduce the number of page to update/restore from 3 to 2 because DF
> has no effect in this issue.
The infinite loop is caused by the memory instruction, such as
"rep mov", operating on memory block crossing boundary of NON-PRESENT
pages. Because the address triggering page fault set in CR2 will be in
the first page, SmmProfilePFHandler() will only change the first page
into PRESENT. The page following will be still in NON-PRESENT status.
Since SmmProfilePFHandler() will setup single-step trap for the
instruction causing #PF, when the handler returns back to the
instruction and re-execute it, both #DB and #PF will be triggered
because the instruction wants to access both first and second page
but only first page is PRESENT.
Normally #DB exception will be handled first and its handler will
change first page back to NON-PRESENT status. Then #PF is handled
and its handler will change first page to PRESENT status again and
setup another single-step for the instruction triggering #PF. Then
the whole system falls into an infinite loop and the memory operation
will never move on.
This patch fix above situation by always changing 2 pages to PRESENT
status instead of just 1 page. Those 2 pages include the page causing
#PF and the page after it.
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Jian J Wang [Tue, 6 Feb 2018 05:12:36 +0000 (13:12 +0800)]
MdeModulePkg/PiSmmCore: add API parameter check
The Heap Guard feature wrapped SmmInternalFreePagesEx with
SmmInternalFreePagesExWithGuard but didn't add necessary
parameter check. This patch fixes this situation.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Dandan Bi [Wed, 7 Feb 2018 01:00:17 +0000 (09:00 +0800)]
MdeModulePkg/PciBusDxe: Fix VS2012 build failure
Initialize local variable to suppress warning C4703:
potentially uninitialized local pointer variable.
Both reads (dereferences) of "PciRootBridgeIo" in
PciBusDriverBindingStart() are only reached if
"gFullEnumeration" is TRUE on entry *and* we successfully
open the EfiPciRootBridgeIoProtocol interface.
Cc: Star Zeng <star.zeng@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Feng, Bob C [Wed, 7 Feb 2018 02:01:59 +0000 (10:01 +0800)]
BaseTool: Fixed Pcd issues.
1. Check variable offset when merging Hii Pcds
2. Fixed the issue of Hii value inherit with default store.
3. Error handling for incorrect structure pcd declare.
Jiaxin Wu [Fri, 22 Dec 2017 07:01:19 +0000 (15:01 +0800)]
Nt32Pkg/Nt32Pkg.fdf: Increase the size of FLASH Device.
Currently, the FV image size is not enough for the modules after
we enable some flags defined in Nt32Pkg.dsc, e.g:
DEFINE SECURE_BOOT_ENABLE = TRUE
DEFINE TLS_ENABLE = TRUE
DEFINE NETWORK_IP6_ENABLE = TRUE
This patch is to increase the size of FLASH Device to meet the requirement.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Star Zeng [Tue, 6 Feb 2018 10:36:19 +0000 (18:36 +0800)]
IntelSiliconPkg IntelVTdPmrPei: Install IOMMU PPI for pre-memory phase
Install IOMMU PPI for pre-memory phase and return
EFI_NOT_AVAILABLE_YET to indicate that DMA protection has been enabled,
but DMA buffer are not available to be allocated yet.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Star Zeng [Fri, 26 Jan 2018 03:46:17 +0000 (11:46 +0800)]
MdeModulePkg Ppi/IoMmu.h: Add EFI_NOT_AVAILABLE_YET return status code
Install IOMMU PPI for pre-memory phase and return
EFI_NOT_AVAILABLE_YET to indicate that DMA protection has been enabled,
but DMA buffer are not available to be allocated yet.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Introduce CRT assembly replacements for __rt_sdiv, __rt_udiv,
__rt_udiv64, __rt_sdiv64, __rt_srsh (by reusing the RVCT code)
as well as memcpy and memset.
For MSFT compatibility, some of the code needs to be explicitly
forced to ARM, and the /oldit assembly flag needs to be added.
Also, while RVCT_ASM_EXPORT macro invocations have been removed,
the replacement code is designed to be as close as possible to
the one that would have been generated if using the macros.
Feng, YunhuaX [Mon, 5 Feb 2018 03:42:33 +0000 (11:42 +0800)]
BaseTools: Report error when GUID format is incorrect
Flexible GUID format of PCD value support following format, so tool should report
error when it is not correct.
1. { GUID("11E13869-1896-4A07-8B21-D8B23DD2A2B4") }
2. { GUID({ 0x11e13869, 0x1896, 0x4a07,{
0x8b, 0x21, 0xd8, 0xb2, 0x3d, 0xd2, 0xa2, 0xb4 } }) }
3. { GUID(gEfiBlockIoProtocolGuid) }
Liming Gao [Tue, 30 Jan 2018 05:33:16 +0000 (13:33 +0800)]
MdeModulePkg: Don't build VarCheckUefiLib and DxeCore for EBC arch
EBC build failure is caused by d7a09cb86a0416c099fa3a9e0fbe2c8f399b28de.
It changes MAX_UINTN and MAX_ADDRESS definition as below. VarCheckUefiLib
and DxeCore uses MAX_UINTN and MAX_ADDRESS in the global data initialization.
New style has >> operator, and not supported by EBC compiler.
The fix is not to build VarCheckUefiLib and DxeCore for EBC arch.
Liming Gao [Tue, 30 Jan 2018 05:33:31 +0000 (13:33 +0800)]
SecurityPkg: Don't build AuthVariableLib for EBC arch
EBC build failure is caused by d7a09cb86a0416c099fa3a9e0fbe2c8f399b28de.
It changes MAX_UINTN definition as below. AuthVariableLib uses MAX_UINTN
in the global data initialization. New style has >> operator, and not
supported by EBC compiler. The fix is not to build AuthVariableLib for EBC.
Ard Biesheuvel [Tue, 6 Feb 2018 11:58:12 +0000 (11:58 +0000)]
ArmPkg/Gic: force GIC driver to run before CPU arch protocol driver
Currently, the GIC driver has a static dependency on the CPU arch protocol
driver, so it can register its IRQ handler at init time. This means there
is a window between dispatch of the CPU driver and dispatch of the GIC
driver where any unexpected GIC state may trigger an interrupt which we
are not set up to handle yet. Note that this is even the case if we enter
UEFI with interrupts disabled at the CPU, given that any TPL manipulation
involving TPL_HIGH_LEVEL will unconditionally enable IRQs at the CPU side
regardless of whether they were enabled to begin with (but only as soon as
the CPU arch protocol is actually installed)
So let's reorder the GIC driver with the CPU driver, and let it run its
initialization that puts the GIC into a known state before enabling
interrupts. Move its installation of its IRQ handler to a protocol notify
callback on the CPU arch protocol so that it runs as soon as it becomes
available.
Ard Biesheuvel [Fri, 5 Jan 2018 09:24:22 +0000 (09:24 +0000)]
BaseTools/Conf: disable DTC legacy phandle format
By default, the device tree compiler emits phandle properties twice:
once called 'phandle' and again called 'linux,phandle'. Given that
Linux was updated in early 2010 [0] to accept the former (which is
what is specified in the ePAPR and device tree specifications), there
is no point in emitting both when compiling device trees for UEFI
platforms.
Ruiyu Ni [Mon, 5 Feb 2018 05:49:32 +0000 (13:49 +0800)]
ShellPkg/map: Fix out-of-bound read when "map fsn"
The below code reads additional one CHAR16 when copying
content from Specific to NewSpecific.
NewSpecific = AllocateCopyPool(
StrSize(Specific) + sizeof(CHAR16), Specific
);
The patch fixes this issue.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com>
Today's implementation of [Ascii]StrnCpyS/[Ascii]StrnCatS calls
StrnLenS () to get the length of source string but supplies the
destination buffer size as max size.
It's a bug that may cause out-of-bound memory access.
For example:
StrnCpyS (Dest[10], 10, "hello", 6)
-> StrnLenS ("hello", 10) //< cause out-of bound memory access
In a pool guard enabled environment, when using shell to edit an
existing file which contains empty line, the page fault is met.
The patch fixes the four library functions to avoid such
out-of-bound memory access.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com>
Liming Gao [Tue, 23 Jan 2018 02:24:04 +0000 (10:24 +0800)]
PcAtChipsetPkg: Add PeiAcpiTimerLib to save Frequency in HOB
In V2:
1) Update PeiAcpiTimerLib base name to PeiAcpiTimerLib
2) Update PeiAcpiTimerLib to add the missing constructor to enable ACPI IO space
3) Update DxeAcpiTimerLib to cache frequency in constructor.
PeiAcpiTimerLib caches PerformanceCounterFrequency in HOB, then Pei and Dxe
AcpiTimerLib can share the same PerformanceCounterFrequency.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
According to UEFI Spec, EFI_GRAPHICS_OUTPUT_PROTOCOL.Mode->Info->
PixelsPerScanLine may contain padding pixel elements outside the area
covered by HorizontalResolution for performance reasons or due to hardware
restrictions. CorebootPayloadPkg's FbGop driver doesn't follow this
requirement, and produces PixelsPerScanLine simply as
HorizontalResolution. This needs to be fixed to reflect the real length
of a framebuffer scanline.
Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Fu Siyuan [Fri, 2 Feb 2018 03:25:05 +0000 (11:25 +0800)]
MdeModulePkg/PXE: Add warning message for PXE if failed to read system GUID from SMBIOS.
Current PXE driver uses zero GUID if failed to get the system GUID from smbios
table, and some OS PXE boot may fail in such case. This patch is to add a warning
message to inform user that smbios table is missed on the platform.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Fu Siyuan [Fri, 2 Feb 2018 03:23:52 +0000 (11:23 +0800)]
NetworkPkg: Add warning message for PXE if failed to read system GUID from SMBIOS.
Current PXE driver uses zero GUID if failed to get the system GUID from smbios
table, and some OS PXE boot may fail in such case. This patch is to add a warning
message to inform user that smbios table is missed on the platform.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Feng, YunhuaX [Fri, 2 Feb 2018 09:01:52 +0000 (17:01 +0800)]
BaseTools: Update Expression.py for VOID* to support L'a' and 'a'
Original VOID* type support L"string" and "string" format, now we also
add support for single quote string that without null terminator.
Type VOID* support L'a' and 'a', the value transfer to c style value.
L'a' --> {0x61, 0x00}
L'ab' --> {0x61, 0x00, 0x62, 0x00}
'a' --> {0x61}
'ab' --> {0x61, 0x62}
when the value is L'' or '' that not include any character, tool will
report error.
Ruiyu Ni [Thu, 1 Feb 2018 10:14:24 +0000 (18:14 +0800)]
MdeModulePkg/SmmCore: Fix hang due to already-freed memory deference
SmiHandlerUnRegister() validates the DispatchHandle by checking
whether the first 32bit matches to a certain signature
(SMI_HANDLER_SIGNATURE).
But if a caller calls *UnRegister() twice and the memory freed by
first call still contains the signature, the second call may hang.
The patch fixes this issue by locating the DispatchHandle
in all SMI handlers, instead of checking the signature.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Feng, YunhuaX [Fri, 2 Feb 2018 02:34:24 +0000 (10:34 +0800)]
BaseTools: Fix make PcdValueCommon.c failure on GCC
error message:
PcdValueCommon.c: In function '__PcdGetPtr':
PcdValueCommon.c:315:11: error: variable 'Byte'
set but not used [-Werror=unused-but-set-variable]
UINT8 Byte;
^
cc1: all warnings being treated as errors
The solution is checking the first and/or last page of a memory block to be
marked as NX, and skipping them if they are Guard pages.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Jian J Wang [Mon, 29 Jan 2018 11:07:29 +0000 (19:07 +0800)]
MdeModulePkg/Core: fix feature conflict between NX and NULL detection
If enabled, NX memory protection feature will mark all free memory as
NX (non-executable), including page 0. This will overwrite the attributes
of page 0 if NULL pointer detection feature is also enabled and then
compromise the functionality of it. The solution is skipping the NX
attributes setting to page 0 if NULL pointer detection feature is enabled.
Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Ruiyu Ni [Fri, 19 Jan 2018 07:59:38 +0000 (15:59 +0800)]
IntelFrameworkModule/ThunkKb: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is a key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ruiyu Ni [Fri, 19 Jan 2018 07:22:53 +0000 (15:22 +0800)]
IntelFrameworkModule/Ps2Kb: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is a key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ruiyu Ni [Tue, 16 Jan 2018 08:21:42 +0000 (16:21 +0800)]
MdeModulePkg/Ps2Kb: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ruiyu Ni [Fri, 12 Jan 2018 11:29:32 +0000 (19:29 +0800)]
MdeModulePkg/UsbKb: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ruiyu Ni [Fri, 12 Jan 2018 11:26:22 +0000 (19:26 +0800)]
MdeModulePkg/ConSplitter: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Laszlo Ersek [Tue, 30 Jan 2018 14:34:08 +0000 (15:34 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: eliminate conditional jump in IA32 SmmStartup()
SMM emulation under both KVM and QEMU (TCG) crashes the guest when the
"jz" branch, added in commit d4d87596c11d ("UefiCpuPkg/PiSmmCpuDxeSmm:
Enable NXE if it's supported", 2018-01-18), is taken.
Rework the propagation of CPUID.80000001H:EDX.NX [bit 20] to IA32_EFER.NXE
[bit 11] so that no code is executed conditionally.
Cc: Eric Dong <eric.dong@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: http://mid.mail-archive.com/d6fff558-6c4f-9ca6-74a7-e7cd9d007276@redhat.com
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
[lersek@redhat.com: XD -> NX code comment updates from Ray] Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: mark QEMU/TCG as well in the commit message]
Laszlo Ersek [Tue, 30 Jan 2018 13:43:28 +0000 (14:43 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: remove unneeded DBs from IA32 SmmStartup()
The SmmStartup() executes in SMM, which is very similar to real mode. Add
"BITS 16" before it and "BITS 32" after it (just before the @32bit label).
Remove the manual 0x66 operand-size override prefixes, for selecting
32-bit operands -- the sizes of our operands trigger NASM to insert the
prefixes automatically in almost every spot. The one place where we have
to add it back manually is the LGDT instruction. (The 0x67 address-size
override prefix is also auto-generated.)
This patch causes NASM to generate byte-identical object code (determined
by disassembling both the pre-patch and post-patch versions, and comparing
the listings), except:
Laszlo Ersek [Tue, 30 Jan 2018 13:31:23 +0000 (14:31 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup()
The gSmmCr3, gSmmCr4, gSmmCr0 and gSmmJmpAddr global variables are used
for patching assembly instructions, thus we can't yet remove the DB
encodings for those instructions. At least we should add the intended
meanings in comments.
This patch only changes comments.
Cc: Eric Dong <eric.dong@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: adapt commit msg to ongoing PatchAssembly discussion]
Yonghong Zhu [Mon, 29 Jan 2018 07:49:56 +0000 (15:49 +0800)]
BaseTools: Fix the bug to align VPD PCD based on value type
Spec required for VOID* VPD Pcd, Ascii string use byte alignment, byte
array use 8-byte alignment, unicode string use 2-byte alignment.
while when the VPD pcd offset use *, the offset generated in the .map
file not follow this rule.
Star Zeng [Thu, 25 Jan 2018 03:20:04 +0000 (11:20 +0800)]
MdeModulePkg PiSmmCore: Set ForwardLink to NULL in RemoveOldEntry()
"Entry->Link.ForwardLink = NULL;" is present in RemoveMemoryMapEntry()
for DxeCore, that is correct.
"Entry->Link.ForwardLink = NULL;" is absent in RemoveOldEntry()
for PiSmmCore, that is incorrect.
Without this fix, when FromStack in Entry is TRUE,
the "InsertTailList (&mMapStack[mMapDepth].Link, &Entry->Link);" in
following calling to CoreFreeMemoryMapStack() will fail as the entry
at mMapStack[mMapDepth] actually has been removed from the list.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Ard Biesheuvel [Thu, 7 Dec 2017 22:43:22 +0000 (22:43 +0000)]
MdeModulePkg/SdMmcPciHcDxe: allow HC capabilities to be overridden
Invoke the newly introduced SD/MMC override protocol to override
the capabilities register after reading it from the device registers,
and to call the pre/post host init and reset hooks at the appropriate
times.
Ard Biesheuvel [Thu, 7 Dec 2017 22:43:21 +0000 (22:43 +0000)]
MdeModulePkg: introduce SD/MMC override protocol
Many ARM based SoCs have integrated SDHCI controllers, and often,
these implementations deviate in subtle ways from the pertinent
specifications. On the one hand, these deviations are quite easy
to work around, but on the other hand, having a collection of SoC
specific workarounds in the generic driver stack is undesirable.
So let's introduce an optional SD/MMC override protocol that we
can invoke at the appropriate moments in the device initialization.
That way, the workaround itself remains platform specific, but we
can still use the generic driver stack on such platforms.
Arthur Heymans [Wed, 24 Jan 2018 10:57:36 +0000 (18:57 +0800)]
CorebootPayloadPkg: Use correct BytesPerScanLine
Fetch BytesPerScanLine from coreboot table to reflect how the actual
framebuffer is set up instead of guessing it from the horizontal
resolution.
This fixes a garbled display when HorizontalResolution * (BitsPerPixel
/ 8) and pFbInfo->BytesPerScanLine don't match.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Benjamin You <benjamin.you@intel.com>
projects / mirror_edk2.git / log