Laszlo Ersek [Wed, 30 Nov 2016 19:19:06 +0000 (20:19 +0100)]
MdeModulePkg: S3SaveStateDxe, SmmS3SaveState: save 64-bit LoopTimes
The BootScriptWriteMemPoll() helper function in both drivers does the
following:
- pop Delay from the variable argument list as UINT64, then truncate it to
UINTN,
- divide Delay by 10, using DivU64x32Remainder(), then store the quotient
in LoopTimes (also UINTN),
- pass LoopTimes to S3BootScriptSaveMemPoll() as last argument.
The truncation to UINTN is superfluous and wrong in this logic (not to
mention incompatible with the PI spec); it prevents callers from
specifying Delays longer than 0xFFFF_FFFF * 100ns (approximately 429
seconds == 7 minutes 9 seconds) on Ia32. In particular it prevents callers
from specifying an infinite timeout (for example, 0xFFFF_FFFF_FFFF_FFFF *
100ns, approximately 58494 years).
Change the type of Delay and LoopTimes to UINT64. Keep the same logic,
just remove the truncations. The resultant LoopTimes values can be safely
passed to S3BootScriptSaveMemPoll() thanks to the previous patch.
The BaseNull instance of S3BootScriptLib obviously doesn't care about the
type of the S3BootScriptSaveMemPoll() function's LoopTimes parameter; this
lib instance doesn't do anything with the parameters received in
S3BootScriptSaveMemPoll().
The PiDxe instance saves the LoopTimes parameter in
EFI_BOOT_SCRIPT_MEM_POLL.LoopTimes. This target field already has UINT64
type. Furthermore, the BootScriptExecuteMemPoll() function in the same
library instance already uses a local UINT64 variable called LoopTimes to
count up to EFI_BOOT_SCRIPT_MEM_POLL.LoopTimes. This means that the the
UINTN type for S3BootScriptSaveMemPoll()'s LoopTimes parameter is an
unnecessary restriction.
The callers of S3BootScriptSaveMemPoll() will be updated in the next
patches, functionally. At this stage, they will continue to compile, since
UINT64 parameters can accept UINTN arguments.
Cc: Feng Tian <feng.tian@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
For the following APIs in PrintLib instance
MdeModulePkg\Library\DxePrintLibPrint2Protocol:
UnicodeVSPrint
UnicodeSPrint
UnicodeVSPrintAsciiFormat
UnicodeSPrintAsciiFormat
AsciiVSPrint
AsciiSPrint
AsciiVSPrintUnicodeFormat
AsciiSPrintUnicodeFormat
The internal function DxePrintLibPrint2ProtocolVaListToBaseList() will be
called to convert a VA_LIST to a BASE_LIST. However, those APIs miss
checking the return value of the internal function.
This commit adds codes to check the return value. If the VA_LIST fails to
be converted to a BASE_LIST, those PrintLib APIs will return 0 and leave
the output 'StartOfBuffer' unmodified.
Yonghong Zhu [Tue, 27 Dec 2016 09:52:12 +0000 (17:52 +0800)]
BaseTools: Fix the bug for RAW file alignment value support
Fix the bug for RAW file to support Align=32 and Align=64. Current FDF
spec FfsAlignmentValues support this two values, while it is not the
valid value for GenFfs. So this patch add the logic to handle it.
chanuei [Tue, 18 Oct 2016 02:45:02 +0000 (10:45 +0800)]
Nt32Pkg SecMain: Update SecMain.inf to support VS2015x86 X64 Mode
In V2:
Add the specific LIB path in IA32 LINK path.
Update SecMain.inf to support VS2015x86 X64 Mode Build.
After this change, X64 Native Tools Command Prompt is not
required to be trig. NT32 IA32 and X64 can be built in the same
environment. It simplifies NT32 X64 build. New build command:
edksetup.bat --nt32
build -p Nt32Pkg\Nt32Pkg.dsc -a X64 # for 64
build -p Nt32Pkg\Nt32Pkg.dsc -a IA32 # for 32
Ruiyu Ni [Wed, 21 Dec 2016 08:04:19 +0000 (16:04 +0800)]
ShellPkg/cd: Fix "cd" to support "fs0:dir" (no slash after ':')
When "fs0:dir"(drive letter without slash) is used as destination
of "cd", "cd" tries to change to "dir" in root directory of "fs0:".
It's incorrect. The correct behavior is to change to "dir" in
current directory of "fs0:"
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Jeff Fan [Mon, 26 Dec 2016 08:52:48 +0000 (16:52 +0800)]
UefiCpuPkg/MpInitLib: Move save/restore interrupt to SwitchBSPWorker()
During switching BSP phase, we need to disable CPU interruput to prevent stack
crashed by Timer interrupt handle. But when we enabled source debugging feature,
debug timer interrupt handler (existing on both PEI and DXE) also could crash
the stack used during switching BSP. So,we need to move save/restore interrupt
to SwitchBSPWorker().
Cc: Feng Tian <feng.tian@intel.com> Cc: Kinney Michael D <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
Jeff Fan [Mon, 26 Dec 2016 08:44:24 +0000 (16:44 +0800)]
UefiCpuPkg/MpInitLib: Sync BSP's local APIC timer settings to APs
If APs are waken up by INIT-SIPI-SIPI command, they will lose original local
APIC timer setting. As a result, the timer library instance based on local APIC
timer cannot work on APs function.
This fix is to save BSP's local APIC timer settings before waking up APs and
to sync to APs when APs wakeup by INIT-SIPI-SIPI command.
Setting BSP's current counter to AP's initial counter could make sure BSP and
APs have same counter value across BSP switching.
Cc: Feng Tian <feng.tian@intel.com> Cc: Kinney Michael D <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
Jeff Fan [Mon, 26 Dec 2016 08:28:58 +0000 (16:28 +0800)]
UefiCpuPkg/DxeMpInitLib: Support source debugging on AP function
The current DxeDebugAgentLib supports source debugging on AP function. This
update is to update DxeMpInitLib to consume Debug Agent Library by
DEBUG_AGENT_INIT_DXE_AP flag. Thus, we could source debugging AP function
invoked by CPU MP Protocol.
However, current SecPeiDebugAgentLib does not support source debugging on AP
function invoked by CPU MP PPI. I have submitted one bugzilla to add this
support at https://bugzilla.tianocore.org/show_bug.cgi?id=308.
Cc: Feng Tian <feng.tian@intel.com> Cc: Kinney Michael D <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
Jiewen Yao [Tue, 27 Dec 2016 06:21:16 +0000 (14:21 +0800)]
UefiCpuPkg/MicrocodeUpdate: Add MP support.
Support the case that BSP and AP are using different Microcode.
The previous logic validates new MCU on BSP only.
The enhanced logic will validate MCU on every BSP and AP.
As long as one processor loads the MCU successfully, it will be updated.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
The patch updated MicrocodeWrite() to move the Microcode replacement logic
to a standalone function - UpdateMicrocodeFlashRegion().
More detail description is added in UpdateMicrocodeFlashRegion()
to improve readability.
The Microcode information is collected in InitializeMicrocodeDescriptor(),
so that FmpGetImage() can get the info directly.
MicrocodeRead() is not needed any more.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Star Zeng [Fri, 16 Dec 2016 10:07:43 +0000 (18:07 +0800)]
IntelFrameworkModulePkg KbDxe: Execute key notify func at TPL_CALLBACK
Current implementation executes key notify function in TimerHandler
at TPL_NOTIFY. The code change is to make key notify function
executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY.
The code will signal KeyNotify process event if the key pressed
matches any key registered and insert the KeyData to the EFI Key
queue for notify, then the KeyNotify process handler will invoke
key notify functions at TPL_CALLBACK.
Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Star Zeng [Fri, 16 Dec 2016 10:07:12 +0000 (18:07 +0800)]
IntelFrameworkModulePkg Ps2KbDxe: Execute key notify func at TPL_CALLBACK
Current implementation executes key notify function in TimerHandler
at TPL_NOTIFY. The code change is to make key notify function
executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY.
The code will signal KeyNotify process event if the key pressed
matches any key registered and insert the KeyData to the EFI Key
queue for notify, then the KeyNotify process handler will invoke
key notify functions at TPL_CALLBACK.
Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Star Zeng [Fri, 16 Dec 2016 10:08:18 +0000 (18:08 +0800)]
MdeModulePkg Ps2KbDxe: Execute key notify func at TPL_CALLBACK
Current implementation executes key notify function in TimerHandler
at TPL_NOTIFY. The code change is to make key notify function
executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY.
The code will signal KeyNotify process event if the key pressed
matches any key registered and insert the KeyData to the EFI Key
queue for notify, then the KeyNotify process handler will invoke
key notify functions at TPL_CALLBACK.
Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Star Zeng [Mon, 19 Dec 2016 14:21:11 +0000 (22:21 +0800)]
MdeModulePkg TerminalDxe: Execute key notify func at TPL_CALLBACK
Current implementation executes key notify function in TimerHandler
at TPL_NOTIFY. The code change is to make key notify function
executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY.
The code will signal KeyNotify process event if the key pressed
matches any key registered and insert the KeyData to the EFI Key
queue for notify, then the KeyNotify process handler will invoke
key notify functions at TPL_CALLBACK.
Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Star Zeng [Fri, 16 Dec 2016 09:16:22 +0000 (17:16 +0800)]
MdeModulePkg UsbKbDxe: Execute key notify func at TPL_CALLBACK
Current implementation executes key notify function in TimerHandler
at TPL_NOTIFY. The code change is to make key notify function
executed at TPL_CALLBACK to reduce the time occupied at TPL_NOTIFY.
The code will signal KeyNotify process event if the key pressed
matches any key registered and insert the KeyData to the EFI Key
queue for notify, then the KeyNotify process handler will invoke
key notify functions at TPL_CALLBACK.
Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Star Zeng [Fri, 15 Apr 2016 09:38:51 +0000 (17:38 +0800)]
MdeModulePkg ConSplitterDxe: Support toggle state sync
Register key notify for toggle state (CapsLock, NumLock and ScrollLock)
sync between multiple keyboards.
The implementation for this feature requires keyboard driver supports
EFI_KEY_STATE_EXPOSED, and turns on physical TextInEx partial key
report for toggle state sync.
The virtual TextInEx will report the partial key after it is required
by calling SetState(X | KEY_STATE_VALID_EXPOSED) explicitly.
Cc: Ruiyu Ni <Ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Jiaxin Wu [Fri, 23 Dec 2016 08:39:45 +0000 (16:39 +0800)]
Nt32Pkg/Nt32Pkg.dsc: Change TLS_ENABLE flag to FALSE by default
TLS feature highly depends on the OpenSSL building. To avoid
the default Nt32 platform build failure, we should change the
default value of TLS_ENABLE to FALSE.
The notes are also provided for Secure Boot and TLS features.
Cc: Ni Ruiyu <ruiyu.ni@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Long Qin <qin.long@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
Jiewen Yao [Fri, 23 Dec 2016 15:22:30 +0000 (23:22 +0800)]
MdeModulePkg/CapsuleLib: Follow UEFI 22.2.3 to process FMP.
Previous logic does not follow UEFI 22.2.3 to process FMP strictly.
It may cause FMP image not be processed in some corner case.
The updated logic follows UEFI 22.2.3.
The way to check if a capsule is processed is also simplified.
The function - ProcessFmpCapsuleImage() is too big, so that
we created sub-functions - StartFmpImage(), DumpAllFmpInfo(),
GetFmpHandleBufferByType(), SetFmpImageData(), RecordFmpCapsuleStatus()
to improve the readability.
The function - ProcessTheseCapsules() is too big, so that
we created sub-functions - InitCapsulePtr(), AreAllImagesProcessed(),
PopulateCapsuleInConfigurationTable() to improve the readability.
Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Jiaxin Wu [Wed, 14 Dec 2016 02:57:41 +0000 (10:57 +0800)]
NetworkPkg/HttpDxe: HTTPS support over IPv4 and IPv6
This patch is used to enable HTTPS feature. HttpDxe driver
will consume TlsDxe driver. It can both support http and https
feature, that’s depended on the information of URL, the HTTP
instance can be able to determine whether to use http or https.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Zhang Lubo <lubo.zhang@intel.com> Cc: Long Qin <qin.long@intel.com> Cc: Thomas Palmer <thomas.palmer@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
Jiaxin Wu [Wed, 14 Dec 2016 02:54:32 +0000 (10:54 +0800)]
NetworkPkg/TlsAuthConfigDxe: Provide the UI to support TLS auth configuration
This patch provides the UI to support TLS auth configuration.
* EFI_SIGNATURE_LIST format is used for 'TlsCaCertificate'
variable. So, TLS supports multiple certificate configuration.
* The variable attribute is BS with NV, which only target at
preventing runtime phase attack.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Zhang Lubo <lubo.zhang@intel.com> Cc: Long Qin <qin.long@intel.com> Cc: Thomas Palmer <thomas.palmer@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
Jiaxin Wu [Wed, 14 Dec 2016 02:34:57 +0000 (10:34 +0800)]
CryptoPkg: Add new TlsLib library
v2:
* Code refine and Typo fix:
TlsHandeAlert -> TlsHandleAlert
This patch is used to add new TlsLib library, which is wrapped
over OpenSSL. The implementation provides TLS library functions
for EFI TLS protocol and EFI TLS Configuration Protocol.
Cc: Ye Ting <ting.ye@intel.com> Cc: Long Qin <qin.long@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Zhang Lubo <lubo.zhang@intel.com> Cc: Thomas Palmer <thomas.palmer@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Qin Long <qin.long@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
Jiaxin Wu [Wed, 14 Dec 2016 02:21:16 +0000 (10:21 +0800)]
MdePkg: Add a header to standardize TLS definitions
This path is used to standardize TLS definitions from related
RFCs. Including TLS Cipher Suites, TLS Version, TLS Content Type
and TLS Record Header, etc.
Cc: Long Qin <qin.long@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Zhang Lubo <lubo.zhang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Thomas Palmer <thomas.palmer@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Qin Long <qin.long@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
Jiaxin Wu [Wed, 14 Dec 2016 02:19:19 +0000 (10:19 +0800)]
MdePkg: Add TLS related protocol definition
This patch is used to add Tls.h and TlsConfig.h header
files to define EFI TLS Configuration Protocol,
EFI TLS Service Binding Protocol and
EFI TLS Configuration Protocol.
Cc: Long Qin <qin.long@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Zhang Lubo <lubo.zhang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Thomas Palmer <thomas.palmer@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Qin Long <qin.long@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
This commit refines the logic for HttpBootUintnToAscDecWithFormat and
PxeBcUintnToAscDecWithFormat. It avoids using the decrement operator '--'
for array index to prevent possible mis-reports by static code checkers.
Hao Wu [Tue, 15 Nov 2016 08:12:30 +0000 (16:12 +0800)]
MdeModulePkg/UefiPxeBcDxe: Refine the CvtNum function logic
This commit refines the logic for the CvtNum function. It avoids using the
decrement operator '--' for array index to prevent possible mis-reports by
static code checkers.
Hao Wu [Tue, 15 Nov 2016 07:39:44 +0000 (15:39 +0800)]
MdeModulePkg/DxeNetLib: Rewrite NetblockChecksum function logic
This commit rewrites the logic for NetblockChecksum. It processes the
checksum of the left-over byte first to prevent possible mis-reports by
static code checkers.
This commit refines the logic for InternalMemSetMem16|32|64 functions. It
avoids using the decrement operator '--' for array index to prevent
possible mis-reports by static code checkers.
Please note that those modified functions are only consumed within
MemoryLib by APIs SetMem16|32|64, and those APIs will handle the case when
the input number of bytes to set is 0. Hence, the behavior of APIs
SetMem16|32|64 is not changed.
Hao Wu [Wed, 7 Dec 2016 02:39:03 +0000 (10:39 +0800)]
MdePkg/BaseLib: Add an additional check within (Ascii)StrnCmp
This commit adds an addtional check in AsciiStrnCmp and StrnCmp. It
explicitly checks the end of the sting pointed by 'SecondString' to make
the code logic easier for reading and to prevent possible mis-reports by
static code checkers.
This commit refines the logic for AsciiStrnLenS and StrnLenS. It makes the
logic more straightforward to prevent possible mis-reports by static code
checkers.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Dandan Bi [Tue, 20 Dec 2016 07:10:29 +0000 (15:10 +0800)]
UefiCpuPkg: Add Pcd info to uni file
Add PcdCpuSmmStmExceptionStackSize/PcdCpuMsegSize prompt and help
string to uni file.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Heyi Guo [Thu, 15 Dec 2016 06:49:47 +0000 (14:49 +0800)]
BaseTools: fix write-strings build warnings
Fix build warnings of "deprecated conversion from string constant to
?CHAR8* {aka char*}? [-Wwrite-strings]" for BaseTools, while using
"gcc version 4.8.4 (Ubuntu 4.8.4-2ubuntu1~14.04.3)".
Heyi Guo [Thu, 15 Dec 2016 06:49:46 +0000 (14:49 +0800)]
BaseTools: fix format type build warnings
Fix build warnings of "format ?%d? expects argument of type ?int?, but
argument 5 has type ?long unsigned int? [-Wformat=]" for BaseTools,
while using "gcc version 4.8.4 (Ubuntu 4.8.4-2ubuntu1~14.04.3)".
Heyi Guo [Thu, 15 Dec 2016 06:49:45 +0000 (14:49 +0800)]
BaseTools: fix format-security build warnings
Fix build warnings of "format not a string literal and no format
arguments [-Wformat-security]" for BaseTools, while using "gcc version
4.8.4 (Ubuntu 4.8.4-2ubuntu1~14.04.3)".
Chan, Amy [Fri, 16 Dec 2016 07:10:45 +0000 (15:10 +0800)]
IntelSiliconPkg: 0468303 caused to breaking the SMBIOS tables generation code
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Chiu, Chasel <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chan, Amy <amy.chan@intel.com>
System test:
Smbios tables are correctly published on an intel internal platform.
Yonghong Zhu [Mon, 19 Dec 2016 02:52:20 +0000 (10:52 +0800)]
BaseTools: Correct bin wrappers for GenDepex.py path
The WindowsLike and PosixLike bin wrappers for GenDepex.py do not use
correct path. GenDepex.py is not in a GenDepex directory. Instead, it is
in the AutoGen directory.
Jiewen Yao [Thu, 24 Nov 2016 05:36:56 +0000 (13:36 +0800)]
UefiCpuPkg/PiSmmCpu: Add SMM Comm Buffer Paging Protection.
This patch sets the normal OS buffer EfiLoaderCode/Data,
EfiBootServicesCode/Data, EfiConventionalMemory, EfiACPIReclaimMemory
to be not present after SmmReadyToLock.
To access these region in OS runtime phase is not a good solution.
Previously, we did similar check in SmmMemLib to help SMI handler
do the check. But if SMI handler forgets the check, it can still
access these OS region and bring risk.
So here we enforce the policy to prevent it happening.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Add a new instances of the SmmCpuFeaturesLib that is used by
platforms to enable the SMI Transfer Monitor(STM) feature.
This new instance is in the same directory as the default
SmmCpuFeaturesLib instance in order to share source files.
The DSC file is updated to build both SmmCpuFeatureLib
instances and to build two versions of the PiSmmCpuDxeSmm
module using each of the SmmCpuFeatureLib instances.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Michael Kinney [Fri, 18 Nov 2016 04:54:19 +0000 (20:54 -0800)]
UefiCpuPkg/SmmCpuFeaturesLib: Split into two files
Split the default implementation of the SmmCpuFeaturesLib
into two files to prepare for the addition of the STM
specific SmmCpuFeaturesLib implementation. The STM
specific implementation installs a different SMI entry
handler and initialize the MSEG specific MSR at the end
of SmmCpuFeaturesInitializeProcessor().
This patch does not introduce any functional changes
to the default implementation of the SmmCpuFeaturesLib.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Michael Kinney [Mon, 28 Nov 2016 21:52:57 +0000 (13:52 -0800)]
UefiCpuPkg: Add STM GUIDs, Protocols, and PCDs
* Add GUIDed HOB that described MSEG region in SMRAM
* Add SM Monitor Init Protocol
* Add PCD to configure size of SMM exception stack
* Add PCD to configure MSEG region size if it is not
described by the gMsegSmramGuid GUIDed HOB.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Add comments to describe fields of MSEG_HEADER and
add define values for the MonitorFeatures field.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Ard Biesheuvel [Fri, 9 Dec 2016 15:04:35 +0000 (15:04 +0000)]
Omap35xxPkg/PciEmulation: port to new non-discoverable device infrastructure
Move to the new non-discoverable device protocols for wiring the PCI based
EHCI controller driver to the non-discoverable EHCI controller found on the
OMAP 3530.
Update CPUID leaf and sub-leaf indexes and structures as described by
Intel(R) 64 and IA-32 Architectures Software Developer's Manual,
Volume 2A, September 2016, CPUID instruction.
Summary of incompatible changes:
1. Field name changes in CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX
Bit 12 has been renamed from 'PQM' to 'RDT_M' and bit 15 has been renamed
from 'PQE' to 'RDT_A'.
2. Stucture and filed name changes for 'CPUID Platform QoS Monitoring
Information' related definitions
Definition 'CPUID_PLATFORM_QOS_MONITORING' has been renamed to
'CPUID_INTEL_RDT_MONITORING'.
Definition 'CPUID_PLATFORM_QOS_MONITORING_ENUMERATION_SUB_LEAF' has been
renamed to 'CPUID_INTEL_RDT_MONITORING_ENUMERATION_SUB_LEAF'.
Definition 'CPUID_PLATFORM_QOS_MONITORING_CAPABILITY_SUB_LEAF' has been
renamed to 'CPUID_INTEL_RDT_MONITORING_L3_CACHE_SUB_LEAF'.
3. Stucture and filed name changes for 'CPUID Platform QoS Enforcement
Information' related definitions
Definition 'CPUID_PLATFORM_QOS_ENFORCEMENT' has been renamed to
'CPUID_INTEL_RDT_ALLOCATION'.
Definition 'CPUID_PLATFORM_QOS_ENFORCEMENT_MAIN_LEAF' has been renamed to
'CPUID_INTEL_RDT_ALLOCATION_ENUMERATION_SUB_LEAF'.
Definition 'CPUID_PLATFORM_QOS_ENFORCEMENT_RESID_SUB_LEAF' has been
renamed to 'CPUID_INTEL_RDT_ALLOCATION_L3_CACHE_SUB_LEAF'.
This commit also updates the relating codes in
UefiCpuPkg/Application/Cpuid to reflect the changes.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Add the MSR header file of Goldmont processor according to Intel(R) 64 and
IA-32 Architectures Software Developer's Manual, Volume 3, September 2016,
Chapter 35 Model-Specific-Registers (MSR), Section 35.5.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Update the MSR header file of Skylake processor according to Intel(R) 64
and IA-32 Architectures Software Developer's Manual, Volume 3, September
2016, Chapter 35 Model-Specific-Registers (MSR), Section 35.15.
Summary of incompatible changes:
1. MSR (address 38EH) IA32_PERF_GLOBAL_STAUS has been renamed to
IA32_PERF_GLOBAL_STATUS
Typo 'STAUS' has been fixed in SDM.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Update MSR header files of processors (excluding Goldmont and Skylake
processors) according to Intel(R) 64 and IA-32 Architectures Software
Developer's Manual, Volume 3, September 2016, Chapter 35
Model-Specific-Registers (MSR).
Summary of incompatible changes:
General:
1. MSR (address 38EH) IA32_PERF_GLOBAL_STAUS in processor-specific header
files has been removed or renamed to IA32_PERF_GLOBAL_STATUS
Typo 'STAUS' has been fixed in SDM.
If the MSR definition is the same with architectural MSR, we remove it.
Otherwise, we rename the MSR.
2. MSRs (address starting from 400H) MSR_MC{X}_{XXX} (like MSR_MC4_STATUS)
in processor-specific header files have been removed or renamed to
IA32_MC{X}_{XXX} (like IA32_MC4_STATUS)
Register name change from 'MSR_MC{X}_{XXX}' to 'IA32_MC{X}_{XXX}' in SDM.
If the MSR definition is the same with architectural MSR, we remove it.
Otherwise, we rename the MSR.
Please note that for those MSRs still have name like 'MSR_MC{X}_{XXX}' in
SDM are still kept in processor-specific header files.
HaswellMsr.h:
1. MSR (address C80H) IA32_DEBUG_FEATURE has been removed
Register name change from 'IA32_DEBUG_FEATURE' to 'IA32_DEBUG_INTERFACE'
in SDM.
Since the MSR definition is the same with architectural MSR, we remove it.
SandyBridgeMsr.h:
1. MSR (address 391H) MSR_UNC_PERF_GLOBAL_CTRL, name change for bit fields
0:3
Bit description change from 'Core {X} select' to 'Slice {X} select' for
bit 0:3 in SDM.
SilvermontMsr.h:
1. MSR (address 2AH) MSR_EBL_CR_POWERON, structure definition changed
Bit description for this MSR is totally changed in SDM, we modify the
structure definition to align with it.
XeonDMsr.h:
1. MSRs (address 630H to 632H) MSR_PKG_C8_RESIDENCY, MSR_PKG_C9_RESIDENCY
and MSR_PKG_C10_RESIDENCY have been removed
Those 3 MSRs are not defined for this processor in SDM, we remove them.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
projects / mirror_edk2.git / log