Zeng, Star [Wed, 25 Nov 2015 02:33:06 +0000 (02:33 +0000)]
Check InternalAllocPoolByIndex status before refer buffer.
Original code refers FreePoolHdr without check Status. It is obvious wrong and has risk.
Aslo, if InternalAllocPoolByIndex() returns an error, then *FreePoolHdr is assigned to an uninitialized value. So we init Hdr be NULL.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Zeng, Star" <star.zeng@intel.com>
Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Fan, Jeff" <jeff.fan@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18932
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Ard Biesheuvel [Tue, 24 Nov 2015 08:40:33 +0000 (08:40 +0000)]
BaseTools/GenFw ARM: allow R_ARM_REL32 relocations
R_ARM_REL32 are relative relocations, so we don't need to do anything
special when performing the ELF to PE/COFF conversion, since our memory
layout is identical between the two binary formats. So just allow them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18931
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Ard Biesheuvel [Tue, 24 Nov 2015 07:48:06 +0000 (07:48 +0000)]
ArmLib/ArmV7Mmu: use 64-bit type for mapping region size
The way the v7 MMU code is invoked by the Xen port is somewhat of
a pathological case, since it describes its physical memory space
using a single cacheable region that covers the entire addressable
range. When clipping this region to the part that is 1:1 addressable,
we end up with a region of exactly 4 GB in size, which just exceeds
the range of the UINT32 variable we use in FillTranslationTable() to
track our progress while populating the page tables. So promote it
to UINT64 instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18930
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Ard Biesheuvel [Tue, 24 Nov 2015 07:44:41 +0000 (07:44 +0000)]
ArmVirtPkg/ArmVirtPlatformLib: reduce ID map size to GCD region size
The ID mapping routines on virtual platforms simply map the entire
hardware supported physical address space as device memory, and then
punch some holes for regions that need to be mapped cacheable.
On virtual platforms hosted on CPUs that support a large physical
address range, this may result in a lot of overhead, i.e., 4 KB of page
tables for each 512 GB of address space, which quickly adds up (i.e.,
2 MB for the architectural maximum of 48 bits).
Since there may be a platform specific limit to the size of the (I)PA
space that is not reflected by CPU id registers, restrict the range of
the ID mapping to gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize bits.
This makes sense by itself, since we cannot manipulate mappings above
that limit anwyay (because they are not covered by GCD), and it allows
the PCD be set to a lower value by platforms whose (I)PA space is
smaller than the hardware supported maximum.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Wei Huang <wei@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18929
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Ard Biesheuvel [Tue, 24 Nov 2015 07:44:28 +0000 (07:44 +0000)]
ArmVirtPkg/ArmVirtQemu: limit the (I)PA space to 40 bits
KVM uses a fixed size of 40 bits for its intermediate physical address
space, so there is no need to support anything beyond that even if the
host hardware does.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Wei Huang <wei@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18928
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Ruiyu Ni [Tue, 24 Nov 2015 06:57:47 +0000 (06:57 +0000)]
MdeModulePkg/BdsDxe: Fix EBC build failure
Define EFI_REMOVABLE_MEDIA_FILE_NAME for EBC ARCH to fix EBC build failure.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18927
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Ruiyu Ni [Tue, 24 Nov 2015 06:56:05 +0000 (06:56 +0000)]
MdeModulePkg/UefiBootManagerLib: Always create MemoryTypeInfo variable
Align to old BDS behavior (IntelFrameworkModulePkg/BDS) to always create
MemoryTypeInfo variable regardless of the PcdResetOnMemoryTypeInformationChange
value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18926
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Leif Lindholm [Mon, 23 Nov 2015 19:34:40 +0000 (19:34 +0000)]
ShellBinPkg: Arm/AArch64 Shell binary update.
The binaries of ShellBinPkg are generated with ShellPkg from r18915.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18925
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Dandan Bi [Mon, 23 Nov 2015 09:37:24 +0000 (09:37 +0000)]
MdeModulePkg:Refine the UiApp
Use new created libraries(Boot Manager,Device Manager,Boot Maintenance
Manager) in UiApp.So remove and refine relative code in UiApp.And update
the Nt32Pkg.dsc and MdeModulePkg.dsc.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18924
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Dandan Bi [Mon, 23 Nov 2015 09:34:55 +0000 (09:34 +0000)]
MdeModulePkg:Create Boot Maintenance Manager Library
Split the boot maintenance manager library from UiApp in MdeModulePkg/Application
and put the library in MdeModulePkg/Library.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18923
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Dandan Bi [Mon, 23 Nov 2015 09:33:42 +0000 (09:33 +0000)]
MdeModulePkg:Create Device Manager Library
Split the device manager library from UiApp in MdeModulePkg/Application
and put the library in MdeModulePkg/Library.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18922
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Dandan Bi [Mon, 23 Nov 2015 09:32:08 +0000 (09:32 +0000)]
MdeModulePkg:Create Boot Manager Library
Split the boot manager library from UiApp in MdeModulePkg/Application
and put the library in MdeModulePkg/Library.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18921
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Heyi Guo [Mon, 23 Nov 2015 07:48:33 +0000 (07:48 +0000)]
ArmPkg: Invalidate cache after allocating UC memory
It is implied that the memory returned from UncachedMemoryAllocationLib
should have cache invalidated. So we invalidate memory range after
changing memory attribute to uncached.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18920
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Eric Dong [Mon, 23 Nov 2015 05:42:50 +0000 (05:42 +0000)]
MdeModulePkg DxeFileExplorerProtocol: Create wrapper fileexplorer library.
This library wrapper explorer protocol and produce the file explorer library.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18919
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Eric Dong [Mon, 23 Nov 2015 05:42:21 +0000 (05:42 +0000)]
MdeModulePkg FileExplorerDxe: Create file explorer Protocol.
This driver produces file explorer protocol layered on top of the FileExplorerLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18918
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Eric Dong [Mon, 23 Nov 2015 05:41:28 +0000 (05:41 +0000)]
MdeModulePkg FileExplorerLib: Create file explorer library.
This library support select one file from the specified directory or from system root directory.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18917
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Ruiyu Ni [Mon, 23 Nov 2015 00:48:46 +0000 (00:48 +0000)]
MdeModulePkg/BootLogoLib: Fix GCC build failure
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18916
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Leif Lindholm [Fri, 20 Nov 2015 13:14:59 +0000 (13:14 +0000)]
ArmPkg: ArmLib: purge incorrect ArmDrainWriteBuffer () alias
In ArmLib, there exists an alias for ArmDataSynchronizationBarrier,
named after one of several names for the pre-ARMv6 cp15 operation that
was formalised into the Data Synchronization Barrier in ARMv6.
This alias is also the one called from within ArmLib, in preference of
the correct name. Through the power of code reuse, this name slipped
into the AArch64 variant as well.
Expunge it from the codebase.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18915
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Jordan Justen [Fri, 20 Nov 2015 08:22:46 +0000 (08:22 +0000)]
UefiCpuPkg/CpuDxe: Don't use gBS->Stall
The CpuDxe driver may run before the gEfiMetronomeArchProtocolGuid
protocol is installed. gBS->Stall does not work until this arch
protocol is installed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18914
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Star Zeng [Fri, 20 Nov 2015 01:51:15 +0000 (01:51 +0000)]
MdeModulePkg BaseSerialPortLib16550: Fix typo in SerialPortWrite()
The "read" word in SerialPortWrite() header comment block should be
"write".
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18910
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Star Zeng [Fri, 20 Nov 2015 01:50:34 +0000 (01:50 +0000)]
PcAtChipsetPkg SerialIoLib: Fix typo in SerialPortWrite()
The "read" word in SerialPortWrite() header comment block should be
"write".
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18909
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Star Zeng [Fri, 20 Nov 2015 01:49:48 +0000 (01:49 +0000)]
MdePkg SerialPortLib: Fix typo in SerialPortWrite()
The "read" word in SerialPortWrite() header comment block should be
"write".
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18908
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Star Zeng [Fri, 20 Nov 2015 01:46:42 +0000 (01:46 +0000)]
MdePkg SerialIo.h: Fix typo "buts" to "bits"
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18907
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Jeff Fan [Fri, 20 Nov 2015 01:23:52 +0000 (01:23 +0000)]
UefiCpuPkg/SmmFeatureLib: Check SmmFeatureControl by Code_Access_Chk
Bit SMM_Code_Access_Chk (SMM-RO) in MSR_SMM_MCA_CAP is defined in SDM.
If set to 1 indicates that the SMM code access restriction is supported and the
MSR_SMM_FEATURE_CONTROL is supported.
If this bit is not set, we needn't to access register SmmFetureControl.
Otherwise, #GP exception may happen.
We need to check if SmmFeatureControl support or not by checking
SMM_Code_Access_Chk (SMM-RO) in MSR_SMM_MCA_CAP.
Because MSR_SMM_MCA_CAP is SMM-RO register, we should move this check from
SmmCpuFeaturesLibConstructor (non-SMM) to SmmCpuFeaturesInitializeProcessor
(SMM).
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18906
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Jeff Fan [Fri, 20 Nov 2015 01:22:00 +0000 (01:22 +0000)]
UefiCpuPkg: Not touch SmmFeatureControl if Code_Access_Chk not Set
Bit SMM_Code_Access_Chk (SMM-RO) in MSR_SMM_MCA_CAP is defined in SDM.
If set to 1 indicates that the SMM code access restriction is supported and the
MSR_SMM_FEATURE_CONTROL is supported.
If this bit is not set, we needn't to access register SmmFetureControl.
Otherwise, #GP exception may happen.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18905
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Mark Rutland [Thu, 19 Nov 2015 14:39:48 +0000 (14:39 +0000)]
ArmPkg/ArmPlatformPkg: position vectors relative to base
We currently rely on .align directives to ensure that each exception
vector entry is the appropriate offset from the vector base address.
This is slightly fragile, as were an entry to become too large (greater
than 32 A64 instructions), all following entries would be silently
shifted until they meet the next alignment boundary. Thus we might
execute the wrong code in response to an exception.
To prevent this, introduce a new macro, VECTOR_ENTRY, that uses .org
directives to position each entry at the precise required offset from
the base of a vector. A vector entry which is too large will trigger a
build failure rather than a runtime failure which is difficult to debug.
For consistency, the base and end of each vector is similarly annotated,
with VECTOR_BASE and VECTOR_END, which provide the necessary alignment
and symbol exports. The now redundant directives and labels are removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18904
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Mark Rutland [Thu, 19 Nov 2015 14:14:25 +0000 (14:14 +0000)]
ArmPkg: correct TTBR1_EL1 settings in TCR_EL1
As EDK2 runs in an idmap, we do not use TTBR1_EL1, nor do we configure
it. TTBR1_EL1 may contain UNKNOWN values if it is not programmed since
reset.
Prior to enabling the MMU, we do not set TCR_EL1.EPD1, and hence the CPU
may make page table walks via TTBR1_EL1 at any time, potentially using
UNKNOWN values. This can result in a number of potential problems (e.g.
the CPU may load from MMIO registers as part of a page table walk).
Additionally, in the presence of Cortex-A57 erratum #822227, we must
program TCR_EL1.TG1 == 0b1x (e.g. 4KB granule) regardless of the value
of TCR_EL1.EPD1, to ensure that EDK2 can make forward progress under a
hypervisor which makes use of PAR_EL1.
This patch ensures that we program TCR_EL1.EPD1 and TCR_EL1.TG1 as above
to avoid these issues. TCR_EL1.TG1 is set to 4K for all targets, as any
CPU capable of running EDK2 must support this granule, and given
TCR_EL1.EPD1, programming the field is not detrimental in the absence of
the erratum.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18903
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Cecil Sheng [Thu, 19 Nov 2015 08:37:03 +0000 (08:37 +0000)]
ShellPkg: Corrected CatSPrint usage to prevent memory leaks.
CatSPrint allocates return buffer for the caller. The caller doesn't have to allocate one, and has to free the used buffers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cecil Sheng <cecil.sheng@hpe.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18902
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Ard Biesheuvel [Wed, 18 Nov 2015 16:18:40 +0000 (16:18 +0000)]
ArmPkg/ArmV7Mmu: handle memory regions over 4 GB correctly
The ARM_MEMORY_REGION_DESCRIPTOR array provided by the platform may
contain entries that extend beyond the 4 GB boundary, above which
we can't map anything on 32-bit ARM. If this is the case, map only
the 1:1 addressable part.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18900
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Ard Biesheuvel [Wed, 18 Nov 2015 15:59:59 +0000 (15:59 +0000)]
ArmPkg/ArmV7Lib: take MP extensions into account when programming TTBR
Bits 0 and 6 of the TTBRx system registers have different meanings
depending on whether a system implements the Multiprocessing
Extensions. So use separate memory attribute definitions for MP and
non-MP.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18899
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Ard Biesheuvel [Wed, 18 Nov 2015 15:59:42 +0000 (15:59 +0000)]
ArmPkg/ArmV7Lib: fix definition of TTBR_NON_INNER_CACHEABLE
The definition of TTBR_NON_INNER_CACHEABLE should be bit 0 cleared, not
bit 0 set. Furthermore, the name is inconsistent with the other definitions
so rename it to TTBR_INNER_NON_CACHEABLE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18898
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Ard Biesheuvel [Wed, 18 Nov 2015 15:59:22 +0000 (15:59 +0000)]
ArmPkg/ArmV7Mmu: introduce feature PCD to map normal memory non-shareable
Even though mapping normal memory (inner) shareable is usually the
correct choice on coherent systems, it may be desirable in some cases
to use non-shareable mappings for normal memory, e.g., when hardware
managed coherency is not required and the memory system is not fully
configured yet. So introduce a PCD PcdNormalMemoryNonshareableOverride
that makes cacheable mappings of normal memory non-shareable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18897
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Ard Biesheuvel [Wed, 18 Nov 2015 15:59:04 +0000 (15:59 +0000)]
ArmPkg/ArmV7Mmu: make cached translation table accesses shareable
To align with the way normal cacheable memory is mapped, set the
shareable bit for cached accesses performed by the page table walker.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18896
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Ard Biesheuvel [Wed, 18 Nov 2015 15:58:46 +0000 (15:58 +0000)]
ArmPkg/ArmV7Lib: add function to test for presence of MP extensions
Some MMU manipulation is dependent on the presence of the multiprocessing
extensions. So add a function that returns this information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18895
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Ard Biesheuvel [Wed, 18 Nov 2015 15:58:26 +0000 (15:58 +0000)]
ArmPkg/ArmV7Lib: add support for reading the ID_MMFR0 system register
Implement an accessor function for the ID_MMFR0 system register, which
contains information about the VMSA implementation. We will need this
to access the number of shareability levels and the nature of their
implementations.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18894
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Ard Biesheuvel [Wed, 18 Nov 2015 15:58:03 +0000 (15:58 +0000)]
ArmPkg/ArmV7Mmu: fix write-through translation table accesses
The definition TTBR_WRITE_THROUGH_NO_ALLOC makes little sense, since
a) its meaning is unclear in the context of TTBRx, since write through
always implies Read-Allocate and no Write-Allocate
b) its definition equals the definition of TTBR_WRITE_BACK_ALLOC
So instead, rename it to TTBR_WRITE_THROUGH and update the definition
to reflect the name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18893
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Ard Biesheuvel [Wed, 18 Nov 2015 11:51:06 +0000 (11:51 +0000)]
ArmPkg/Mmu: set required XN attributes for device mappings
To prevent speculative intruction fetches from MMIO ranges that may
have side effects on reads, the architecture requires device mappings
to be created with the XN or UXN/PXN bits set (for the ARM/EL2 and
EL1&0 translation regimes, respectively.)
Note that, in the ARM case, this involves moving all accesses to a
client domain since permission attributes like XN are ignored from
a manager domain. The use of a client domain is actually mandated
explicitly by the UEFI spec.
Reported-by: Heyi Guo <heyi.guo@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18891
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Ard Biesheuvel [Wed, 18 Nov 2015 11:50:50 +0000 (11:50 +0000)]
ArmVExpressPkg/ArmVExpressLibRTSM: map NOR flash as normal memory
Some users of this library (i.e., FVP-AArch64 and RTSM-A15_MPCore)
may be built to execute straight from NOR flash. Since device mappings
should have the XN attribute set (according to the architecture), mapping
the NOR flash as a device may prevent it from being executable.
Since the NOR flash DXE driver is perfectly capable of setting the correct
attributes for the region it needs to write to, and since we will be
executing from DRAM by that time anyway, we can simply map the NOR flash
as normal memory initially.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18890
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Ard Biesheuvel [Wed, 18 Nov 2015 11:50:33 +0000 (11:50 +0000)]
ArmVirtPkg/ArmVirtPlatformLib: map executable NOR region as normal memory
The ARM architecture version 7 and later mandates that device mappings
have the XN (non-executable) bit set, to prevent speculative instruction
fetches from read-sensitive regions. This implies that we should not map
regions as device if we want to execute from them, so the NOR region that
contains our FD image should be mapped as normal memory instead.
The MMU code deals correctly with overlapping ARM_MEMORY_REGION_DESCRIPTOR
entries, and later entries in the array take precedence over earlier ones.
So simply add an entry to the end of the array that overrides the mapping
attributes of the FD image, wherever it resides.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18889
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Ard Biesheuvel [Wed, 18 Nov 2015 11:50:12 +0000 (11:50 +0000)]
ArmPkg/AArch64Mmu: remove unused GcdAttributeToArmAttribute()
The function GcdAttributeToArmAttribute() is not used anywhere in the
code base, and is only defined for AARCH64 and not for ARM. It also
fails to set the bits for shareability and non-executability that we
require for correct operation. So remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18888
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Star Zeng [Wed, 18 Nov 2015 10:13:31 +0000 (10:13 +0000)]
MdeModulePkg PeiCore: PeiInstallPeiMemory improper ASSERT test on second call
The ASSERT (PrivateData->PeiMemoryInstalled) in if (PrivateData->PeiMemoryInstalled)
condition is useless, it should be ASSERT (FALSE) to follow the code's expectation.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18887
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Hess Chen [Wed, 18 Nov 2015 05:38:35 +0000 (05:38 +0000)]
BaseTool/UPT: Add supporting of decimal numbers for INF_VERSION and DEC_SPECIFICATION
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hess Chen <hesheng.chen@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18868
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Ruiyu Ni [Wed, 18 Nov 2015 05:05:22 +0000 (05:05 +0000)]
MdeModulePkg: Change BootLogoEnableLogo use INTN for minus value
The parameter name is also changed from Coordinate* to Offset* to
reflect that it's the offset to the location specified by Attribute.
For example, when the Attribute is Center, OffsetX and OffsetY are
used to specify the offset to the Center. OffsetX = 100 means
100 pixels right to the Center.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18867
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Ruiyu Ni [Wed, 18 Nov 2015 05:04:23 +0000 (05:04 +0000)]
MdeModulePkg: Change PlatformLogo.GetImage use INTN for minus value
The parameter name is also changed from Coordinate* to Offset* to
reflect that it's the offset to the location specified by Attribute.
For example, when the Attribute is Center, OffsetX and OffsetY are
used to specify the offset to the Center. OffsetX = 100 means
100 pixels right to the Center.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18866
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Mark Rutland [Tue, 17 Nov 2015 13:58:19 +0000 (13:58 +0000)]
ArmPkg: ensure DebugAgentVectorTable is 2K-aligned
We force alignment to 2K after generating the DebugAgentVectorTable
symbol, and hence DebugAgentVectorTable itself may not be 2K-aligned,
and table entries may not be at the correct offset from the
DebugAgentVectorTable base address.
Fix this by forcing alignment before generating the
DebugAgentVectorTable symbol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18865
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Ruiyu Ni [Tue, 17 Nov 2015 10:16:02 +0000 (10:16 +0000)]
MdeModulePkg/VarCheck: Add VarCheck handler for PlatformRecovery####
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18864
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Ruiyu Ni [Tue, 17 Nov 2015 10:15:09 +0000 (10:15 +0000)]
MdeModulePkg: Enable PlatformRecovery in BdsDxe driver
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18863
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Ruiyu Ni [Tue, 17 Nov 2015 10:14:13 +0000 (10:14 +0000)]
MdeModulePkg: Add PlatformRecovery#### pointing to default file path
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18862
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Ruiyu Ni [Tue, 17 Nov 2015 10:13:21 +0000 (10:13 +0000)]
MdeModulePkg: Use UefiSpec.h defined macro to replace L"xxx" string
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18861
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Ruiyu Ni [Tue, 17 Nov 2015 10:12:38 +0000 (10:12 +0000)]
MdeModulePkg: Add missing PrintLib to BdsDxe.inf
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18860
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Ruiyu Ni [Tue, 17 Nov 2015 10:11:44 +0000 (10:11 +0000)]
MdeModulePkg: Add Platform recovery support
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18859
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Ruiyu Ni [Tue, 17 Nov 2015 10:10:54 +0000 (10:10 +0000)]
MdeModulePkg: Support to expand File device path
To support platform recovery, File device path expanding capability
is added.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18858
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Ruiyu Ni [Tue, 17 Nov 2015 10:10:16 +0000 (10:10 +0000)]
MdeModulePkg: Use BmForEachVariable to collect all key options
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18857
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Ruiyu Ni [Tue, 17 Nov 2015 10:09:25 +0000 (10:09 +0000)]
MdeModulePkg: Use BM_OPTION_NAME_LEN instead of sizeof L"Boot####"
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18856
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Ruiyu Ni [Tue, 17 Nov 2015 10:08:40 +0000 (10:08 +0000)]
MdeModulePkg: Use BmCharToUint in BmIsKeyOptionVariable
The patch also moves the BmCharToUint to BmMisc.c because it
belongs to misc functions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18855
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Ruiyu Ni [Tue, 17 Nov 2015 10:07:43 +0000 (10:07 +0000)]
MdeModulePkg: Add Bm prefix for internal functions
Change VARIABLE_VISITOR to BM_VARIABLE_VISITOR
Change ForEachVariable to BmForEachVariable
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18854
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Ruiyu Ni [Tue, 17 Nov 2015 10:06:44 +0000 (10:06 +0000)]
MdePkg: Add Platform Recovery definitions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18853
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Yonghong Zhu [Tue, 17 Nov 2015 07:45:04 +0000 (07:45 +0000)]
BaseTools/toolsetup.bat: fixed the error when the path contains space
when the path contains space, it will report error for PATH Environment
update.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18852
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Yonghong Zhu [Tue, 17 Nov 2015 07:40:00 +0000 (07:40 +0000)]
BaseTools: Fix two warning reported in the make phase.
when we make BaseTools, it report warnings about VfrError.cpp and VolInfo,
so this patch fix this warning.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18851
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Laszlo Ersek [Mon, 16 Nov 2015 18:29:14 +0000 (18:29 +0000)]
MdeModulePkg: SmmLockBoxPeiLib: work without EFI_PEI_SMM_COMMUNICATION_PPI
The RestoreLockBox() and RestoreAllLockBoxInPlace() functions handle the
case when EFI_PEI_SMM_COMMUNICATION_PPI.Communicate() returns
EFI_NOT_STARTED: they access the SMRAM directly, for restoring LockBox
data.
This occurs if a PEIM needs to restore LockBox data *before* the SMBASE is
relocated and the SMI handler is installed for all processors.
One such PEIM is UefiCpuPkg/Universal/Acpi/S3Resume2Pei. On the S3 resume
path, in function S3RestoreConfig2(), LockBox data are restored *before*
the SmmRestoreCpu() function of UefiCpuPkg/PiSmmCpuDxeSmm is called via
SmmS3ResumeState->SmmS3ResumeEntryPoint. (The latter SmmRestoreCpu()
function is responsible for the SMBASE relocation.)
If a platform knows that its PEIMs restore LockBox data *only* before
SMBASE relocation -- e.g., due to S3Resume2Pei being the platform's only
SmmLockBoxPeiLib client --, then the platform might not want to include
"UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf" at all (hence
not provide EFI_PEI_SMM_COMMUNICATION_PPI) -- because all of those
restores would be serviced by direct SMRAM access anyway.
Currently the absence of EFI_PEI_SMM_COMMUNICATION_PPI is not supported by
SmmLockBoxPeiLib, but it's not hard to implement. Handle it the same as
when EFI_PEI_SMM_COMMUNICATION_PPI.Communicate() returns EFI_NOT_STARTED:
restore LockBox data directly from SMRAM.
Suggested-by: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18823
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Zhang Lubo [Fri, 13 Nov 2015 09:35:54 +0000 (09:35 +0000)]
NetworkPkg: Httpboot will fail the 2nd time result by wrong TCP state.
If the 2nd boot quickly after the first succeed boot, it will function well.
But if you wait for some time after 1nd succeed boot and boot again, the
TCP state may change from established to closed wait as the http server send
fin flag, then boot fail occurred.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18783
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Heyi Guo [Fri, 13 Nov 2015 03:27:54 +0000 (03:27 +0000)]
Update SPCR table definition per SPCR specification v1.03.
Document link:
http://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Heyi Guo" <heyi.guo@linaro.org>
Reviewed-by: "Jiewen Yao" <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18782
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Star Zeng [Fri, 13 Nov 2015 02:43:37 +0000 (02:43 +0000)]
MdeModulePkg PeiCore: PEI dispatcher need retry to process NOT_DISPATCHED FV
A corner case like below will cause a NOT_DISPATCHED FV has no opportunity to
be dispatched.
1. FV_RECOVERY has SecCore, PeiCore and some other PEI modules, a module will
report FVMAIN_COMPACT and FV_RECOVERY2 in sequence.
2. FVMAIN_COMPACT has a FV image file with GUIDED FV image section in it.
3. FV_RECOVERY2 has DxeIpl and other PEI modules, the DxeIpl will install
SectionExtractionPpi
If ALL the PEIMs in FV_RECOVERY and FV_RECOVERY2 have DEPEX satisfied and
executed in one loop, PeimNeedingDispatch will be always FALSE, FVMAIN_COMPACT
will have no opportunity to be decompressed and dispatched as DxeIpl executes
after the first processing to FVMAIN_COMPACT.
The patch is to set PeimNeedingDispatch to TRUE when ProcessFvFile() not successfully,
then the NOT_DISPATCHED FV could have another opportunity to be processed.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18781
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Shifei Lu [Fri, 13 Nov 2015 02:38:08 +0000 (02:38 +0000)]
Vlv2TbltDevicePkg: Sync the branch changes to Trunk,
Add Microcode, and Change Flash size from 3M to 4M.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shifei Lu <shifeix.a.lu@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18780
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Ard Biesheuvel [Thu, 12 Nov 2015 11:40:57 +0000 (11:40 +0000)]
ArmPkg/ArmLib: mark all cached mappings as (inner) shareable
Mark all cached memory mappings as shareable (or inner shareable on
AArch64) so that our view of memory is kept coherent by the hardware.
This is relevant for things like coherent DMA and virtualization (where
a guest may migrate to another core) but in general, since UEFI on ARM
is mostly used in a context where the secure firmware and possibly a
secure OS are already up and running, it is best to refrain from using
any non-shareable mappings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18778
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Tim He [Thu, 12 Nov 2015 08:33:12 +0000 (08:33 +0000)]
Vlv2TbltDevicePkg: Sync the branch changes to Trunk,
Add 'yL' build option to enable SPI lock for MinnowBoard Max.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tim He <tim.he@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18777
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Ard Biesheuvel [Thu, 12 Nov 2015 07:29:21 +0000 (07:29 +0000)]
ArmPlatformPkg: bring DS-5 scripts in line with linker script changes
The ARM and AARCH64 linker scripts have recently been updated so that
the memory layouts of the ELF and PE/COFF versions of each module are
identical. In particular, this means that the ELF images now have a
hole before the first section rather than starting at offset 0x0, which
means we no longer have to correct for this difference when loading the
ELF image into the debugger.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18775
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Ruiyu Ni [Thu, 12 Nov 2015 07:14:40 +0000 (07:14 +0000)]
MdeModulePkg/BmpImageDecoderLib: Support ImageFormatUnknown type
Enhance the library to handle unknown image format.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18774
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Ruiyu Ni [Thu, 12 Nov 2015 05:39:39 +0000 (05:39 +0000)]
Nt32Pkg: Use BootLogoLib for logo and progress bar drawing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18773
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Ruiyu Ni [Thu, 12 Nov 2015 05:23:25 +0000 (05:23 +0000)]
MdeModulePkg: Add BootLogoLib to provide interfaces about logo display.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18772
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Ruiyu Ni [Thu, 12 Nov 2015 05:22:21 +0000 (05:22 +0000)]
MdeModulePkg: Add BmpImageDecoderLib to provide BMP decoding capability
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18771
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Ruiyu Ni [Thu, 12 Nov 2015 05:21:38 +0000 (05:21 +0000)]
MdeModulePkg: Add ImageDecoderLib to provide image decoding service.
The library itself doesn't provide any image decoding capabilities but
manages the different image decoders.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18770
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Ruiyu Ni [Thu, 12 Nov 2015 05:19:22 +0000 (05:19 +0000)]
MdeModulePkg: Add PlatformLogo protocol definition.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18769
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Dandan Bi [Wed, 11 Nov 2015 08:34:04 +0000 (08:34 +0000)]
MdeModulePkg:Modify the pointer type.
Previously the pointer type is EFI_IFR_FORM_SET, it is incorrect when
do pointer addition without conversion.Now change it to UINT8 type.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18768
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Yonghong Zhu [Wed, 11 Nov 2015 06:30:42 +0000 (06:30 +0000)]
BaseTools/GenFw: add new option to not zero PE/COFF optional header fields
Add new option --keepoptionalheader and that flag does not zero PE/COFF
optional header fields including the version fields. It can support the
case that the PE/COFF optional header would be kept.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18767
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Andrew Fish [Wed, 11 Nov 2015 02:28:51 +0000 (02:28 +0000)]
MdePkg: BaseLib don't require NASM with Xcode
Don't require NASM for simple edk2 Xcode projects.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Andrew Fish <afish@apple.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18766
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Liming Gao [Wed, 11 Nov 2015 02:16:35 +0000 (02:16 +0000)]
MdePkg: Add more DataBits support to Port80 output
The BasePostCodeLibPort80 instance just prints UINT8 to IoPort 80. Some boards
may support 16bit or 32bit. To support them, new PCD PcdPort80DataWidth is
introduced to specify the width of data bits to Port80.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18765
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Eugene Cohen [Tue, 10 Nov 2015 10:02:24 +0000 (10:02 +0000)]
MdeModulePkg PeiCore: Fix issue AuthenticationStatus is not propagated correctly
This patch fixes an issue in PEI with encapsulated FV images where the
AuthenticationStatus is not correctly propagated down to child FV
handles. The PEI core registers for callbacks for both FvInfo and
FvInfo2 PPIs. These callbacks process the FVs which will recurse as
necessary to find more encapsulated FVs. (FvInfo2 is an updated PPI
that includes an AuthenticationStatus field - the original FvInfo did
not include this.)
When encapsulated FV processing occurs the PEI core installs both
FvInfo and FvInfo2 PPIs. The original implementation installs FvInfo
first and FvInfo2 second. As soon as the FvInfo PPI is installed the
notification callback handler immediately fires causing recursive FV
processing to occur. Since there is no AuthenticationStatus provided
for the original FvInfo the callback assumes AuthenticationStatus is
zero (unsigned / unverified) even though the parent FV may have been
verified.
This changes the order of FvInfo and FvInfo2 installs to ensure that
the notification callback occurs for FvInfo2 first and appropriate
AuthenticationStatus data can be propagated from parent FV to child
FV.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18764
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Lu Shifei [Tue, 10 Nov 2015 07:47:29 +0000 (07:47 +0000)]
Vlv2TbltDevicePkg/Vlv2DeviceRefCodePkg:
Sync the branch changes to Trunk,
Add "RTC Battery Present" item in setup page.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lu Shifei <shifeix.a.lu@intel.com>
Reviewed-by: Tim He <tim.he@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18763
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Cinnamon Shia [Tue, 10 Nov 2015 04:57:14 +0000 (04:57 +0000)]
PerformancePkg/Dp_App: Support dumping cumulative data
Add a new option -c to dump cumulative data.
For example:
shell> dp -c
==[ Cumulative ]========
(Times in microsec.) Cumulative Average Shortest Longest
Name Count Duration Duration Duration Duration
LoadImage: 200
1000000 7000 0 100000
StartImage: 200
20000000 90000 0
7000000
DB:Start: 200
20000000 100000 0
9000000
DB:Support: 200000 100000 0 0 7000
shell> dp -c DXE
==[ Cumulative ]========
(Times in microsec.) Cumulative Average Shortest Longest
Name Count Duration Duration Duration Duration
LoadImage: 200
1000000 7000 0 100000
StartImage: 200
20000000 90000 0
7000000
DB:Start: 200
20000000 100000 0
9000000
DB:Support: 200000 100000 0 0 7000
DXE 1
30000000 30000000 0
30000000
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18762
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Zhang Lubo [Tue, 10 Nov 2015 02:18:31 +0000 (02:18 +0000)]
NetworkPkg: Report Http Errors to screen when http layer occurs an error
Http server will return error status in http header when http connection
cannot be established,so the http boot driver should print the error code
code to the screen and the users can know what happened.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Sriram Subramanian <sriram-s@hpe.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18761
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Yao, Jiewen [Tue, 10 Nov 2015 02:03:40 +0000 (02:03 +0000)]
Add error handling for TPM in S3 resume failure.
If TPM2_Startup(TPM_SU_STATE) to return an error, the system
firmware that resumes from S3 MUST deal with a TPM2_Startup
error appropriately.
For example, issuing a TPM2_Startup(TPM_SU_CLEAR) command and
configuring the device securely by taking actions like extending
a separator with an error digest (0x01) into PCRs 0 through 7.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18760
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Ard Biesheuvel [Mon, 9 Nov 2015 13:28:33 +0000 (13:28 +0000)]
ArmPkg/ArmDmaLib: use the cache writeback granularity for alignment
When allocating memory to perform non-coherent DMA, use the cache
writeback granule rather than the data cache linesize for alignment.
This prevents the explicit cache maintenance from corrupting
unrelated adjacent data if the cache writeback granule exceeds
the cache linesize.
Reported-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18759
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Ard Biesheuvel [Mon, 9 Nov 2015 13:28:17 +0000 (13:28 +0000)]
ArmPkg/ArmLib: add accessor function for Cache Writeback Granule
Add a function to ArmLib that provides access to the Cache Writeback
Granule (CWG) field in CTR_EL0. This information is required when
performing non-coherent DMA.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18758
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Ard Biesheuvel [Mon, 9 Nov 2015 13:27:56 +0000 (13:27 +0000)]
ArmVirtPkg/PrePi: do not invalidate the entire data cache at startup
Drop the call to ArmInvalidateDataCache () from the PrePi startup
sequence. This kind of data cache maintenance should not be performed
when running under virtualization.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18757
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Ard Biesheuvel [Mon, 9 Nov 2015 13:27:36 +0000 (13:27 +0000)]
ArmCacheMaintenanceLib: disallow whole D-cache maintenance operations
The ARM architecture provides no reliable way to clean or invalidate
the entire data cache at runtime. The reason is that such maintenance
requires the use of set/way maintenance operations, which are suitable
only for the kind of maintenance that is carried out when the cache is
taken offline entirely.
So ASSERT () when any of the CacheMaintenanceLib whole data cache routines
are invoked rather than pretending we can do anything meaningful here.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18756
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Ard Biesheuvel [Mon, 9 Nov 2015 13:27:15 +0000 (13:27 +0000)]
ArmPkg/ArmLib: move cache maintenance sync barriers out of loop
There is no need to issue a full data synchronization barrier and an
instruction synchronization barrier after each and every set/way or
MVA cache maintenance operation. For the set/way case, we can simply
remove them, since the set/way outer loop already issues the required
barriers after completing its traversal over all the cache levels.
For the MVA case, move the data synchronization barrier out of the
loop, and add the instruction synchronization barrier to the I-cache
invalidation by MVA routine.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18755
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Ard Biesheuvel [Mon, 9 Nov 2015 13:26:52 +0000 (13:26 +0000)]
ArmPkg/ArmLib: retrieve cache line length from CTR not CCSIDR
The stride used by the cache maintenance by MVA instructions should
be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values
reflect the actual geometry of the caches. Using CCSIDR for this purpose
violates the architecture.
Also, move the line length accessors to common code, since there is no
need to keep them separate between ARMv7 and AArch64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18754
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Ard Biesheuvel [Mon, 9 Nov 2015 13:26:32 +0000 (13:26 +0000)]
ArmPkg/ArmLib: remove CCSIDR based cache info routines
The ARM architecture does not allow the actual geometries of the caches
to be inferred from the CCSIDR cache info system register, since the
geometry it reports is intended for performing cache maintenance by
set/way and nothing else. Since the ArmLib cache info routines are
based solely on CCSIDR contents, they should not be used.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18753
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Ard Biesheuvel [Mon, 9 Nov 2015 13:26:11 +0000 (13:26 +0000)]
ArmPkg/ArmLib: remove unused ArmCleanDataCacheToPoU()
The function ArmCleanDataCacheToPoU() has no users, and its purpose
is unclear, since it uses cache maintenance by set/way to perform
the clean to PoU, which is a dubious practice to begin with. So
remove the declaration and all definitions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18752
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Ard Biesheuvel [Mon, 9 Nov 2015 13:25:50 +0000 (13:25 +0000)]
ArmPkg BeagleBoardPkg Omap35xxPkg: fix typo 'ArmDataSyncronizationBarrier'
Replace all instances of ArmDataSyncronizationBarrier with
ArmDataSynchronizationBarrier.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18751
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Ard Biesheuvel [Mon, 9 Nov 2015 13:25:31 +0000 (13:25 +0000)]
ArmPkg/ArmLib: remove unused ARM9 support
The ARM9 ArmLib implementation is not referenced anywhere in the
tree, and unlikely to be useful going forward, considering that
ARM9 outdates even ARMv6. So remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18750
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Mark Rutland [Mon, 9 Nov 2015 13:25:12 +0000 (13:25 +0000)]
ArmPkg/ArmLib: fix barriers in AArch64 ArmEnableMmu
The ARM architecture requires a DSB to complete TLB maintenance, with a
subsequent ISB being required to synchronize subsequent items in the
current instruction stream against the completed TLB maintenance.
The ArmEnableMmu function is currently missing the DSB, and hence the
TLB maintenance is not guaranteed to have completed at the point the MMU
is enabled. This may result in unpredictable behaviour.
The DSB subsequent to the write to SCTLR_EL1 is unnecessary; the ISB
alone is sufficient to complete all prior instructions and to
synchronise the new context with any subsequent instructions.
This patch adds missing DSBs to complete TLB maintenance, and removes
the unnecessary trailing DSB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18749
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Ashutosh Singh [Mon, 9 Nov 2015 13:13:37 +0000 (13:13 +0000)]
ArmPkg/BdsLib: Increase fallback tftp buffer size
When performing a tftp download from a server which does not support
rfc2349 transfer size option (such as netkit-tftpd), the existing code
falls back to allocating an 8MB buffer. Since this is insufficient for
an uncompressed AArch64 Linux kernel image, double the size to 16MB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ashutosh Singh <ashutosh.singh@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18748
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Ard Biesheuvel [Mon, 9 Nov 2015 08:39:28 +0000 (08:39 +0000)]
BaseTools GCC: move PECOFF_HEADER_SIZE definition before LD script
Older versions of binutils need all symbols to be defined when consuming
the linker script passed via the command line. So move the definition
'--defsym=PECOFF_HEADER_SIZE=...' before the '--script=...' command line
argument.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18747
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Yonghong Zhu [Mon, 9 Nov 2015 07:43:07 +0000 (07:43 +0000)]
BaseTools: Allow decimal values in the EDK II meta-data file
Because the EDK II meta-data specifications already allow using decimal
values in the EDK II Meta-data file [Defines] section, this patch update
code to allow this usage.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18746
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Zhang Lubo [Mon, 9 Nov 2015 07:00:20 +0000 (07:00 +0000)]
NetworkPkg:Fix the issue that cannot parse ipv6 address correctly.
If there is a ipv6 expressed url, the NetLibAsciiStrToIp6 cannot get the Ipv6
address from the host name, because the host name contains left and right
bracket which cannot be used to configure the Tcp6 connection.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18745
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Zhang Lubo [Mon, 9 Nov 2015 03:45:23 +0000 (03:45 +0000)]
MdeModulePkg:Fix a bug that HttpLib can not parse Ipv6 address correctly.
When parsing the authority component of the input URL, it can not distinguish
the ":" is the flag that indicates the port or the separator between
the ipv6 address.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Gary Ching-Pang Lin <glin@suse.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18744
6f19259b-4bc3-4df7-8a09-
765794883524
Zhang Lubo [Mon, 9 Nov 2015 03:30:42 +0000 (03:30 +0000)]
NetworkPkg:Enable Http Boot over Ipv6 stack
Add new features to support Http boot over ipv6 stack.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18743
6f19259b-4bc3-4df7-8a09-
765794883524
Qiu Shumin [Mon, 9 Nov 2015 02:29:31 +0000 (02:29 +0000)]
ShellPkg: Don't strip positional parameters of quotation marks.
Per Shell SPEC 2.1 'Double-quotation marks that surround arguments are not stripped in positional parameters'. This patch makes Shell implementation to follow SPEC.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18742
6f19259b-4bc3-4df7-8a09-
765794883524