mirror_edk2.git
23 months agoIntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:01:35 +0000 (10:01 +0800)]
IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months agoIntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:00:10 +0000 (10:00 +0800)]
IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months agoIntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 01:57:00 +0000 (09:57 +0800)]
IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months agoIntelFsp2Pkg/FspSecCore: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 01:54:52 +0000 (09:54 +0800)]
IntelFsp2Pkg/FspSecCore: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months agoIntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b
Chasel, Chiu [Fri, 28 Sep 2018 02:31:37 +0000 (10:31 +0800)]
IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b

Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoShellPkg/TftpDynamicCommand: Fix the potentially uninitialized local variable used.
Jiaxin Wu [Thu, 27 Sep 2018 10:43:23 +0000 (18:43 +0800)]
ShellPkg/TftpDynamicCommand: Fix the potentially uninitialized local variable used.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1217

Local variable 'Mtftp4Token' might be uninitialized when error happen. This patch is to
resolve the issue.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoEmulatorPkg/EmulatorPkg.dsc: override PCD default to avoid boot failure
Jian J Wang [Thu, 27 Sep 2018 07:01:37 +0000 (15:01 +0800)]
EmulatorPkg/EmulatorPkg.dsc: override PCD default to avoid boot failure

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1215

This issue is caused by commit 5267926134d17e86672b84fd57b438f05ffa68e1.

The reason is this commit changed the condition of building page table
in DxeIpl. The code before it will only build page table for the sake
of PcdSetNxForStack. This commit added PcdImageProtectionPolicy and
PcdDxeNxMemoryProtectionPolicy into the logic. But the default value of
PcdImageProtectionPolicy is 02, which means the DxeIpl should build page
table. Due to the fact that EmulatorPkg doesn't support page table at all,
this will cause exception on Windows OS.

This patch solves this issue by setting PcdImageProtectionPolicy to 0
explicitly in EmulatorPkg.dsc.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoNt32Pkg/Nt32Pkg.dsc: override PCD default to avoid boot failure
Jian J Wang [Thu, 27 Sep 2018 06:56:58 +0000 (14:56 +0800)]
Nt32Pkg/Nt32Pkg.dsc: override PCD default to avoid boot failure

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1215

This issue is caused by commit 5267926134d17e86672b84fd57b438f05ffa68e1.

The reason is this commit changed the condition of building page table
in DxeIpl. The code before it will only build page table for the sake
of PcdSetNxForStack. This commit added PcdImageProtectionPolicy and
PcdDxeNxMemoryProtectionPolicy into the logic. But the default value of
PcdImageProtectionPolicy is 02, which means the DxeIpl should build page
table. Due to the fact that Nt32Pkg doesn't support page table at all,
this will cause exception on Windows OS.

This patch solves this issue by setting PcdImageProtectionPolicy to 0
explicitly in Nt32Pkg.dsc.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoGenCfgOpt.py: remove tailing space from output file
Chasel, Chiu [Wed, 26 Sep 2018 11:50:42 +0000 (19:50 +0800)]
GenCfgOpt.py: remove tailing space from output file

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1212

UPD header files generated by GenCfgOpt.py may have
tailing white space from some of the UPD description in DSC,
especially when python script automatically switching lines
for long description string. This patch will always remove
tailing white space for UPD header files.

Test: Verified the patch can remove tailing space in
      output header files when UPD DSC contains intentional
      tailing white space.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
23 months agoIntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment
Chasel, Chiu [Wed, 26 Sep 2018 11:21:11 +0000 (19:21 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1211

For reducing maintenance effort, the UPD offset can be
automatic assigned by GenCfgOpt.py following by alignment
requirements.

The usage model as below:
. If UPD offset in DSC file are all '*', GenCfgOpt.py will
  assign offset for all UPD automatically. In this case no
  need to manually hardcode offset to all UPD in DSC.

. If UPD offset in DSC file are all not '*', GenCfgOpt.py
  will use hardcoded offset directly (original usage model)

. Tool does not support mixing scenario so UPD offset in DSC
  should be all '*' or all hardcoded but not mixed.

In auto mode UPD offset will be assigned following natural
alignment (size aligned) rule and the whole structure size
will align to either 32bits or 64bits depends on maximal UPD
size in the structure.

Test: Verified by both UPD offset hardcoded or '*' in DSC and
      generated UPD header files are correct.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
23 months agoIntelFsp2Pkg/GenCfgOpt.py: support FixedAtBuild PCD
Chasel, Chiu [Wed, 26 Sep 2018 02:52:36 +0000 (10:52 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: support FixedAtBuild PCD

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1210

FixedAtBuild PCD is suggested to be used instead
of FeatureFlag PCD so extend this tool to support.
Also skipped PCDs which commented out by '#'.

Test: Verified with FixedAtBuild PCD for including or
excluding lines in generated UPD header files successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
23 months ago[PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample:
Chasel, Chiu [Thu, 27 Sep 2018 07:39:33 +0000 (15:39 +0800)]
[PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample:
 Remove PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months ago[PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an
Chasel, Chiu [Thu, 27 Sep 2018 07:36:48 +0000 (15:36 +0800)]
[PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an
 unused PCD

The PCD below is unused, so it has been removed from inf.
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months ago[PATCH v3 04/16] IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused
Chasel, Chiu [Thu, 27 Sep 2018 07:35:06 +0000 (15:35 +0800)]
[PATCH v3 04/16] IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused
 PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months ago[PATCH v3 03/16] IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs
Chasel, Chiu [Thu, 27 Sep 2018 07:32:19 +0000 (15:32 +0800)]
[PATCH v3 03/16] IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months ago[PATCH v3 02/16] IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs
Chasel, Chiu [Thu, 27 Sep 2018 07:27:51 +0000 (15:27 +0800)]
[PATCH v3 02/16] IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.

gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months ago[PATCH v3 01/16] IntelFsp2Pkg/FspSecCore: Remove unused PCDs
Chasel, Chiu [Thu, 27 Sep 2018 07:01:09 +0000 (15:01 +0800)]
[PATCH v3 01/16] IntelFsp2Pkg/FspSecCore: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.

gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
23 months agoUefiCpuPkg PiSmmCpuDxeSmm: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:41:07 +0000 (16:41 +0800)]
UefiCpuPkg PiSmmCpuDxeSmm: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates PiSmmCpuDxeSmm to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoShellPkg DpDynamicCommand: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:40:40 +0000 (16:40 +0800)]
ShellPkg DpDynamicCommand: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates DpDynamicCommand to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
23 months agoPcAtChipsetPkg PcRtc: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:40:09 +0000 (16:40 +0800)]
PcAtChipsetPkg PcRtc: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates PcatRealTimeClockRuntimeDxe to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
23 months agoMdeModulePkg S3SaveStateDxe: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:39:38 +0000 (16:39 +0800)]
MdeModulePkg S3SaveStateDxe: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates S3SaveStateDxe to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
23 months agoIntelSiliconPkg IntelVTdDxe: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:38:46 +0000 (16:38 +0800)]
IntelSiliconPkg IntelVTdDxe: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates IntelVTdDxe to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
23 months agoIntelFrameworkPkg FrameworkUefiLib: Add new EfiLocateXXXAcpiTable APIs
Star Zeng [Wed, 19 Sep 2018 00:55:33 +0000 (08:55 +0800)]
IntelFrameworkPkg FrameworkUefiLib: Add new EfiLocateXXXAcpiTable APIs

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch adds new EfiLocateXXXAcpiTable() APIs in UefiLib
for the request and also the following patch to remove the
duplicated code.

V2:
ASSERT(FALSE) and return NULL instead of real implementation for the
new APIs as the IntelFrameworkPkg is a to-be-deprecated packages.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
23 months agoMdePkg UefiLib: Add new EfiLocateXXXAcpiTable() APIs
Star Zeng [Fri, 8 Jun 2018 09:12:01 +0000 (17:12 +0800)]
MdePkg UefiLib: Add new EfiLocateXXXAcpiTable() APIs

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch adds new EfiLocateXXXAcpiTable() APIs in UefiLib
for the request and also the following patch to remove the
duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoNetworkPkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in MdeModulePkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:37:20 +0000 (11:37 +0800)]
NetworkPkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to UefiPxeBcDxe in MdeModulePkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoNetworkPkg/IScsiDxe: Add the clarification compared to IScsiDxe in MdeModulePkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:36:50 +0000 (11:36 +0800)]
NetworkPkg/IScsiDxe: Add the clarification compared to IScsiDxe in MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to IScsiDxe in MdeModulePkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoNetworkPkg/TcpDxe: Add the clarification compared to Tcp4Dxe in MdeModulePkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:36:09 +0000 (11:36 +0800)]
NetworkPkg/TcpDxe: Add the clarification compared to Tcp4Dxe in MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to Tcp4Dxe in MdeModulePkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoMdeModulePkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in NetworkPkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:35:00 +0000 (11:35 +0800)]
MdeModulePkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in NetworkPkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to UefiPxeBcDxe in NetworkPkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoMdeModulePkg/IScsiDxe: Add the clarification compared to IScsiDxe in NetworkPkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:33:07 +0000 (11:33 +0800)]
MdeModulePkg/IScsiDxe: Add the clarification compared to IScsiDxe in NetworkPkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to IScsiDxe in NetworkPkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoMdeModulePkg/Tcp4Dxe: Add the clarification compared to TcpDxe in NetworkPkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:34:10 +0000 (11:34 +0800)]
MdeModulePkg/Tcp4Dxe: Add the clarification compared to TcpDxe in NetworkPkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to TcpDxe in NetworkPkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoNetworkPkg/UefiPxeBcDxe: Use the specified MTFTP windowsize.
Jiaxin Wu [Fri, 14 Sep 2018 07:49:23 +0000 (15:49 +0800)]
NetworkPkg/UefiPxeBcDxe: Use the specified MTFTP windowsize.

*v2: Since the new PCD (PcdPxeTftpWindowSize) was renamed/defined in
NetworkPkg instead of MdeModulePkg, this new version is to update the
consuming PXE driver.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to use the specified MTFTP windowsize to benefit the PXE
download performance.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
23 months agoNetworkPkg: Define one PCD for PXE to specify MTFTP windowsize.
Jiaxin Wu [Fri, 21 Sep 2018 07:09:55 +0000 (15:09 +0800)]
NetworkPkg: Define one PCD for PXE to specify MTFTP windowsize.

*v2: Rename and redefine the PCD in NetworkPkg instead of MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to define one new PCD for PXE driver to specify MTFTP windowsize so as
to improve the PXE download performance. The default value is set to 4.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoShellPkg/TftpDynamicCommand: Add one option for tftp command to specify windowsize.
Jiaxin Wu [Fri, 14 Sep 2018 07:48:17 +0000 (15:48 +0800)]
ShellPkg/TftpDynamicCommand: Add one option for tftp command to specify windowsize.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to define one new option for TFTP shell command to specify the
windowsize option as defined in RFC 7440. Valid range is between 1 and 64,
default value is 1.

Note that: RFC 7440 does not mention max window size value, but for the
stability reason, the value is limited to 64.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
23 months agoNetworkPkg/Mtftp6Dxe: Support windowsize in read request operation.
Jiaxin Wu [Fri, 14 Sep 2018 07:47:52 +0000 (15:47 +0800)]
NetworkPkg/Mtftp6Dxe: Support windowsize in read request operation.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to support the TFTP windowsize option described in RFC 7440.
The feature allows the client and server to negotiate a window size of
consecutive blocks to send as an alternative for replacing the single-block
lockstep schema.

Currently, the windowsize for write request operation is not supported since
there is no real use cases.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
23 months agoMdeModulePke/Mtftp4Dxe: Support windowsize in read request operation.
Jiaxin Wu [Fri, 14 Sep 2018 07:47:20 +0000 (15:47 +0800)]
MdeModulePke/Mtftp4Dxe: Support windowsize in read request operation.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to support the TFTP windowsize option described in RFC 7440.
The feature allows the client and server to negotiate a window size of
consecutive blocks to send as an alternative for replacing the single-block
lockstep schema.

Currently, the windowsize for write request operation is not supported since
there is no real use cases.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
23 months agoBaseTool: Support different PCDs that refers to the same EFI variable.
bob.c.feng@intel.com [Tue, 25 Sep 2018 02:55:30 +0000 (10:55 +0800)]
BaseTool: Support different PCDs that refers to the same EFI variable.

If Structure PCD and Normal Pcd refer to the
same EFI variable, do EFI variable merge, otherwise, do
EFI variable combination.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoBaseTool: Replace dict with OrderedDict.
BobCF [Tue, 25 Sep 2018 05:20:46 +0000 (13:20 +0800)]
BaseTool: Replace dict with OrderedDict.

Replace dict with OrderedDict for PCD so that
the pcd list has same order.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoBaseTools: Fix the wrong reference _GetSkuIds() in AutoGen code
Liming Gao [Tue, 25 Sep 2018 01:36:00 +0000 (09:36 +0800)]
BaseTools: Fix the wrong reference _GetSkuIds() in AutoGen code

DscBuildData has been updated to define SkuIds instead of _GetSkuIds().
The consumer code should refer to SkuIds.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
23 months agoMdePkg/BaseSynchronizationLib: fix XADD operands in GCC IA32/X64 assembly
Laszlo Ersek [Tue, 25 Sep 2018 14:58:15 +0000 (16:58 +0200)]
MdePkg/BaseSynchronizationLib: fix XADD operands in GCC IA32/X64 assembly

Currently, "gcc-4.8.5-28.el7_5.1.x86_64" generates the following code for
me, from the XADD inline assembly added to "X64/GccInline.c" in commit
17634d026f96:

0000000000004383 <InternalSyncIncrement>:
> UINT32
> EFIAPI
> InternalSyncIncrement (
>   IN      volatile UINT32    *Value
>   )
> {
>     4383:       55                      push   %rbp
>     4384:       48 89 e5                mov    %rsp,%rbp
>     4387:       48 83 ec 10             sub    $0x10,%rsp
>     438b:       48 89 4d 10             mov    %rcx,0x10(%rbp)
>   UINT32  Result;
>
>   __asm__ __volatile__ (
>     438f:       48 8b 55 10             mov    0x10(%rbp),%rdx
>     4393:       48 8b 45 10             mov    0x10(%rbp),%rax
>     4397:       b8 01 00 00 00          mov    $0x1,%eax
>     439c:       f0 0f c1 00             lock xadd %eax,(%rax)
>     43a0:       ff c0                   inc    %eax
>     43a2:       89 45 fc                mov    %eax,-0x4(%rbp)
>     : "m"  (*Value)           // %2
>     : "memory",
>       "cc"
>     );
>
>   return Result;
>     43a5:       8b 45 fc                mov    -0x4(%rbp),%eax
> }
>     43a8:       c9                      leaveq
>     43a9:       c3                      retq
>

The MOV $0X1,%EAX instruction corrupts the address of Value in %RAX before
we reach the XADD instruction. In fact, it makes no sense for XADD to use
%EAX as source operand and (%RAX) as destination operand at the same time.

The XADD instruction's destination operand is a read-write operand. The
GCC documentation states:

> The ordinary output operands must be write-only; GCC will assume that
> the values in these operands before the instruction are dead and need
> not be generated. Extended asm supports input-output or read-write
> operands. Use the constraint character `+' to indicate such an operand
> and list it with the output operands. You should only use read-write
> operands when the constraints for the operand (or the operand in which
> only some of the bits are to be changed) allow a register.

(The above is intentionally quoted from the oldest GCC release that edk2
supports, namely gcc-4.4:
<https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Extended-Asm.html>.)

Fix the operand list accordingly.

With the patch applied, I get:

0000000000004383 <InternalSyncIncrement>:
> UINT32
> EFIAPI
> InternalSyncIncrement (
>   IN      volatile UINT32    *Value
>   )
> {
>     4383:       55                      push   %rbp
>     4384:       48 89 e5                mov    %rsp,%rbp
>     4387:       48 83 ec 10             sub    $0x10,%rsp
>     438b:       48 89 4d 10             mov    %rcx,0x10(%rbp)
>   UINT32  Result;
>
>   __asm__ __volatile__ (
>     438f:       48 8b 55 10             mov    0x10(%rbp),%rdx
>     4393:       48 8b 45 10             mov    0x10(%rbp),%rax
>     4397:       b8 01 00 00 00          mov    $0x1,%eax
>     439c:       f0 0f c1 02             lock xadd %eax,(%rdx)
>     43a0:       ff c0                   inc    %eax
>     43a2:       89 45 fc                mov    %eax,-0x4(%rbp)
>     :                         // no inputs that aren't also outputs
>     : "memory",
>       "cc"
>     );
>
>   return Result;
>     43a5:       8b 45 fc                mov    -0x4(%rbp),%eax
> }
>     43a8:       c9                      leaveq
>     43a9:       c3                      retq

Note that some other bugs remain in
"BaseSynchronizationLib/*/GccInline.c"; those should be addressed later,
under <https://bugzilla.tianocore.org/show_bug.cgi?id=1208>.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1207
Fixes: 17634d026f968c404b039a8d8431b6389dd396ea
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
23 months agoUefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition.
Eric Dong [Tue, 25 Sep 2018 00:30:06 +0000 (08:30 +0800)]
UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition.

V3 changes include:
  1. Keep the ReservedX not change if bit info not changed for this field.

V2 changes include:
  1. Use X in ReservedX fields from totally new value if MSR structure definition changed.
     For example, if in current structure, the max reserved variable is Reserved2, in new
     definition, reserved variable is begin with Reserved3.

V1 Changes:
Changes includes:
  1. Update MSR structure definition, change some reserved fields to useful fields:
     1. MSR_XEON_PHI_PKG_CST_CONFIG_CONTROL_REGISTER
     2. MSR_XEON_PHI_SMM_MCA_CAP_REGISTER
  2. For MSR_XEON_PHI_PMG_IO_CAPTURE_BASE_REGISTER structure, it expand the field range.
     Old definition like below:
       typedef union {
         ///
         /// Individual bit fields
         ///
         struct {
           ///
           /// [Bits 15:0] LVL_2 Base Address (R/W).
           ///
           UINT32  Lvl2Base:16;
           ///
           /// [Bits 18:16] C-state Range (R/W)  Specifies the encoding value of the
           /// maximum C-State code name to be included when IO read to MWAIT
           /// redirection is enabled by MSR_PKG_CST_CONFIG_CONTROL[bit10]: 100b - C4
           /// is the max C-State to include 110b - C6 is the max C-State to include.
           ///
           UINT32  CStateRange:3;
           UINT32  Reserved1:13;
           UINT32  Reserved2:32;
         } Bits;
         ///
         /// All bit fields as a 32-bit value
         ///
         UINT32  Uint32;
         ///
         /// All bit fields as a 64-bit value
         ///
         UINT64  Uint64;
       } MSR_XEON_PHI_PMG_IO_CAPTURE_BASE_REGISTER;
    This patch make below changes for this data structure, it expand "CStateRange" field width.
      old one:
        UINT32  CStateRange:3;
        UINT32  Reserved1:13;
      new one:
        UINT32  CStateRange:7;
        UINT32  Reserved1:9;

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.
Eric Dong [Tue, 25 Sep 2018 00:32:31 +0000 (08:32 +0800)]
UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.

V3 changes include:
  1. Keep ReservedX not change if bit info not changed for this field.

V2 changes include:
  1. Use X in ReservedX fields from totally new value if MSR structure definition changed.
     For example, if in current structure, the max reserved variable is Reserved2, in new
     definition, reserved variable is begin with Reserved3.

V1 Changes includes:
  1. Change fields which is reserved in old version: MSR_IA32_RTIT_CTL_REGISTER

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.
Eric Dong [Fri, 14 Sep 2018 00:59:27 +0000 (08:59 +0800)]
UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.

Changes includes:
  1. Change MSR name:
    1. MSR_GOLDMONT_SGXOWNER0 => MSR_GOLDMONT_SGXOWNEREPOCH0
    2. MSR_GOLDMONT_SGXOWNER1 => MSR_GOLDMONT_SGXOWNEREPOCH1
  2. Keep old MSR definition (MSR_GOLDMONT_SGXOWNER0/1) for compatibility.
    1. Define old MSR like below style:
           #define MSR_GOLDMONT_SGXOWNER0   MSR_GOLDMONT_SGXOWNEREPOCH0

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one.
Eric Dong [Fri, 14 Sep 2018 00:54:46 +0000 (08:54 +0800)]
UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one.

Changes includes:
  1. Change MSR name:
    1. MSR_SKYLAKE_SGXOWNER0 => MSR_SKYLAKE_SGXOWNEREPOCH0
    2. MSR_SKYLAKE_SGXOWNER1 => MSR_SKYLAKE_SGXOWNEREPOCH1
  2. Keep old MSR definition(MSR_SKYLAKE_SGXOWNER0/1) for compatibility
    1. Use below coding style to define old MSR
         #define MSR_SKYLAKE_SGXOWNER0  MSR_SKYLAKE_SGXOWNEREPOCH0

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/CoreMsr.h: Remove old MSR.
Eric Dong [Mon, 3 Sep 2018 02:22:19 +0000 (10:22 +0800)]
UefiCpuPkg/Include/Register/Msr/CoreMsr.h: Remove old MSR.

Changes includes:
  1. Remove old MSR which not existed in 2018-05 version spec:
     1. MSR_CORE_ROB_CR_BKUPTMPDR6

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/P6Msr.h: Remove old MSR.
Eric Dong [Thu, 30 Aug 2018 06:10:17 +0000 (14:10 +0800)]
UefiCpuPkg/Include/Register/Msr/P6Msr.h: Remove old MSR.

Changes includes:
  1. Remove MSR which not existed in 2018-05 version spec: MSR_P6_ROB_CR_BKUPTMPDR6.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR.
Eric Dong [Thu, 30 Aug 2018 06:07:59 +0000 (14:07 +0800)]
UefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR.

Changes includes:
  1. Remove old MSR which not existed in 2018-05 version spec:
     1. MSR_CORE2_BBL_CR_CTL3

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 06:13:13 +0000 (14:13 +0800)]
UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR.

Changes includes:
  1. Add new MSRs: MSR_IA32_L2_QOS_CFG/MSR_IA32_CSTAR.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs.
Eric Dong [Thu, 30 Aug 2018 06:22:09 +0000 (14:22 +0800)]
UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs.

Changes includes:
  1. Add new MSR definitions.
  2. Add support platform info.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 06:04:38 +0000 (14:04 +0800)]
UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Add new MSR.

Changes includes:
  1. Add new MSR definition:
     1. MSR_XEON_PHI_PPIN_CTL
     2. MSR_XEON_PHI_PPIN
     3. MSR_XEON_PHI_MISC_FEATURE_ENABLES
     4. MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT
  2. Add DisplayModule == 0x85 supports.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/*.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 05:57:58 +0000 (13:57 +0800)]
UefiCpuPkg/Include/Register/Msr/*.h: Add new MSR.

Changes includes:
  1. Add new MSR: MSR_*_MSRUNCORE_RATIO_LIMIT

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 05:49:16 +0000 (13:49 +0800)]
UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR.

Changes includes:
  1. Add new MSR: MSR_SILVERMONT_PLATFORM_INFO

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont...
Eric Dong [Mon, 27 Aug 2018 12:19:20 +0000 (20:19 +0800)]
UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture.

Changes includes:
  1. Add new MSR file which used for goldmont plus microarchitecture.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/Include/Register/Msr: Update reference spec info.
Eric Dong [Mon, 27 Aug 2018 08:20:26 +0000 (16:20 +0800)]
UefiCpuPkg/Include/Register/Msr: Update reference spec info.

Latest SDM has moved MSR related content from volume 3 chapter 35 to volume 4
chapter 2. Current MSR's comments need to be updated to reference the new
chapter info.

Changes includes:
  1. Update referenced chapter info from some MSRs.
  2. Update referenced SDM version info.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg/MtrrLib: Revert "Skip MSR access when the pair is invalid"
Ruiyu Ni [Tue, 25 Sep 2018 05:21:40 +0000 (13:21 +0800)]
UefiCpuPkg/MtrrLib: Revert "Skip MSR access when the pair is invalid"

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1187

The patch reverts 9c8c4478cfcacaf5fd60b75ff78d26732d93a5b8
"UefiCpuPkg/MtrrLib: Skip Base MSR access when the pair is invalid".

Microsoft Windows will report an error in event manager if MTRR
usage is different across hibernate even when the difference is
in an non valid MTRR pair. This seems like a bug in Windows but
for compatibility and servicing reasons we think a change in UEFI
would wise.
A Windows change has already been submitted for the next iteration
(2019 time frame).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
23 months agoMdeModulePkg/PciHostBridge: Move declaration of mIoMmu to header file
Ruiyu Ni [Tue, 25 Sep 2018 02:58:56 +0000 (10:58 +0800)]
MdeModulePkg/PciHostBridge: Move declaration of mIoMmu to header file

The change doesn't have functionality impact.
It just renames the mIoMmuProtocol to mIoMmu and moves the
declaration from PciRootBridgeIo.c to PciHostBridge.h.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Suggested-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoMdeModulePkg/PciHostBridge: Add RESOURCE_VALID() to simplify code
Ruiyu Ni [Fri, 21 Sep 2018 07:22:46 +0000 (15:22 +0800)]
MdeModulePkg/PciHostBridge: Add RESOURCE_VALID() to simplify code

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
23 months agoMdeModulePkg/PciHostBridge: Fix a bug that prevents PMEM access
Ruiyu Ni [Fri, 21 Sep 2018 07:20:45 +0000 (15:20 +0800)]
MdeModulePkg/PciHostBridge: Fix a bug that prevents PMEM access

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1196

RootBridgeIoCheckParameter() verifies that the requested MMIO access
can fit in any of the MEM/PMEM 32/64 ranges. But today's logic
somehow only checks the requested access against MEM 32/64 ranges.

It should also check the requested access against PMEM 32/64 ranges.

The patch fixes this issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
23 months agoMdeModulePkg/PciHostBridge: Enhance boundary check in Io/Mem.Read/Write
Ruiyu Ni [Fri, 21 Sep 2018 07:02:44 +0000 (15:02 +0800)]
MdeModulePkg/PciHostBridge: Enhance boundary check in Io/Mem.Read/Write

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
23 months agoUefiCpuPkg/CpuMpPei: fix vs2012 build error
Jian J Wang [Tue, 18 Sep 2018 07:17:11 +0000 (15:17 +0800)]
UefiCpuPkg/CpuMpPei: fix vs2012 build error

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1166

Visual Studio 2012 will complain uninitialized variable, StackBase,
in the CpuPaging.c. This patch adds code to init it to zero and
ASSERT check against 0. This is enough since uninit case will only
happen during retrieving stack memory via gEfiHobMemoryAllocStackGuid.
But this HOB will always be created in advance.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
23 months agoMdeModulePkg/DxeIpl: support more NX related PCDs
Jian J Wang [Tue, 25 Sep 2018 08:49:19 +0000 (16:49 +0800)]
MdeModulePkg/DxeIpl: support more NX related PCDs

BZ#1116: https://bugzilla.tianocore.org/show_bug.cgi?id=1116

Currently IA32_EFER.NXE is only set against PcdSetNxForStack. This
confuses developers because following two other PCDs also need NXE
to be set, but actually not.

    PcdDxeNxMemoryProtectionPolicy
    PcdImageProtectionPolicy

This patch solves this issue by adding logic to enable IA32_EFER.NXE
if any of those PCDs have anything enabled.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoMdeModulePkg/MdeModulePkg.dec/.uni: clarify PCDs usage
Jian J Wang [Fri, 14 Sep 2018 02:01:28 +0000 (10:01 +0800)]
MdeModulePkg/MdeModulePkg.dec/.uni: clarify PCDs usage

BZ#1116: https://bugzilla.tianocore.org/show_bug.cgi?id=1116

The usage of following PCDs described in MdeModulePkg.dec don't match
the implementation exactly. This patch updates related description in
both .dec and .uni files to avoid confusion in platform configuration.

  PcdSetNxForStack
  PcdImageProtectionPolicy
  PcdDxeNxMemoryProtectionPolicy

The main change is at the statement on how to handle the FALSE or 0
setting value in those PCDs. Current statement says the implementation
should unset or disable related features but in fact the related code
just do nothing (leave it to AS-IS). That means the result might be
disabled, or might be not. It depends on other features or platform
policy.

For example, if one don't want to enforce NX onto stack memory, he/she
needs to set PcdSetNxForStack to FALSE as well as to clear BIT4 of
PcdDxeNxMemoryProtectionPolicy.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
23 months agoUefiCpuPkg SecCore:Add a GUID removed previously
Zhang, Shenglei [Tue, 25 Sep 2018 03:51:14 +0000 (11:51 +0800)]
UefiCpuPkg SecCore:Add a GUID removed previously

The Guid gPeiSecPerformancePpiGuid removed previously
is added into SecCore.inf.
https://bugzilla.tianocore.org/show_bug.cgi?id=1203

Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
23 months agoMdeModulePkg: XhciDxe: Prevent illegal memory access in XhcSetHsee
Marcin Wojtas [Tue, 25 Sep 2018 21:57:51 +0000 (05:57 +0800)]
MdeModulePkg: XhciDxe: Prevent illegal memory access in XhcSetHsee

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1206

Newly added XhcSetHsee() routine reads 4 bytes into
a UINT16 variable causing issues on PCIE and NonDiscoverable
Xhci controllers. Fix that.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Fei1 Wang <fei1.wang@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoMdePkg: Removing ipf which is no longer supported from edk2.
Chen A Chen [Mon, 2 Jul 2018 01:21:05 +0000 (09:21 +0800)]
MdePkg: Removing ipf which is no longer supported from edk2.

Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
  [Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
  of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.

Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.

Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.

Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoEmulatorPkg: Removing ipf which is no longer supported from edk2.
Chen A Chen [Fri, 29 Jun 2018 03:22:32 +0000 (11:22 +0800)]
EmulatorPkg: Removing ipf which is no longer supported from edk2.

Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
  [Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
  of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.

Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.

Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.

Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
23 months agoEdkCompatibilityPkg: Removing ipf from edk2.
Chen A Chen [Fri, 29 Jun 2018 03:19:34 +0000 (11:19 +0800)]
EdkCompatibilityPkg: Removing ipf from edk2.

Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
  [Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
  of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.

Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.

Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.

Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.

The following rules are specially proposed by package owner:
* Remove CommonIpf.dsc file.
* Update Common.dsc file, to remove the section with IPF key.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
23 months agoCryptoPkg: Removing ipf which is no longer supported from edk2.
Chen A Chen [Fri, 29 Jun 2018 03:18:06 +0000 (11:18 +0800)]
CryptoPkg: Removing ipf which is no longer supported from edk2.

Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
  [Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
  of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.

Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.

Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.

Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.

The following rules are specially proposed by package owner:
* Remove whole "CryptRuntimeDxe" folder which was designed for IPF.
* Remove whole "Include/Protocol" folder
* Update .Dec and .Dsc file accordingly.

Cc: Qin Long <qin.long@intel.com>
Cc: Ting Ye <ting.ye@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Long Qin <qin.long@intel.com>
23 months agoSignedCapsulePkg: Remove PalLib in dsc which was missed at 52664c5
Chen A Chen [Wed, 19 Sep 2018 06:13:12 +0000 (14:13 +0800)]
SignedCapsulePkg: Remove PalLib in dsc which was missed at 52664c5

The PalLib is IPF specific and will be removed from MdePkg.
So this patch removes PalLib in SignedCapsulePkg.dsc which was missed
at 52664c525223a36e5cb9b141b11dec413908b1dd.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
23 months agoMdeModulePkg: Remove PalLib in dsc which was missed at de00522
Chen A Chen [Wed, 19 Sep 2018 06:12:37 +0000 (14:12 +0800)]
MdeModulePkg: Remove PalLib in dsc which was missed at de00522

The PalLib is IPF specific and will be removed from MdePkg.
So this patch removes PalLib in MdeModulePkg.dsc which was missed
at de005223b77c473d45c9c8a11147f6968325f73e.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoIntelFrameworkModulePkg: Remove PalLib in dsc
Chen A Chen [Wed, 19 Sep 2018 06:11:51 +0000 (14:11 +0800)]
IntelFrameworkModulePkg: Remove PalLib in dsc

Remove PalLib in dsc which was missed at 64bbf1d.
The PalLib is IPFspecific and will be removed from MdePkg.
So this patch removes PalLib in IntelFrameworkModulePkg.dsc
which was missed at 64bbf1dee2eca68d3410be9d05b2553da337051c.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoMdePkg/SynchronizationLib: fix Interlocked[De|In]crement return value
Ruiyu Ni [Fri, 7 Sep 2018 09:26:14 +0000 (17:26 +0800)]
MdePkg/SynchronizationLib: fix Interlocked[De|In]crement return value

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1197

Today's InterlockedIncrement()/InterlockedDecrement() guarantees to
perform atomic increment/decrement but doesn't guarantee the return
value equals to the new value.

The patch fixes the behavior to use "XADD" instruction to guarantee
the return value equals to the new value.

The patch calls intrinsic functions for MSVC tool chain, calls the
NASM implementation for INTEL tool chain and calls GCC inline
assembly implementation (GccInline.c) for GCC tool chain.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
23 months agoMdePkg UefiPciLibPciRootBridgeIo: Remove redundant dependency
Zhang, Shenglei [Tue, 25 Sep 2018 01:31:24 +0000 (09:31 +0800)]
MdePkg UefiPciLibPciRootBridgeIo: Remove redundant dependency

PiDxe.h is not used PciSegmentLib.h.
So <PiDxe.h> is deleted.
https://bugzilla.tianocore.org/show_bug.cgi?id=1184

v2:Update the bugzilla link.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoMdePkg UefiPciSegmentLibPciRootBridgeIo: Remove redundant dependency
Zhang, Shenglei [Tue, 18 Sep 2018 03:29:02 +0000 (11:29 +0800)]
MdePkg UefiPciSegmentLibPciRootBridgeIo: Remove redundant dependency

PiDxe.h is not used PciSegmentLib.h.
So "#include <PiDxe.h>" is deleted.
https://bugzilla.tianocore.org/show_bug.cgi?id=1183

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoMdePkg: Add a inf path in MdePkg.dsc
Zhang, Shenglei [Fri, 14 Sep 2018 08:54:35 +0000 (16:54 +0800)]
MdePkg: Add a inf path in MdePkg.dsc

DxeRuntimeDebugLibSerialPort.inf is missing in MdePkg.dsc.
So add the path into it.
https://bugzilla.tianocore.org/show_bug.cgi?id=1177

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoBaseTools: Latter full value should overwrite the former field value.
Zhao, ZhiqiangX [Wed, 12 Sep 2018 09:19:26 +0000 (17:19 +0800)]
BaseTools: Latter full value should overwrite the former field value.

For structure Pcd, the latter full assign value in commandLine should
override the former field assign value. For example in commandLine,
build --pcd Token.pcd.field="haha" --pcd Token.pcd=H"{0x01,0x02}",
the former field value "haha" will be ignored and overwrite by the latter
full value "{0x01,0x02}".

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: ZhiqiangX Zhao <zhiqiangx.zhao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoMdeModulePkg RegularExpressionDxe: Update Oniguruma to 6.9.0
Dongao Guo [Thu, 6 Sep 2018 08:04:58 +0000 (16:04 +0800)]
MdeModulePkg RegularExpressionDxe: Update Oniguruma to 6.9.0

https://bugzilla.tianocore.org/show_bug.cgi?id=1200
Update Oniguruma to the latest version v6.9.0.
Oniguruma https://github.com/kkos/oniguruma
Verify VS2017, GCC5 build.
Verify RegularExpressionProtocol GetInfo() and Match() function.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dongao Guo <dongao.guo@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Cinnamon Shia <cinnamon.shia@hpe.com>
23 months agoUefiCpuPkg PiSmmCpuDxeSmm: Update SmiEntry function run the same position
Liming Gao [Fri, 21 Sep 2018 00:56:01 +0000 (08:56 +0800)]
UefiCpuPkg PiSmmCpuDxeSmm: Update SmiEntry function run the same position

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1191

Before commit e21e355e2ca7fefb15b4df7078f995d3fb9c2b89, jmp _SmiHandler
is commented. And below code, ASM_PFX(CpuSmmDebugEntry) is moved into rax,
then call it. But, this code doesn't work in XCODE5 tool chain. Because XCODE5
doesn't generated the absolute address in the EFI image. So, rax stores the
relative address. Once this logic is moved to another place, it will not work.
;   jmp     _SmiHandler                 ; instruction is not needed
...
    mov     rax, ASM_PFX(CpuSmmDebugEntry)
    call    rax

Commit e21e355e2ca7fefb15b4df7078f995d3fb9c2b89 is to support XCODE5.
One tricky way is selected to fix it. Although SmiEntry logic is copied to
another place and run, but here jmp _SmiHandler is enabled to jmp the original
code place, then call ASM_PFX(CpuSmmDebugEntry) with the relative address.
    mov     rax, strict qword 0         ;   mov     rax, _SmiHandler
_SmiHandlerAbsAddr:
    jmp     rax
...
    call    ASM_PFX(CpuSmmDebugEntry)

Now, BZ 1191 raises the issue that SmiHandler should run in the copied address,
can't run in the common address. So, jmp _SmiHandler is required to be removed,
the code is kept to run in copied address. And, the relative address is
requried to be fixed up to the absolute address. The necessary changes should
not affect the behavior of platforms that already consume PiSmmCpuDxeSmm.
OVMF SMM boot to shell with VS2017, GCC5 and XCODE5 tool chain has been verified.
...
    mov     rax, strict qword 0         ;   call    ASM_PFX(CpuSmmDebugEntry)
CpuSmmDebugEntryAbsAddr:
    call    rax

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
23 months agoMdePkg/BasePeCoffLib: remove PE/COFF header workaround for ELILO on IPF
Ard Biesheuvel [Fri, 7 Sep 2018 05:42:01 +0000 (07:42 +0200)]
MdePkg/BasePeCoffLib: remove PE/COFF header workaround for ELILO on IPF

Now that Itanium support has been dropped, we can remove the various
occurrences of the ELILO on Itanium PE/COFF header workaround.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=816
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
23 months agoMdeModulePkg: remove PE/COFF header workaround for ELILO on IPF
Ard Biesheuvel [Fri, 7 Sep 2018 05:42:00 +0000 (07:42 +0200)]
MdeModulePkg: remove PE/COFF header workaround for ELILO on IPF

Now that Itanium support has been dropped, we can remove the various
occurrences of the ELILO on Itanium PE/COFF header workaround.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=816
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoUefiCpuPkg: Remove redundant library classes, Ppis and GUIDs
shenglei [Tue, 18 Sep 2018 08:28:13 +0000 (16:28 +0800)]
UefiCpuPkg: Remove redundant library classes, Ppis and GUIDs

Some redundant library classes Ppis and GUIDs
have been removed in inf, .c and .h files.

v2:
1.Remove ReadOnlyVariable2.h in S3Resume.c which should be
  deleted in last version in which gEfiPeiReadOnlyVariable2PpiGuid
  was removed.
2.Remove the library class BaseLib in CpuPageTable.c
  which is included elsewhere.
3.Add library classes in SecCore.inf which are removed
  at last version.
  They are DebugAgentLib and CpuExceptionHandlerLib.
4.Add two Ppis in SecCore.inf which are removed
  at last version.
  They are gEfiSecPlatformInformationPpiGuid and
  gEfiSecPlatformInformation2PpiGuid.

https://bugzilla.tianocore.org/show_bug.cgi?id=1043
https://bugzilla.tianocore.org/show_bug.cgi?id=1013
https://bugzilla.tianocore.org/show_bug.cgi?id=1032
https://bugzilla.tianocore.org/show_bug.cgi?id=1016

Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
23 months agoSecurityPkg/TcgStorageOpalLib: Fixed correct user password not works issue.
Eric Dong [Mon, 17 Sep 2018 03:01:19 +0000 (11:01 +0800)]
SecurityPkg/TcgStorageOpalLib: Fixed correct user password not works issue.

After admin password reach the TryLimit value, code logic will direct return
error password result no matter which password been inputted. So even correct
user password will return TryLimit error.

Now update code logic to also check user password. Only when both user/admin
password reach the TryLimit count, code will return exceed TryLimit error.

Change-Id: I17fbd1425b77150eb933a5002a1f87a0f0032e9b
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
23 months agoMdeModulePkg CapsuleApp:Remove two redundant Guids
Zhang, Shenglei [Thu, 20 Sep 2018 08:55:06 +0000 (16:55 +0800)]
MdeModulePkg CapsuleApp:Remove two redundant Guids

Remove two redundant Guids which are not used.
They are gEfiCertTypeRsa2048Sha256Guid and
gEfiCertPkcs7Guid.This is an improved version of
https://bugzilla.tianocore.org/show_bug.cgi?id=1062

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
23 months agoMdeModulePkg/SdMmcPciHcDxe: Execute card detect only for RemovableSlot
Marcin Wojtas [Tue, 18 Sep 2018 08:59:07 +0000 (16:59 +0800)]
MdeModulePkg/SdMmcPciHcDxe: Execute card detect only for RemovableSlot

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1182

Some devices can be non removable (such as eMMC) and checking
Present State Register on host controller may falsely return
an information that device is not present. Execute this
check conditionally on the SloType field value.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
23 months agoMdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits
Tomasz Michalec [Tue, 18 Sep 2018 08:59:06 +0000 (16:59 +0800)]
MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1185

SdMmcHcReset used to set all bits of Software Reset Register to 1
including reserved ones, which on some controllers may result in
timeout.

Now only first bit is set, which means "Software Reset for All".

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2 years agoIntelFsp2Pkg: Fix typo in SplitFspBin
Chasel, Chiu [Thu, 20 Sep 2018 23:32:51 +0000 (07:32 +0800)]
IntelFsp2Pkg: Fix typo in SplitFspBin

Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2 years agoBaseTools: refactor to cache InfBuildData data
Carsey, Jaben [Mon, 10 Sep 2018 22:18:09 +0000 (06:18 +0800)]
BaseTools: refactor to cache InfBuildData data

use Common.caching and auto cache properties and functions of InfBuildData

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: refactor to not overcreate ModuleAutoGen objects
Carsey, Jaben [Mon, 10 Sep 2018 22:18:08 +0000 (06:18 +0800)]
BaseTools: refactor to not overcreate ModuleAutoGen objects

currently created for 3 different purposes and saved once.
this makes it created once and saved and then referenced.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Don't save unused workspace data
Carsey, Jaben [Mon, 10 Sep 2018 22:18:07 +0000 (06:18 +0800)]
BaseTools: Don't save unused workspace data

  FlexibleFieldName was never used not set.
  DefinitionPosition (file and line number) are recalculated
and never used outside the function.  remove the saving of the
data.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: refactor Build Database objects
Carsey, Jaben [Mon, 10 Sep 2018 22:18:06 +0000 (06:18 +0800)]
BaseTools: refactor Build Database objects

1) use namedtuple instead of custom class when apropriate
2) rename collections.OrderedDict to OrderedDict since we import it already

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Workspace classes refactor properties
Carsey, Jaben [Mon, 10 Sep 2018 22:18:05 +0000 (06:18 +0800)]
BaseTools: Workspace classes refactor properties

1) use decorators
2) also change some private functions to public when all callers are
external
3) change external callers to use functions instead of directly
accessing private data.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: refactor class properties
Carsey, Jaben [Mon, 10 Sep 2018 22:18:04 +0000 (06:18 +0800)]
BaseTools: refactor class properties

use decorators and auto cache those that were cached manually
remove properties never used

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: AutoGen - refactor class properties
Carsey, Jaben [Mon, 10 Sep 2018 22:18:03 +0000 (06:18 +0800)]
BaseTools: AutoGen - refactor class properties

use function decorators

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: AutoGen refactor WorkspaceAutoGen class
Carsey, Jaben [Mon, 10 Sep 2018 22:18:02 +0000 (06:18 +0800)]
BaseTools: AutoGen refactor WorkspaceAutoGen class

Update the WorkspaceAutoGen class to use caching decorators and remove
the no longer needed private variables.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Refactor PlatformAutoGen
Carsey, Jaben [Mon, 10 Sep 2018 22:18:01 +0000 (06:18 +0800)]
BaseTools: Refactor PlatformAutoGen

use decorators for property and automatic caching
remove circular dependency between some APIs

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <Bob.c.Feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoSecurityPkg: remove PE/COFF header workaround for ELILO on IPF
Ard Biesheuvel [Fri, 7 Sep 2018 05:42:02 +0000 (13:42 +0800)]
SecurityPkg: remove PE/COFF header workaround for ELILO on IPF

Now that Itanium support has been dropped, we can remove the various
occurrences of the ELILO on Itanium PE/COFF header workaround.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=816
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Zhang Chao B <chao.b.zhang@intel.com>
2 years agoBaseTools: Fix a bug for Unused PCDs section display in the report
zhijufan [Wed, 12 Sep 2018 06:58:54 +0000 (14:58 +0800)]
BaseTools: Fix a bug for Unused PCDs section display in the report

Fix a regression issue caused by ac4578af364, when there doesn't exist
not used PCD, it also display the not used Pcd section in the report.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=1170
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoBaseTools: Regression bug Linux script used windows format
Yunhua Feng [Fri, 14 Sep 2018 02:54:59 +0000 (10:54 +0800)]
BaseTools: Regression bug Linux script used windows format

regression by 15e20228258c1714cd90207a52101a5b1b54cd2c
and 9f3594782de9051cbf599f9af006903ed3f6669e
Linux execute script must use '\n' not '\r\n' for end of line

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2 years agoMdeModulePkg/Ip4Dxe: Refine the coding style.
Jiaxin Wu [Mon, 17 Sep 2018 03:10:57 +0000 (11:10 +0800)]
MdeModulePkg/Ip4Dxe: Refine the coding style.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1180
Remove the trailing white spaces.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Bi Dandan <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2 years agoNetworkPkg: UefiPxeBcDxe: Add EXCLUSIVE attribute when opening SNP protocol installed...
edk2-devel-bounces@lists.01.org [Fri, 14 Sep 2018 08:24:15 +0000 (16:24 +0800)]
NetworkPkg: UefiPxeBcDxe: Add EXCLUSIVE attribute when opening SNP protocol installed by PXE.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1152

v2: Sync the same logic to Ipv6 and update code comments.

The PXE driver installs a SNP and open this SNP with attribute BY_DRIVER
to avoid it being opened by MNP driver, this SNP is also expected not to
be opened by other drivers with EXCLUSIVE attribute. In some cases, other
drivers may happen to do this by error, and thus cause a system crash.
This patch adds EXCLUSIVE attribute when opening SNP in PXE driver, and
will reject all OpenProtocol requests by EXCLUSIVE.

Cc: Subramanian, Sriram <sriram-s@hpe.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wang Fan <fan.wang@intel.com>
Reviewed-by: Sriram Subramanian <sriram-s@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
2 years agoUefiCpuPkg/PiSmmCpuDxeSmm: move InitSmmS3Cr3() into else block
Jian J Wang [Fri, 14 Sep 2018 05:40:37 +0000 (13:40 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: move InitSmmS3Cr3() into else block

BZ#: https://bugzilla.tianocore.org/show_bug.cgi?id=1165

InitSmmS3Cr3 () will update SmmS3ResumeState so moving the calling of
it into else block to keep the logic consistency.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>