mirror_edk2.git
3 years agoUefiCpuPkg/FeaturesLib: don't init MCi_CTL/STATUS when MCA's disabled
Ruiyu Ni [Thu, 8 Feb 2018 06:43:20 +0000 (14:43 +0800)]
UefiCpuPkg/FeaturesLib: don't init MCi_CTL/STATUS when MCA's disabled

Today's McaInitialize() doesn't check State value before initialize
MCi_CTL and MCi_STATUS.
The patch fixes this issue by only initializing the two kinds of
MSRs when State is enabled.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
3 years agoShellPkg/rm: fix hang when deleting an absolutely-empty directory
Ruiyu Ni [Thu, 8 Feb 2018 03:40:04 +0000 (11:40 +0800)]
ShellPkg/rm: fix hang when deleting an absolutely-empty directory
An ordinary empty directory should contain "." and ".." entries.
When an empty directory even doesn't contain "." or ".." entry,
FileHandleFindFirstFile() may return error status and a NULL
FileInfo.
IsDirectoryEmpty() implementation in Rm.c doesn't consider this
case and the deference of FileInfo->FileName causes page fault
exception because FileInfo is NULL.
The patch checks the return status of FileHandleFindFirstFile()
to fix this issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
3 years agoShellPkg/hexedit: Fix a read-after-free bug
Ruiyu Ni [Wed, 7 Feb 2018 16:05:10 +0000 (00:05 +0800)]
ShellPkg/hexedit: Fix a read-after-free bug

HDiskImageSetDiskNameOffsetSize() and HFileImageSetFileName()
may be called using the current disk name or file name.
When this happens, today's implementation firstly frees the memory
and then accesses the just-freed memory.
The patch fixes this issue by doing nothing when the disk or file
name is the current one.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
3 years agoSourceLevelDebugPkg DebugUsb3: Fix GCC build failures
Star Zeng [Thu, 8 Feb 2018 08:01:06 +0000 (16:01 +0800)]
SourceLevelDebugPkg DebugUsb3: Fix GCC build failures

Fix GCC build failures below.
variable 'EvtTrb' set but not used [-Werror=unused-but-set-variable]
variable 'Index' set but not used [-Werror=unused-but-set-variable]

The build failure could only be caught with -D SOURCE_DEBUG_USE_USB3
build flag.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
3 years agoBaseTools: Update Expression.py for string comparison and MACRO replace issue
Yunhua Feng [Wed, 7 Feb 2018 13:37:26 +0000 (21:37 +0800)]
BaseTools: Update Expression.py for string comparison and MACRO replace issue

1. Fix string comparison incorrect issue, we expected "ABC" is greater than
"AAD" since the second char 'B' is greater than 'A'.
2. fix MACRO not replace issue.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: not specified value of MAX_CONCURRENT_THREAD_NUMBER
Yonghong Zhu [Mon, 5 Feb 2018 06:14:07 +0000 (14:14 +0800)]
BaseTools: not specified value of MAX_CONCURRENT_THREAD_NUMBER

when MAX_CONCURRENT_THREAD_NUMBER is not specified, tool will
automatically detect number of processor threads.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=775
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoOvmfPkg/PlatformPei: sync AmdSevInitialize() definition with declaration
Laszlo Ersek [Tue, 6 Feb 2018 21:18:36 +0000 (22:18 +0100)]
OvmfPkg/PlatformPei: sync AmdSevInitialize() definition with declaration

"Platform.h" declares the AmdSevInitialize() function without EFIAPI, but
the definition in "AmdSev.c" includes EFIAPI.

GCC toolchains without LTO do not catch this error because "AmdSev.c" does
not include "Platform.h"; i.e. the declaration used by callers such as
"Platform.c" is not actually matched against the function definition at
build time.

With LTO enabled, the mismatch is found -- however, as a warning only, due
to commit f8d0b9662993 ("BaseTools GCC5: disable warnings-as-errors for
now", 2016-08-03).

Include the header in the C file (which turns the issue into a hard build
error on all GCC toolchains), plus sync the declaration from the header
file to the C file.

There's been no functional breakage because AmdSevInitialize() takes no
parameters.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Fixes: 13b5d743c87a22dfcd94e8475d943dee5712b62d
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoShellPkg/UefiShellDebug1CommandsLib: sync Compress() definition with decl.
Laszlo Ersek [Tue, 6 Feb 2018 21:08:07 +0000 (22:08 +0100)]
ShellPkg/UefiShellDebug1CommandsLib: sync Compress() definition with decl.

"Compress.h" declares the Compress() function as EFIAPI, but the
definition in "Compress.c" lacks EFIAPI.

GCC toolchains without LTO do not catch this error because "Compress.c"
does not include "Compress.h"; i.e. the declaration used by callers such
as "EfiCompress.c" is not actually matched against the function definition
at build time.

With LTO enabled, the mismatch is found -- however, as a warning only, due
to commit f8d0b9662993 ("BaseTools GCC5: disable warnings-as-errors for
now", 2016-08-03).

Include the header in the C file (which turns the issue into a hard build
error on all GCC toolchains), plus sync the declaration from the header
file to the C file. Finally, remove EFIAPI from both declaration and
definition -- this was the original intent of commit c4e74e9b814c
("ShellPkg/UefiShellDebug1CommandsLib: Remove unnecessary EFIAPI",
2016-10-09), but it missed the header file.

(Gary meant to address that omission in Oct 2017:

  [edk2] [PATCH] ShellPkg/UefiShellDebug1CommandsLib: Remove EFIAPI from
                 Compress()

  http://mid.mail-archive.com/20171026065329.32311-1-glin@suse.com

and Ray reviewed the patch, but then the patch was never committed.)

So do the sync and drop EFIAPI now.

This happens to fix the EFICOMPRESS shell command, when built with GCC for
X64.

Cc: Gary Lin <glin@suse.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Fixes: c4e74e9b814cfb4b51cf832f3bb218cd2aba348b
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Gary Lin <glin@suse.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
3 years agoSourceLevelDebugPkg DebugUsb3: Support IOMMU
Star Zeng [Wed, 31 Jan 2018 07:17:05 +0000 (15:17 +0800)]
SourceLevelDebugPkg DebugUsb3: Support IOMMU

For PEI, allocate granted DMA buffer from IOMMU PPI.
For DXE, map DMA buffer by PciIo.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoSourceLevelDebugPkg DebugUsb3: Fix some typos
Star Zeng [Sun, 4 Feb 2018 09:33:10 +0000 (17:33 +0800)]
SourceLevelDebugPkg DebugUsb3: Fix some typos

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
3 years agoSourceLevelDebugPkg DebugAgentLib: Rename IsBsp to DebugAgentIsBsp
Star Zeng [Fri, 2 Feb 2018 07:34:48 +0000 (15:34 +0800)]
SourceLevelDebugPkg DebugAgentLib: Rename IsBsp to DebugAgentIsBsp

For avoiding function name confliction,
rename IsBsp to DebugAgentIsBsp.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoBaseTools: Enhance error handling for unsupported toolchain Flags/Path
Yonghong Zhu [Wed, 7 Feb 2018 01:17:08 +0000 (09:17 +0800)]
BaseTools: Enhance error handling for unsupported toolchain Flags/Path

Case1: Cover the Tool PATH is not exist, eg: build MdeModule under GCC5
toolchain and IPF arch.
Case2: Cover the Tool FLAGS is not exist, eg: build OvmfPkg under
CLANG35 toolchain and X64 arch.

fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=595
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoSecurityPkg: Tcg2Smm: Refine type cast in pointer abstraction
Zhang, Chao B [Thu, 8 Feb 2018 06:22:39 +0000 (14:22 +0800)]
SecurityPkg: Tcg2Smm: Refine type cast in pointer abstraction

Pointer subtraction is not performed by pointers to elements of the same
array object. Such behavior is undefined by C11 standard and might lead to
potential issues, Refine pointer subtraction by first casting each pointer
to UINTN.

Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
3 years agoUefiCpuPkg/FeaturesLib: Fix Haswell CPU hang with 50% throttling
Ruiyu Ni [Tue, 6 Feb 2018 07:26:41 +0000 (15:26 +0800)]
UefiCpuPkg/FeaturesLib: Fix Haswell CPU hang with 50% throttling

Today's implementation only assumes SandyBridge CPU supports
Extended On-Demand Clock Modulation Duty Cycle.
Actually it is supported when CPUID.06h.EAX[5] == 1.

When platform requests 50% throttling, it causes value 1000b
set to the low-4 bits of IA32_CLOCK_MODULATION.
But the wrong code sets 1000b to bits[1-3] which causes assertion.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
3 years agoShellPkg/Dp: Updated to dump perf log based on FPDT table
Dandan Bi [Mon, 22 Jan 2018 08:39:03 +0000 (16:39 +0800)]
ShellPkg/Dp: Updated to dump perf log based on FPDT table

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/FirmwarePerfSmm:Enhance for new pref infrastructure
Dandan Bi [Tue, 30 Jan 2018 03:07:36 +0000 (11:07 +0800)]
MdeModulePkg/FirmwarePerfSmm:Enhance for new pref infrastructure

V3:
a. Remove unused definitions
b. Get records size form the records buffer when getting size action
is triggered.

V2:
Update FirmwarePerformanceSmm to receive the address
of performance records instead of records content.

Receive buffer address of Boot performance records
which are reported by SmmCorePerformanceLib.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/FirmwarePerfDxe:Enhance for new pref infrastructure
Dandan Bi [Wed, 17 Jan 2018 01:47:58 +0000 (09:47 +0800)]
MdeModulePkg/FirmwarePerfDxe:Enhance for new pref infrastructure

V4:
Update the GUID for status code in DxeCorePerformanceLib and
FirmwarePerformanceDxe.

V3:Add handling for the case when performance feature is not enabled.

V2:
Update FirmwarePerformanceDxe to receive the address
of performance records instead of records content.

1. Remove the macro EXTENSION_RECORD_SIZE, since the extension
size can be got through PcdExtFpdtBootRecordPadSize.

2. Hook EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT to install ACPI table

3. Copy SMM record accord to the allocated size

4. Receive Boot performance table address instead of
 contents which are reported DxeCorePerformanceLib.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/FirmwarePerformancePei:Add FPDT records for S3 phase
Dandan Bi [Wed, 17 Jan 2018 01:42:42 +0000 (09:42 +0800)]
MdeModulePkg/FirmwarePerformancePei:Add FPDT records for S3 phase

Add FPDT records into boot performance table for S3 phase

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/SmmCorePerformanceLib:Track FPDT record in SMM phase
Dandan Bi [Wed, 17 Jan 2018 01:31:18 +0000 (09:31 +0800)]
MdeModulePkg/SmmCorePerformanceLib:Track FPDT record in SMM phase

V3:
a. Handle the case when string is empty in String Record.
b. Use gEdkiiFpdtExtendedFirmwarePerformanceGuid to report status
code.
c. Refine the code logic.

V2:
Update SmmCorePerformanceLib to report the buffer address of
boot performance records instead of records contents.

Updated to convert Pref entry to FPDT record in SMM phase and then
export records to FPDT table.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/DxeCorePerformanceLib:Track FPDT record in DXE phase
Dandan Bi [Fri, 19 Jan 2018 05:01:38 +0000 (13:01 +0800)]
MdeModulePkg/DxeCorePerformanceLib:Track FPDT record in DXE phase

V4:
a.Update the GUID for status code in DxeCorePerformanceLib and
FirmwarePerformanceDxe.
b. Add check for Insert FPDT record in DxeCorePerformanceLib
to avoid re-entry case.

V3:
a. Handle the case when string is empty in String Record.
b. refine the code logic.

V2:
Update DxecorePerformanceLib to report the boot performance table
address instead of records contents.

Updated to convert Pref entry to FPDT record in DXE phase and then
allocate boot performance table to save the record and report
the address of boot performance table to FirmwarePerformanceDxe.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/PeiPerformance:Updated to track FPDT record in PEI phase
Dandan Bi [Fri, 19 Jan 2018 04:46:02 +0000 (12:46 +0800)]
MdeModulePkg/PeiPerformance:Updated to track FPDT record in PEI phase

V3:Handle the case when string is empty in String Record.

Updated to convert Pref entry to FPDT record in PEI phase and then
report the records to DxeCorePerfLib through GUID hob.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg:Add definitions for new Performance infrastructure
Gao, Liming [Thu, 7 Dec 2017 15:29:53 +0000 (23:29 +0800)]
MdeModulePkg:Add definitions for new Performance infrastructure

V3:
Add "FPDT_" prefix for related definitions.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoUefiCpuPkg/PiSmmCpuDxeSmm: fix infinite loop issue in SMM profile
Jian J Wang [Tue, 6 Feb 2018 02:08:25 +0000 (10:08 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: fix infinite loop issue in SMM profile

> v2:
>   Reduce the number of page to update/restore from 3 to 2 because DF
>   has no effect in this issue.

The infinite loop is caused by the memory instruction, such as
"rep mov", operating on memory block crossing boundary of NON-PRESENT
pages. Because the address triggering page fault set in CR2 will be in
the first page, SmmProfilePFHandler() will only change the first page
into PRESENT. The page following will be still in NON-PRESENT status.

Since SmmProfilePFHandler() will setup single-step trap for the
instruction causing #PF, when the handler returns back to the
instruction and re-execute it, both #DB and #PF will be triggered
because the instruction wants to access both first and second page
but only first page is PRESENT.

Normally #DB exception will be handled first and its handler will
change first page back to NON-PRESENT status. Then #PF is handled
and its handler will change first page to PRESENT status again and
setup another single-step for the instruction triggering #PF. Then
the whole system falls into an infinite loop and the memory operation
will never move on.

This patch fix above situation by always changing 2 pages to PRESENT
status instead of just 1 page. Those 2 pages include the page causing
#PF and the page after it.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoMdeModulePkg/PiSmmCore: add API parameter check
Jian J Wang [Tue, 6 Feb 2018 05:12:36 +0000 (13:12 +0800)]
MdeModulePkg/PiSmmCore: add API parameter check

The Heap Guard feature wrapped SmmInternalFreePagesEx with
SmmInternalFreePagesExWithGuard but didn't add necessary
parameter check. This patch fixes this situation.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg/PciBusDxe: Fix VS2012 build failure
Dandan Bi [Wed, 7 Feb 2018 01:00:17 +0000 (09:00 +0800)]
MdeModulePkg/PciBusDxe: Fix VS2012 build failure

Initialize local variable to suppress warning C4703:
potentially uninitialized local pointer variable.

Both reads (dereferences) of "PciRootBridgeIo" in
PciBusDriverBindingStart() are only reached if
"gFullEnumeration" is TRUE on entry *and* we successfully
open the EfiPciRootBridgeIoProtocol interface.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
3 years agoBaseTools: Fixed incorrect Structure Pcd Value.
Feng, Bob C [Wed, 7 Feb 2018 04:10:29 +0000 (12:10 +0800)]
BaseTools: Fixed incorrect Structure Pcd Value.

When structurePCD only has overall value assigned
in Dsc under different SKU, the value under default sku is used.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Fixed Build failed issue.
BobCF [Tue, 6 Feb 2018 07:20:46 +0000 (15:20 +0800)]
BaseTools: Fixed Build failed issue.

If the PCD is not used in DSC file and user set
that PCD value from Command line, build will fail.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTool: Fixed Pcd issues.
Feng, Bob C [Wed, 7 Feb 2018 02:01:59 +0000 (10:01 +0800)]
BaseTool: Fixed Pcd issues.

1. Check variable offset when merging Hii Pcds
2. Fixed the issue of Hii value inherit with default store.
3. Error handling for incorrect structure pcd declare.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoNt32Pkg/Nt32Pkg.fdf: Increase the size of FLASH Device.
Jiaxin Wu [Fri, 22 Dec 2017 07:01:19 +0000 (15:01 +0800)]
Nt32Pkg/Nt32Pkg.fdf: Increase the size of FLASH Device.

Currently, the FV image size is not enough for the modules after
we enable some flags defined in Nt32Pkg.dsc, e.g:
 DEFINE SECURE_BOOT_ENABLE      = TRUE
 DEFINE TLS_ENABLE              = TRUE
 DEFINE NETWORK_IP6_ENABLE      = TRUE

This patch is to increase the size of FLASH Device to meet the requirement.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
3 years agoIntelSiliconPkg IntelVTdPmrPei: Install IOMMU PPI for pre-memory phase
Star Zeng [Tue, 6 Feb 2018 10:36:19 +0000 (18:36 +0800)]
IntelSiliconPkg IntelVTdPmrPei: Install IOMMU PPI for pre-memory phase

Install IOMMU PPI for pre-memory phase and return
EFI_NOT_AVAILABLE_YET to indicate that DMA protection has been enabled,
but DMA buffer are not available to be allocated yet.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoMdeModulePkg Ppi/IoMmu.h: Add EFI_NOT_AVAILABLE_YET return status code
Star Zeng [Fri, 26 Jan 2018 03:46:17 +0000 (11:46 +0800)]
MdeModulePkg Ppi/IoMmu.h: Add EFI_NOT_AVAILABLE_YET return status code

Install IOMMU PPI for pre-memory phase and return
EFI_NOT_AVAILABLE_YET to indicate that DMA protection has been enabled,
but DMA buffer are not available to be allocated yet.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoIntelSiliconPkg IntelVTdPmrPei: Install IoMmu PPI before enabling PMR
Star Zeng [Fri, 19 Jan 2018 11:07:37 +0000 (19:07 +0800)]
IntelSiliconPkg IntelVTdPmrPei: Install IoMmu PPI before enabling PMR

Then the consumer of IoMmu PPI has opportunity to get granted DMA
buffer (by callback) to replace old buffer before it is forbidden
by enabling PMR.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoBaseTools: Fix COMPRESS alignment incorrect issue
Feng, YunhuaX [Tue, 6 Feb 2018 07:25:53 +0000 (15:25 +0800)]
BaseTools: Fix COMPRESS alignment incorrect issue

Doesn't generate the correct alignment for the leaf section
in the compression section.
Below FFS rule doesn't work as the expectation.

[Rule.Common.PEIM.PE32]
  FILE PEIM = $(NAMED_GUID) {
    PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
    COMPRESS {
      PE32   PE32  Align=Auto    $(INF_OUTPUT)/$(MODULE_NAME).efi
      UI     STRING="$(MODULE_NAME)" Optional
      VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
    }
  }

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools/Conf: Add VS2017/ARM support
Pete Batard [Fri, 12 Jan 2018 13:33:31 +0000 (21:33 +0800)]
BaseTools/Conf: Add VS2017/ARM support

We duplicate the Assembly-Code-File section from build_rule.template
because --convert-hex cannot be used with the MSFT ARM assembler.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdePkg/Include: Add VA list support for VS2017/ARM
Pete Batard [Fri, 12 Jan 2018 13:33:30 +0000 (21:33 +0800)]
MdePkg/Include: Add VA list support for VS2017/ARM

VA_START, VA_END and VA_COPY are the same as the generic macros.
VA_ARG was reverse engineered from MS ARM assembly output.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds
Pete Batard [Fri, 12 Jan 2018 13:33:29 +0000 (21:33 +0800)]
ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds

Introduce CRT assembly replacements for __rt_sdiv, __rt_udiv,
__rt_udiv64, __rt_sdiv64, __rt_srsh (by reusing the RVCT code)
as well as memcpy and memset.
For MSFT compatibility, some of the code needs to be explicitly
forced to ARM, and the /oldit assembly flag needs to be added.
Also, while RVCT_ASM_EXPORT macro invocations have been removed,
the replacement code is designed to be as close as possible to
the one that would have been generated if using the macros.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoMdePkg/Library/BaseLib: Enable VS2017/ARM builds
Pete Batard [Fri, 12 Jan 2018 13:33:28 +0000 (21:33 +0800)]
MdePkg/Library/BaseLib: Enable VS2017/ARM builds

Most of the RVCT assembly can be reused as is for MSFT except
for CpuBreakpoint.asm, which we need to force to Arm mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM
Pete Batard [Fri, 12 Jan 2018 13:33:27 +0000 (21:33 +0800)]
MdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdePkg: Disable some Level 4 warnings for VS2017/ARM
Liming Gao [Wed, 7 Feb 2018 01:25:15 +0000 (09:25 +0800)]
MdePkg: Disable some Level 4 warnings for VS2017/ARM

We disable the exact same warnings as IA32 and X64.

Also create a dummy macro for PRESERVE8, as this is not supported by
the Microsoft ARM assembler.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Report error when GUID format is incorrect
Feng, YunhuaX [Mon, 5 Feb 2018 03:42:33 +0000 (11:42 +0800)]
BaseTools: Report error when GUID format is incorrect

Flexible GUID format of PCD value support following format, so tool should report
error when it is not correct.
1. { GUID("11E13869-1896-4A07-8B21-D8B23DD2A2B4") }
2. { GUID({ 0x11e13869, 0x1896, 0x4a07,{
    0x8b, 0x21, 0xd8, 0xb2, 0x3d, 0xd2, 0xa2, 0xb4 } }) }
3. { GUID(gEfiBlockIoProtocolGuid) }

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: Fix flexible PCD DEVICE_PATH parse issue
Feng, YunhuaX [Tue, 6 Feb 2018 02:19:49 +0000 (10:19 +0800)]
BaseTools: Fix flexible PCD DEVICE_PATH parse issue

When the format of DEVICE_PATH have string, like as:
{DEVICE_PATH("BBS(1,"AB",0)")} have string "AB", will
get the wrong value.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: Fix build argument --pcd for flexible format bugs
Feng, YunhuaX [Mon, 5 Feb 2018 03:42:33 +0000 (11:42 +0800)]
BaseTools: Fix build argument --pcd for flexible format bugs

Build argument --pcd flexible format, like as:
1. VOID* type
gTokenSpaceGuid.Test=H"{flexible format}"
gTokenSpaceGuid.Test=L"string"
gTokenSpaceGuid.Test="string"
gTokenSpaceGuid.Test=L'string'
gTokenSpaceGuid.Test='string'
2. UINT8/UINT16/UINT32/UINT64 type
gTokenSpaceGuid.Test=H"{flexible format}"
gTokenSpaceGuid.Test=L"string"
gTokenSpaceGuid.Test="string"
gTokenSpaceGuid.Test=L'string'
gTokenSpaceGuid.Test='string'

In linux, single quotes need escape
gTokenSpaceGuid.Test=L\'string\'
gTokenSpaceGuid.Test=\'string\'

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoIntelSiliconPkg PlatformVTdSampleDxe: State it is only for dev/debug
Star Zeng [Tue, 6 Feb 2018 02:12:05 +0000 (10:12 +0800)]
IntelSiliconPkg PlatformVTdSampleDxe: State it is only for dev/debug

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoMdeModulePkg: Don't build VarCheckUefiLib and DxeCore for EBC arch
Liming Gao [Tue, 30 Jan 2018 05:33:16 +0000 (13:33 +0800)]
MdeModulePkg: Don't build VarCheckUefiLib and DxeCore for EBC arch

EBC build failure is caused by d7a09cb86a0416c099fa3a9e0fbe2c8f399b28de.
It changes MAX_UINTN and MAX_ADDRESS definition as below. VarCheckUefiLib
and DxeCore uses MAX_UINTN and MAX_ADDRESS in the global data initialization.
New style has >> operator, and not supported by EBC compiler.
The fix is not to build VarCheckUefiLib and DxeCore for EBC arch.

#define MAX_UINTN  ((UINTN) ~0)
==>
#define MAX_UINTN  ((UINTN)(~0ULL >> (64 - sizeof (INTN) * 8)))

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoSecurityPkg: Don't build AuthVariableLib for EBC arch
Liming Gao [Tue, 30 Jan 2018 05:33:31 +0000 (13:33 +0800)]
SecurityPkg: Don't build AuthVariableLib for EBC arch

EBC build failure is caused by d7a09cb86a0416c099fa3a9e0fbe2c8f399b28de.
It changes MAX_UINTN definition as below. AuthVariableLib uses MAX_UINTN
in the global data initialization. New style has >> operator, and not
supported by EBC compiler. The fix is not to build AuthVariableLib for EBC.

#define MAX_UINTN  ((UINTN) ~0)
==>
#define MAX_UINTN  ((UINTN)(~0ULL >> (64 - sizeof (INTN) * 8)))

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
3 years agoPcAtChipsetPkg PeiAcpiTimerLib: Add the missing DebugLib header file
Liming Gao [Wed, 7 Feb 2018 00:57:53 +0000 (08:57 +0800)]
PcAtChipsetPkg PeiAcpiTimerLib: Add the missing DebugLib header file

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
3 years agoSecurityPkg:Tcg2Smm: Fix compile issue
Zhang, Chao B [Tue, 6 Feb 2018 06:55:21 +0000 (14:55 +0800)]
SecurityPkg:Tcg2Smm: Fix compile issue

Update Tcg2Smm _PRS patching logic to fix compile issue

Cc: Liming Gao <liming.gao@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdePkg ACPI: Add some macros for PPTT
Heyi Guo [Tue, 6 Feb 2018 06:41:45 +0000 (14:41 +0800)]
MdePkg ACPI: Add some macros for PPTT

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoArmPkg/Gic: force GIC driver to run before CPU arch protocol driver
Ard Biesheuvel [Tue, 6 Feb 2018 11:58:12 +0000 (11:58 +0000)]
ArmPkg/Gic: force GIC driver to run before CPU arch protocol driver

Currently, the GIC driver has a static dependency on the CPU arch protocol
driver, so it can register its IRQ handler at init time. This means there
is a window between dispatch of the CPU driver and dispatch of the GIC
driver where any unexpected GIC state may trigger an interrupt which we
are not set up to handle yet. Note that this is even the case if we enter
UEFI with interrupts disabled at the CPU, given that any TPL manipulation
involving TPL_HIGH_LEVEL will unconditionally enable IRQs at the CPU side
regardless of whether they were enabled to begin with (but only as soon as
the CPU arch protocol is actually installed)

So let's reorder the GIC driver with the CPU driver, and let it run its
initialization that puts the GIC into a known state before enabling
interrupts. Move its installation of its IRQ handler to a protocol notify
callback on the CPU arch protocol so that it runs as soon as it becomes
available.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
3 years agoEmbeddedPkg: delete unused Pcds and guids
Leif Lindholm [Tue, 6 Feb 2018 15:46:22 +0000 (15:46 +0000)]
EmbeddedPkg: delete unused Pcds and guids

Delete a bunch of Pcds, a guid, and a related header file - probably Ebl
related.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoEmbeddedPkg: delete unused HalRuntimeServicesExampleLib
Leif Lindholm [Tue, 6 Feb 2018 15:36:02 +0000 (15:36 +0000)]
EmbeddedPkg: delete unused HalRuntimeServicesExampleLib

HalRuntimeServicesExampleLib contains no .inf and none of its contents
are included elsewhere - so get rid of it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoEmbeddedPkg: drop unused Pcds from package .dsc
Leif Lindholm [Tue, 6 Feb 2018 16:51:46 +0000 (16:51 +0000)]
EmbeddedPkg: drop unused Pcds from package .dsc

A bunch of Ebl-related Pcds are still referenced in package
Pcd. Drop them.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoArmPkg: delete references to unused guids/Pcds from CpuDxe
Leif Lindholm [Tue, 6 Feb 2018 16:41:16 +0000 (16:41 +0000)]
ArmPkg: delete references to unused guids/Pcds from CpuDxe

gEfiDebugSupportPeriodicCallbackProtocolGuid and
PcdCpuDxeProduceDebugSupport are referred to from CpuDxe.
Delete references from .inf and .h.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoBeagleBoardPkg: drop unused EmbeddedPkg Pcds
Leif Lindholm [Tue, 6 Feb 2018 16:39:12 +0000 (16:39 +0000)]
BeagleBoardPkg: drop unused EmbeddedPkg Pcds

Drop a bunch of unused EmbeddedPkg Pcds, including one used
in local code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoArmVirtPkg: drop unused PcdCacheEnable
Leif Lindholm [Tue, 6 Feb 2018 16:36:36 +0000 (16:36 +0000)]
ArmVirtPkg: drop unused PcdCacheEnable

ArmVirt.dsc.inc sets gEmbeddedTokenSpaceGuid.PcdCacheEnable,
which is unused and about to be deleted. Drop it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
3 years agoBaseTools/Conf: disable DTC legacy phandle format
Ard Biesheuvel [Fri, 5 Jan 2018 09:24:22 +0000 (09:24 +0000)]
BaseTools/Conf: disable DTC legacy phandle format

By default, the device tree compiler emits phandle properties twice:
once called 'phandle' and again called 'linux,phandle'. Given that
Linux was updated in early 2010 [0] to accept the former (which is
what is specified in the ePAPR and device tree specifications), there
is no point in emitting both when compiling device trees for UEFI
platforms.

[0] 04b954a673dd02f585a2769c4945a43880faa989
"of/flattree: Make the kernel accept ePAPR style phandle information"

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoShellPkg/map: Fix out-of-bound read when "map fsn"
Ruiyu Ni [Mon, 5 Feb 2018 05:49:32 +0000 (13:49 +0800)]
ShellPkg/map: Fix out-of-bound read when "map fsn"

The below code reads additional one CHAR16 when copying
content from Specific to NewSpecific.
NewSpecific = AllocateCopyPool(
                StrSize(Specific) + sizeof(CHAR16), Specific
                );

The patch fixes this issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
3 years agoMdePkg/SafeString: Fix potential out-of-bound memory access
Ruiyu Ni [Fri, 2 Feb 2018 10:47:18 +0000 (18:47 +0800)]
MdePkg/SafeString: Fix potential out-of-bound memory access

Today's implementation of [Ascii]StrnCpyS/[Ascii]StrnCatS calls
StrnLenS () to get the length of source string but supplies the
destination buffer size as max size.
It's a bug that may cause out-of-bound memory access.
For example:
  StrnCpyS (Dest[10], 10, "hello", 6)
  -> StrnLenS ("hello", 10) //< cause out-of bound memory access

In a pool guard enabled environment, when using shell to edit an
existing file which contains empty line, the page fault is met.

The patch fixes the four library functions to avoid such
out-of-bound memory access.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
3 years agoShellPkg/for: Fix potential null pointer deference
Ruiyu Ni [Mon, 5 Feb 2018 07:53:20 +0000 (15:53 +0800)]
ShellPkg/for: Fix potential null pointer deference

When "FOR %a %a IN A B C" is executed,
CurrentScriptFile->CurrentCommand->Data is NULL.
But the code assumes it's not NULL and tries to
deference it.

The patch fixes this issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
3 years agoBaseTools: enhance error check for DatumType format
Yonghong Zhu [Fri, 2 Feb 2018 07:46:08 +0000 (15:46 +0800)]
BaseTools: enhance error check for DatumType format

Add a check for DatumType format, eg: VOID *, original Tool will crash
but no detail error message which cause confusion to user.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools GNUmakefile: Remove HOST_ARCH in every tool Makefile
Liming Gao [Wed, 31 Jan 2018 11:59:57 +0000 (19:59 +0800)]
BaseTools GNUmakefile: Remove HOST_ARCH in every tool Makefile

HOST_ARCH has been moved into the common header.makefile

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools GNUmakefile: Move HOST_ARCH detection into common makefile
Liming Gao [Wed, 31 Jan 2018 11:59:56 +0000 (19:59 +0800)]
BaseTools GNUmakefile: Move HOST_ARCH detection into common makefile

With this change, enter single tool directory, make can pass.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoPcAtChipsetPkg: Add PeiAcpiTimerLib to save Frequency in HOB
Liming Gao [Tue, 23 Jan 2018 02:24:04 +0000 (10:24 +0800)]
PcAtChipsetPkg: Add PeiAcpiTimerLib to save Frequency in HOB

In V2:
1) Update PeiAcpiTimerLib base name to PeiAcpiTimerLib
2) Update PeiAcpiTimerLib to add the missing constructor to enable ACPI IO space
3) Update DxeAcpiTimerLib to cache frequency in constructor.

PeiAcpiTimerLib caches PerformanceCounterFrequency in HOB, then Pei and Dxe
AcpiTimerLib can share the same PerformanceCounterFrequency.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoSecurityPkg: Support PP version lower than 1.3
Zhang, Chao B [Fri, 2 Feb 2018 08:16:05 +0000 (16:16 +0800)]
SecurityPkg: Support PP version lower than 1.3

TCG PP 1.2 & PP 1.3 spec defined different Opcodes.
Update code to support both.

Cc: Long Qin <qin.long@intel.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Long Qin <qin.long@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
3 years agoCorebootPayloadPkg/FbGop: Produces correct PixelsPerScanLine
Benjamin You [Tue, 30 Jan 2018 08:38:45 +0000 (16:38 +0800)]
CorebootPayloadPkg/FbGop: Produces correct PixelsPerScanLine

According to UEFI Spec, EFI_GRAPHICS_OUTPUT_PROTOCOL.Mode->Info->
PixelsPerScanLine may contain padding pixel elements outside the area
covered by HorizontalResolution for performance reasons or due to hardware
restrictions. CorebootPayloadPkg's FbGop driver doesn't follow this
requirement, and produces PixelsPerScanLine simply as
HorizontalResolution. This needs to be fixed to reflect the real length
of a framebuffer scanline.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoMdeModulePkg/PXE: Add warning message for PXE if failed to read system GUID from...
Fu Siyuan [Fri, 2 Feb 2018 03:25:05 +0000 (11:25 +0800)]
MdeModulePkg/PXE: Add warning message for PXE if failed to read system GUID from SMBIOS.

Current PXE driver uses zero GUID if failed to get the system GUID from smbios
table, and some OS PXE boot may fail in such case. This patch is to add a warning
message to inform user that smbios table is missed on the platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
3 years agoNetworkPkg: Add warning message for PXE if failed to read system GUID from SMBIOS.
Fu Siyuan [Fri, 2 Feb 2018 03:23:52 +0000 (11:23 +0800)]
NetworkPkg: Add warning message for PXE if failed to read system GUID from SMBIOS.

Current PXE driver uses zero GUID if failed to get the system GUID from smbios
table, and some OS PXE boot may fail in such case. This patch is to add a warning
message to inform user that smbios table is missed on the platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
3 years agoSecurityPkg: Add UNI string for 2 PCDs
Zhang, Chao B [Sat, 3 Feb 2018 03:08:54 +0000 (11:08 +0800)]
SecurityPkg: Add UNI string for 2 PCDs

Add prompt & help string for PcdTpm2CurrentIrqNum, PcdTpm2PossibleIrqNumBuf

Cc: Dandan Bi <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
3 years agoBaseTools: Update Expression.py for VOID* to support L'a' and 'a'
Feng, YunhuaX [Fri, 2 Feb 2018 09:01:52 +0000 (17:01 +0800)]
BaseTools: Update Expression.py for VOID* to support L'a' and 'a'

Original VOID* type support L"string" and "string" format, now we also
add support for single quote string that without null terminator.
Type VOID* support L'a' and 'a', the value transfer to c style value.
L'a' --> {0x61, 0x00}
L'ab' --> {0x61, 0x00, 0x62, 0x00}
'a'  --> {0x61}
'ab' --> {0x61, 0x62}

when the value is L'' or '' that not include any character, tool will
report error.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoBaseTools: StructurePcd array Value support flexible format
Feng, YunhuaX [Fri, 2 Feb 2018 06:49:24 +0000 (14:49 +0800)]
BaseTools: StructurePcd array Value support flexible format

if StructurePcd set item value is array, support flexible format
like as:
gEfiStructuredPcdPkgTokenSpaceGuid.Test.Array | {flexible format}
{flexible format} = {L"ABC"} | {L'ABC'} | {"ABC"} | {UINT8(0x10)}
                  | {UINT16(0x10)} | {UINT32(0x10)} | {UINT64(0x10)}
                  | {DEVICE_PATH("PciRoot(0)/Pci(0,0)")}
                  | {GUID(gPcdPkgTokenSpaceGuid)}
                  | {L"ABC", L'ABC', UINT8(0x10)....}

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoMdeModulePkg/SmmCore: Fix hang due to already-freed memory deference
Ruiyu Ni [Thu, 1 Feb 2018 10:14:24 +0000 (18:14 +0800)]
MdeModulePkg/SmmCore: Fix hang due to already-freed memory deference

SmiHandlerUnRegister() validates the DispatchHandle by checking
whether the first 32bit matches to a certain signature
(SMI_HANDLER_SIGNATURE).
But if a caller calls *UnRegister() twice and the memory freed by
first call still contains the signature, the second call may hang.

The patch fixes this issue by locating the DispatchHandle
in all SMI handlers, instead of checking the signature.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoIntelSiliconPkg/MicrocodeUpdateDxe: Refine debug messages
Hao Wu [Thu, 25 Jan 2018 02:10:46 +0000 (10:10 +0800)]
IntelSiliconPkg/MicrocodeUpdateDxe: Refine debug messages

Refine the debug messages during the verification of microcode to make
them more clear.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoBaseTools: Fix make PcdValueCommon.c failure on GCC
Feng, YunhuaX [Fri, 2 Feb 2018 02:34:24 +0000 (10:34 +0800)]
BaseTools: Fix make PcdValueCommon.c failure on GCC

error message:
PcdValueCommon.c: In function '__PcdGetPtr':
PcdValueCommon.c:315:11: error: variable 'Byte'
set but not used [-Werror=unused-but-set-variable]
   UINT8   Byte;
           ^
cc1: all warnings being treated as errors

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoMdeModulePkg/Core: fix feature conflict between NX and heap guard
Jian J Wang [Mon, 29 Jan 2018 12:03:33 +0000 (20:03 +0800)]
MdeModulePkg/Core: fix feature conflict between NX and heap guard

Considering following scenario (both NX memory protection and heap guard
are enabled):

   1. Allocate 3 pages. The attributes of adjacent memory pages will be

      |NOT-PRESENT|  present  |  present  |  present  |NOT-PRESENT|

   2. Free the middle page. The attributes of adjacent memory pages should be

      |NOT-PRESENT|  present  |NOT-PRESENT|  present  |NOT-PRESENT|

      But the NX feature will overwrite the attributes of middle page. So it
      looks still like below, which is wrong.

      |NOT-PRESENT|  present  |  PRESENT  |  present  |NOT-PRESENT|

The solution is checking the first and/or last page of a memory block to be
marked as NX, and skipping them if they are Guard pages.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoMdeModulePkg/Core: fix feature conflict between NX and NULL detection
Jian J Wang [Mon, 29 Jan 2018 11:07:29 +0000 (19:07 +0800)]
MdeModulePkg/Core: fix feature conflict between NX and NULL detection

If enabled, NX memory protection feature will mark all free memory as
NX (non-executable), including page 0. This will overwrite the attributes
of page 0 if NULL pointer detection feature is also enabled and then
compromise the functionality of it. The solution is skipping the NX
attributes setting to page 0 if NULL pointer detection feature is enabled.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoMdeModulePkg/Core: fix guard page missing issue
Jian J Wang [Fri, 26 Jan 2018 11:47:14 +0000 (19:47 +0800)]
MdeModulePkg/Core: fix guard page missing issue

This issue is a regression one caused by a patch at

    425d25699be83c35e12df8470b827d7fbcef3bce

That fix didn't take the 0 page to free into account, which still
needs to call UnsetGuardPage() even no memory needs to free.

The fix is just moving the calling of UnsetGuardPage() to the place
right after calling AdjustMemoryF().

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoIntelFrameworkModule/ThunkKb: ReadKeyStrokeEx always return key state
Ruiyu Ni [Fri, 19 Jan 2018 07:59:38 +0000 (15:59 +0800)]
IntelFrameworkModule/ThunkKb: ReadKeyStrokeEx always return key state

Today's implementation only return key state when there is a key.
But when user doesn't press any key, the key state cannot be
returned.

The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
3 years agoIntelFrameworkModule/Ps2Kb: ReadKeyStrokeEx always return key state
Ruiyu Ni [Fri, 19 Jan 2018 07:22:53 +0000 (15:22 +0800)]
IntelFrameworkModule/Ps2Kb: ReadKeyStrokeEx always return key state

Today's implementation only return key state when there is a key.
But when user doesn't press any key, the key state cannot be
returned.

The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
3 years agoMdeModulePkg/Ps2Kb: ReadKeyStrokeEx always return key state
Ruiyu Ni [Tue, 16 Jan 2018 08:21:42 +0000 (16:21 +0800)]
MdeModulePkg/Ps2Kb: ReadKeyStrokeEx always return key state

Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.

The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
3 years agoMdeModulePkg/UsbKb: ReadKeyStrokeEx always return key state
Ruiyu Ni [Fri, 12 Jan 2018 11:29:32 +0000 (19:29 +0800)]
MdeModulePkg/UsbKb: ReadKeyStrokeEx always return key state

Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.

The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
3 years agoMdeModulePkg/ConSplitter: ReadKeyStrokeEx always return key state
Ruiyu Ni [Fri, 12 Jan 2018 11:26:22 +0000 (19:26 +0800)]
MdeModulePkg/ConSplitter: ReadKeyStrokeEx always return key state

Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.

The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
3 years agoMdePkg/SimpleTextInEx.h: Fix comments alignment
Ruiyu Ni [Mon, 15 Jan 2018 02:36:06 +0000 (10:36 +0800)]
MdePkg/SimpleTextInEx.h: Fix comments alignment

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoBaseTools CommonLib: Remove the unnecessary print message in PcdValueCommon
Liming Gao [Wed, 31 Jan 2018 09:03:37 +0000 (17:03 +0800)]
BaseTools CommonLib: Remove the unnecessary print message in PcdValueCommon

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
3 years agoUefiCpuPkg: Remove the unused file ResetVec.asm16
Liming Gao [Wed, 31 Jan 2018 09:45:34 +0000 (17:45 +0800)]
UefiCpuPkg: Remove the unused file ResetVec.asm16

ResetVec.nasmb is used. ResetVec.asm16 can be retired.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
3 years agoMdePkg SafeIntLib: Update API definition to use the same output name
Liming Gao [Wed, 31 Jan 2018 12:27:10 +0000 (20:27 +0800)]
MdePkg SafeIntLib: Update API definition to use the same output name

In SafeUintnToChar8(), update its output parameter name.
Update pui8Result --> Result to match its library implementation

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
3 years agoBaseTools: Structure Pcd in CommandLine.
Feng, Bob C [Wed, 31 Jan 2018 08:49:14 +0000 (16:49 +0800)]
BaseTools: Structure Pcd in CommandLine.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Support multiple .h file
Feng, Bob C [Mon, 29 Jan 2018 06:09:36 +0000 (14:09 +0800)]
BaseTools: Support multiple .h file

for structure Pcd declaration in DEC file.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTool: Enhance error handling.
BobCF [Wed, 31 Jan 2018 09:32:01 +0000 (17:32 +0800)]
BaseTool: Enhance error handling.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTool: Add comments in PcdValueInit.c.
Feng, Bob C [Wed, 31 Jan 2018 09:45:02 +0000 (17:45 +0800)]
BaseTool: Add comments in PcdValueInit.c.

Add Comments for __FLEXIBLE_SIZE () statement.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoUefiCpuPkg/PiSmmCpuDxeSmm: eliminate conditional jump in IA32 SmmStartup()
Laszlo Ersek [Tue, 30 Jan 2018 14:34:08 +0000 (15:34 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: eliminate conditional jump in IA32 SmmStartup()

SMM emulation under both KVM and QEMU (TCG) crashes the guest when the
"jz" branch, added in commit d4d87596c11d ("UefiCpuPkg/PiSmmCpuDxeSmm:
Enable NXE if it's supported", 2018-01-18), is taken.

Rework the propagation of CPUID.80000001H:EDX.NX [bit 20] to IA32_EFER.NXE
[bit 11] so that no code is executed conditionally.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: http://mid.mail-archive.com/d6fff558-6c4f-9ca6-74a7-e7cd9d007276@redhat.com
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
[lersek@redhat.com: XD -> NX code comment updates from Ray]
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: mark QEMU/TCG as well in the commit message]

3 years agoUefiCpuPkg/PiSmmCpuDxeSmm: remove unneeded DBs from IA32 SmmStartup()
Laszlo Ersek [Tue, 30 Jan 2018 13:43:28 +0000 (14:43 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: remove unneeded DBs from IA32 SmmStartup()

The SmmStartup() executes in SMM, which is very similar to real mode. Add
"BITS 16" before it and "BITS 32" after it (just before the @32bit label).

Remove the manual 0x66 operand-size override prefixes, for selecting
32-bit operands -- the sizes of our operands trigger NASM to insert the
prefixes automatically in almost every spot. The one place where we have
to add it back manually is the LGDT instruction. (The 0x67 address-size
override prefix is also auto-generated.)

This patch causes NASM to generate byte-identical object code (determined
by disassembling both the pre-patch and post-patch versions, and comparing
the listings), except:

> @@ -158,7 +158,7 @@
>  00000142  6689D3            mov ebx,edx
>  00000145  66B800000000      mov eax,0x0
>  0000014B  0F22D8            mov cr3,eax
> -0000014E  67662E0F0155F6    o32 lgdt [cs:ebp-0xa]
> +0000014E  2E66670F0155F6    o32 lgdt [cs:ebp-0xa]
>  00000155  66B800000000      mov eax,0x0
>  0000015B  0F22E0            mov cr4,eax
>  0000015E  66B9800000C0      mov ecx,0xc0000080

The only difference is the prefix list order, it changes from:

- 0x67, 0x66, 0x2E

to

- 0x2E, 0x66, 0x67

(0x2E is "CS segment override").

Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
3 years agoUefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup()
Laszlo Ersek [Tue, 30 Jan 2018 13:31:23 +0000 (14:31 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup()

The gSmmCr3, gSmmCr4, gSmmCr0 and gSmmJmpAddr global variables are used
for patching assembly instructions, thus we can't yet remove the DB
encodings for those instructions. At least we should add the intended
meanings in comments.

This patch only changes comments.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: adapt commit msg to ongoing PatchAssembly discussion]

3 years agoBaseTools: Update BPDG to support L'' and '' format as VPD Pcd Value
Yonghong Zhu [Tue, 30 Jan 2018 15:01:31 +0000 (23:01 +0800)]
BaseTools: Update BPDG to support L'' and '' format as VPD Pcd Value

Current Pcd value support flexible format, this patch add support for
BPDG Tool to support L'' and '' format.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Fix the bug to align VPD PCD based on value type
Yonghong Zhu [Mon, 29 Jan 2018 07:49:56 +0000 (15:49 +0800)]
BaseTools: Fix the bug to align VPD PCD based on value type

Spec required for VOID* VPD Pcd, Ascii string use byte alignment, byte
array use 8-byte alignment, unicode string use 2-byte alignment.
while when the VPD pcd offset use *, the offset generated in the .map
file not follow this rule.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg PiSmmCore: Set ForwardLink to NULL in RemoveOldEntry()
Star Zeng [Thu, 25 Jan 2018 03:20:04 +0000 (11:20 +0800)]
MdeModulePkg PiSmmCore: Set ForwardLink to NULL in RemoveOldEntry()

"Entry->Link.ForwardLink = NULL;" is present in RemoveMemoryMapEntry()
for DxeCore, that is correct.
"Entry->Link.ForwardLink = NULL;" is absent in RemoveOldEntry()
for PiSmmCore, that is incorrect.

Without this fix, when FromStack in Entry is TRUE,
the "InsertTailList (&mMapStack[mMapDepth].Link, &Entry->Link);" in
following calling to CoreFreeMemoryMapStack() will fail as the entry
at mMapStack[mMapDepth] actually has been removed from the list.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoMdePkg ACPI: Correct processor struct of PPTT
Ming Huang [Tue, 30 Jan 2018 05:51:55 +0000 (13:51 +0800)]
MdePkg ACPI: Correct processor struct of PPTT

The Type field of EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR should
be UINT8 as ACPI version 6.2 specification.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoBaseTools: Enhance parse performance by optimize ValueExpressionEx
Yunhua Feng [Fri, 26 Jan 2018 16:28:05 +0000 (00:28 +0800)]
BaseTools: Enhance parse performance by optimize ValueExpressionEx

Optimize ValueExpressionEx function to enhance meta-data file parse
performance.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
3 years agoMdeModulePkg/SdMmcPciHcDxe: allow HC capabilities to be overridden
Ard Biesheuvel [Thu, 7 Dec 2017 22:43:22 +0000 (22:43 +0000)]
MdeModulePkg/SdMmcPciHcDxe: allow HC capabilities to be overridden

Invoke the newly introduced SD/MMC override protocol to override
the capabilities register after reading it from the device registers,
and to call the pre/post host init and reset hooks at the appropriate
times.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
3 years agoMdeModulePkg: introduce SD/MMC override protocol
Ard Biesheuvel [Thu, 7 Dec 2017 22:43:21 +0000 (22:43 +0000)]
MdeModulePkg: introduce SD/MMC override protocol

Many ARM based SoCs have integrated SDHCI controllers, and often,
these implementations deviate in subtle ways from the pertinent
specifications. On the one hand, these deviations are quite easy
to work around, but on the other hand, having a collection of SoC
specific workarounds in the generic driver stack is undesirable.

So let's introduce an optional SD/MMC override protocol that we
can invoke at the appropriate moments in the device initialization.
That way, the workaround itself remains platform specific, but we
can still use the generic driver stack on such platforms.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
​Reviewed-by: Star Zeng <star.zeng@intel.com>

3 years agoCorebootPayloadPkg: Use correct BytesPerScanLine
Arthur Heymans [Wed, 24 Jan 2018 10:57:36 +0000 (18:57 +0800)]
CorebootPayloadPkg: Use correct BytesPerScanLine

Fetch BytesPerScanLine from coreboot table to reflect how the actual
framebuffer is set up instead of guessing it from the horizontal
resolution.

This fixes a garbled display when HorizontalResolution * (BitsPerPixel
/ 8) and pFbInfo->BytesPerScanLine don't match.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Benjamin You <benjamin.you@intel.com>