Add the UART console produced by the DebugAgent when
SOURCE_DEBUG_ENABLE is TRUE. Without this change, the
debugger connects but the Boot Manager and the UEFI
Shell do not have an active console because the Boot
Manager does not know about the DebugAgent UART
Console device path and the Debug Agent is using the
UART device.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Laszlo Ersek [Wed, 30 Nov 2016 12:13:40 +0000 (13:13 +0100)]
OvmfPkg/QemuFwCfgLib: support QEMU's DMA-like fw_cfg access method
The benefits of the DMA-like access method are (a) speed, (b) write
support in QEMU 2.9+.
(IOPort-based write support was discontinued in QEMU 2.4, and the
DMA-based one is being added to QEMU 2.9. Write support needs no separate
feature detection because writeability is governed on the level of
individual fw_cfg files -- if a file meant to be written by the firmware
exists in the directory, then it is writeable with the DMA method.)
We don't enable this feature for the SEC library instance, because:
- the SEC instance remains without clients (I've checked that it builds
though),
- in SEC, any possible fw_cfg use is expected to be small and read-only.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Laszlo Ersek [Wed, 30 Nov 2016 09:22:30 +0000 (10:22 +0100)]
OvmfPkg/QemuFwCfgLib: move InternalQemuFwCfgIsAvailable() to lib instances
InternalQemuFwCfgIsAvailable() is an API that is incorrectly exposed by
the "OvmfPkg/Include/Library/QemuFwCfgLib.h" library class header; the API
is meant to be used internally to library instances (if it's needed at
all).
In OvmfPkg, we have two lib instances (for SEC and PEI/DXE); they provide
different implementations of InternalQemuFwCfgIsAvailable(), for the
shared file "OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c". Move the API
declaration to a new internal header called "QemuFwCfgLibInternal.h", and
drop EFIAPI in the process.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
InternalQemuFwCfgIsAvailable() is an API that is incorrectly exposed by
the "OvmfPkg/Include/Library/QemuFwCfgLib.h" library class header; the API
is meant to be used internally to library instances (if it's needed at
all). ArmVirtPkg's instance has no use for it actually, so simplify the
code and remove the function definition.
Leif Lindholm [Sun, 27 Nov 2016 23:26:06 +0000 (23:26 +0000)]
Omap35xxPkg, BeagleBoardPkg: Use Pcd for INTERRUPT_BASE
The base address for the interrupt controller is hard-coded in
Omap3530Interrupt.h, although Omap35xxPkg/InterruptDxe appears to
have initially intended to make use of PcdInterruptBaseAddress from
EmbeddedPkg. Move it to use said Pcd, and also declare use of it in
BeagleBoardLib, which makes a direct access.
Leif Lindholm [Thu, 1 Dec 2016 15:13:33 +0000 (15:13 +0000)]
EmbeddedPkg: Remove use of IntelFrameworkModulePkg legacy libs
LzmaCustomDecompressLib and PeiDxeDebugLibReportStatusCode were copied
from IntelFrameworkModulePkg to MdeModulePkg, but the originals were
kept for compatibility.
Since the libraries are identical, move EmbeddedPkg to use the
MdeModulePkg versions instead.
Leif Lindholm [Thu, 1 Dec 2016 15:11:44 +0000 (15:11 +0000)]
BeagleBoardPkg: Remove use of IntelFrameworkModulePkg legacy libs
LzmaCustomDecompressLib and PeiDxeDebugLibReportStatusCode were copied
from IntelFrameworkModulePkg to MdeModulePkg, but the originals were
kept for compatibility.
Since the libraries are identical, move BeagleBoardPkg to use the
MdeModulePkg versions instead.
There may be no environment variable PACKAGES_PATH defined
in flat tree, then 41d739e breaks flat tree build.
This patch is to update GenCfgOpt.py to be compatible with
both flat tree and package path build.
Cc: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Tested-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com>
For GCC compilers, when building with option '-fshort-wchar', wide char
string format '%ls' does not work properly for printf() function. The
string specified by '%ls' will not be printed.
This commit avoids using '%ls' for printf() function and converts the wide
char string to char string for printing.
Leif Lindholm [Thu, 1 Dec 2016 15:14:25 +0000 (15:14 +0000)]
EmulatorPkg: Remove use of IntelFrameworkModulePkg legacy libs
LzmaCustomDecompressLib and PeiDxeDebugLibReportStatusCode were copied
from IntelFrameworkModulePkg to MdeModulePkg, but the originals were
kept for compatibility.
Since the libraries are identical, move EmulatorPkg to use the
MdeModulePkg versions instead.
Leif Lindholm [Thu, 1 Dec 2016 15:12:55 +0000 (15:12 +0000)]
DuetPkg: Remove use of IntelFrameworkModulePkg legacy libs
LzmaCustomDecompressLib and PeiDxeDebugLibReportStatusCode were copied
from IntelFrameworkModulePkg to MdeModulePkg, but the originals were
kept for compatibility.
Since the libraries are identical, move DuetPkg to use the MdeModulePkg
versions instead.
Leif Lindholm [Thu, 1 Dec 2016 14:48:22 +0000 (14:48 +0000)]
QuarkSocPkg: Remove use of IntelFrameworkModulePkg legacy libs
LzmaCustomDecompressLib and PeiDxeDebugLibReportStatusCode were copied
from IntelFrameworkModulePkg to MdeModulePkg, but the originals were
kept for compatibility.
Since the libraries are identical, move iQuarkSocPkg to use the
MdeModulePkg versions instead.
Leif Lindholm [Thu, 1 Dec 2016 14:45:12 +0000 (14:45 +0000)]
OvmfPkg: Remove use of IntelFrameworkModulePkg legacy libs
LzmaCustomDecompressLib and PeiDxeDebugLibReportStatusCode were copied
from IntelFrameworkModulePkg to MdeModulePkg, but the originals were
kept for compatibility.
Since the libraries are identical, move OvmfPkg to use the MdeModulePkg
versions instead.
Yonghong Zhu [Wed, 30 Nov 2016 07:57:00 +0000 (15:57 +0800)]
BaseTools: Support QuotedString for PREBUILD/POSTBUILD in DSC file
If the prebuild/postbuild script statement start with double quotations,
current tool report error, while DSC spec allow this usage. so update
tool to support it.
Feng Tian [Wed, 30 Nov 2016 05:14:23 +0000 (13:14 +0800)]
MdeModulePkg/Ehci: don't clear port status bits during init
Port status bits are clear in original code, so no enumeration
takes place.
Changing this to prevent the status bits from being cleared
allows enumeration to proceed normally.
Cc: Star Zeng <star.zeng@intel.com> Cc: Mike Turner <Michael.Turner@microsoft.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Mike Turner <Michael.Turner@microsoft.com> Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Add MSR_IA32_VMX_BASIC_REGISTER and IA32_VMX_MISC_REGISTER
structures with the bit fields for these two MSRs. Also
add MSEG_HEADER structure whose base address is in the
MsegBase field of MSR_IA32_SMM_MONITOR_CTL_REGISTER.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Remove dependency on layout of PROCESSOR_SMM_DESCRIPTOR
everywhere possible. The only exception is the standard
SMI entry handler template that is included with the
PiSmmCpuDxeSmm module. This allows an instance of the
SmmCpuFeaturesLib to provide alternate
PROCESSOR_SMM_DESCRIPTOR structure layouts.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
All CPUs use the same MTRR settings. Move MTRR settings
from a field in the PROCESSOR_SMM_DESCRIPTOR structure into
a module global variable.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
Leif Lindholm [Thu, 1 Dec 2016 16:31:03 +0000 (16:31 +0000)]
ArmPkg: fix compilation error in ArmDmaLib
Commit 0a99a65d2c8a ("fix incorrect device address of double buffer")
retained an explicit cast on the variable "Buffer" which became
incorrect with the other changes, leading to compilation failures
with some toolchains. Drop the cast.
Jeff Fan [Wed, 30 Nov 2016 07:11:02 +0000 (15:11 +0800)]
UefiCpuPkg: Add ExceptionHandlerData for ArchRestoreExceptionContext()
mReservedVectors is not set, we could add parameter ExceptionHandlerData for
ArchRestoreExceptionContext() that could use it instead of mReservedVectors.
Cc: Feng Tian <feng.tian@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
We add Fmp->GetImage() support in CapsuleApp. So that user may call
Fmp->GetImage() in UEFI shell environment.
This is useful to do unit test for FMP which supports GetImage(),
or user wants to get current image, such as Microcode.
Cc: Eric Dong <eric.dong@intel.com> Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Jeff Fan [Tue, 29 Nov 2016 07:48:32 +0000 (15:48 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Clear some semaphores on S3 boot path
Some semaphores are not cleared on S3 boot path. For example,
mSmmMpSyncData->CpuData[CpuIndex].Present. It may still keeps the value set at
SMM runtime during S3 resume. It may causes BSP have the wrong judgement on SMM
AP's present state.
Update build script to generate a report file and put
both the report file and the log file in the directory
Vlv2TbltDevicePkg with an EDK2_Vlv2TbltDevicePkg prefix.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Michael Kinney [Tue, 29 Nov 2016 18:33:36 +0000 (10:33 -0800)]
Vlv2TbltDevicePkg: Use 4K aligned PE/COFF sections
Update [BuildOptions] to use of 4K aligned PE/COFF
image sections to support page level protection of
DXE_RUNTIME_DRIVER, SMM_CORE, and DXE_SMM_DRIVER
modules.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Ard Biesheuvel [Sat, 12 Nov 2016 13:02:28 +0000 (14:02 +0100)]
ArmPkg/ArmDmaLib: add support for fixed host-to-device DMA offset
Some devices, such as the Raspberry Pi3, have a fixed offset between memory
addresses as seen by the host and as seen by the other bus masters. So add
a new PCD that allows this fixed offset to be recorded, and to be used when
returning device addresses from the DmaLib mapping routines.
Ard Biesheuvel [Sat, 12 Nov 2016 13:02:27 +0000 (14:02 +0100)]
ArmPkg/ArmDmaLib: clean up abuse of device address
In preparation of adding support to ArmDmalib for DMA bus masters whose
view of memory is offset by a constant compared to the CPU's view, clean
up some abuse of the device address.
The device address is not defined in terms of the CPU's address space,
and so it should not be used in CopyMem () or cache maintenance operations
that require a valid mapping. This not only applies to the above use case,
but also to the DebugUncachedMemoryAllocationLib that unmaps the
primary, cached mapping of an allocation, and returns a host address
which is an uncached alias offset by a constant.
Since we should never access the device address from the CPU, there is
no need to record it in the MAPINFO struct. Instead, record the buffer
address in case of double buffering, since we do need to copy the contents
(in case of a bus master write) and free the buffer (in all cases) when
DmaUnmap() is called.
Ard Biesheuvel [Sat, 12 Nov 2016 13:02:26 +0000 (14:02 +0100)]
ArmPkg/ArmDmaLib: fix incorrect device address of double buffer
If double buffering is not required in DmaMap(), the returned device
address is passed through ConvertToPhysicalAddress () to convert the
host address (which in case of DebugUncachedMemoryAllocationLib is not
1:1 mapped) to a physical address, which is what a device would expect
to be able to perform DMA.
By the same reasoning, a double buffer allocated using DmaAllocateBuffer ()
should be converted in the same way, considering that the buffer is allocated
using UncachedAllocatePages (), to which the above equally applies.
So add the missing ConvertToPhysicalAddress () invocation.
Ard Biesheuvel [Sat, 12 Nov 2016 13:02:25 +0000 (14:02 +0100)]
ArmPkg/ArmDmaLib: use DMA buffer alignment from CPU arch protocol
Instead of depending on ArmLib to retrieve the CWG directly, use
the DMA buffer alignment exposed by the CPU arch protocol. This
removes our dependency on ArmLib, which makes the library a bit
more architecture independent.
While we're in there, rename gCpu to mCpu to better reflect its
local scope, and reflow some lines that we're modifying anyway.
Ard Biesheuvel [Sun, 20 Nov 2016 17:12:50 +0000 (17:12 +0000)]
ArmPkg/ArmMmuLib: support page tables in cacheable memory only
Translation table walks are always cache coherent on ARMv8-A, so cache
maintenance on page tables is never needed. Since there is a risk of
loss of coherency when using mismatched attributes, and given that memory
is mapped cacheable except for extraordinary cases (such as non-coherent
DMA), restrict the page table walker to performing cacheable accesses to
the translation tables.
For DEBUG builds, retain some of the logic so that we can double check
that the memory holding the root translation table is indeed located in
memory that is mapped cacheable.
Jiewen Yao [Tue, 29 Nov 2016 07:54:57 +0000 (15:54 +0800)]
UefiCpuPkg/MicrocodeUpdate: Fix GetImage API
Current GetImage API forgets to return data to caller.
Add code to fix it.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Jiewen Yao [Mon, 28 Nov 2016 13:45:40 +0000 (21:45 +0800)]
UefiCpuPkg/PiSmmCpu: relax superpage protection on page split.
PiSmmCpu driver may split page for page attribute request.
Current logic not only propagates the super page attribute to
the leaf page attribut, but also to the directory page attribute.
However, the later might be wrong because we cannot clear protection
without touching directory page attribute.
The effective protection is the strictest combination
across the levels.
We should always clear protection on directory page and set
protection on leaf page for easy clearing later.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Jeff Fan [Tue, 29 Nov 2016 06:51:18 +0000 (14:51 +0800)]
SourceLevelDebugPkg: Avoid to re-init IDT table again at SMI entry
Current SmmDebugAgentLib will initialize IDT table to support source debugging
at each time SMI entry on SMM BSP. Actually, we only need to initialize IDT
table at first time SMI entry.
Add one flag to avoid re-initializing IDT table.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Remove the PowerManagement2 binary SMM module that generates an
ASSERT() and the DigitalThermalSensor binary SMM module that
causes an AP to be stuck in the busy state.
This is a workaround until these two SMM binary modules can be
updated.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
The PiSmmCPuDxeSmm module requires the SMRR base address and length
to be aligned. The memory initialization for Vlv2TbltDevicePkg
produces an SMRAM base address that is on a 16MB boundary and an
SMRAM length of 12MB. The SMRAM length is rounded up to 16MB.
This is a workaround until the binary module that produces the
gEfiSmmPeiSmramMemoryReserveGuid HOB is updated
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Laszlo Ersek [Thu, 24 Nov 2016 14:18:44 +0000 (15:18 +0100)]
OvmfPkg/PlatformPei: take VCPU count from QEMU and configure MpInitLib
These settings will allow CpuMpPei and CpuDxe to wait for the initial AP
check-ins exactly as long as necessary.
It is safe to set PcdCpuMaxLogicalProcessorNumber and
PcdCpuApInitTimeOutInMicroSeconds in OvmfPkg/PlatformPei.
OvmfPkg/PlatformPei installs the permanent PEI RAM, producing
gEfiPeiMemoryDiscoveredPpiGuid, and UefiCpuPkg/CpuMpPei has a depex on
gEfiPeiMemoryDiscoveredPpiGuid.
It is safe to read the fw_cfg item QemuFwCfgItemSmpCpuCount (0x0005). It
was added to QEMU in 2008 as key FW_CFG_NB_CPUS, in commit 905fdcb5264c
("Add common keys to firmware configuration"). Even if the key is
unavailable (or if fw_cfg is entirely unavailable, for example on Xen),
QemuFwCfgRead16() will return 0, and then we stick with the current
behavior.
Cc: Igor Mammedov <imammedo@redhat.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Laszlo Ersek [Thu, 24 Nov 2016 11:19:54 +0000 (12:19 +0100)]
UefiCpuPkg/MpInitLib: wait no longer than necessary for initial AP startup
Sometimes a platform knows exactly how many CPUs it has at boot. It should
be able to
- set PcdCpuMaxLogicalProcessorNumber dynamically to this number,
- set PcdCpuApInitTimeOutInMicroSeconds to a very long time (for example
MAX_UINT32, approx. 71 minutes),
- and expect that MpInitLib wait exactly as long as necessary for all APs
to report in.
Other platforms should be able to continue setting a reasonably large
upper bound on supported CPUs, and waiting for a reasonable, fixed amount
of time for all APs to report in.
Add this functionality. The TimedWaitForApFinish() function will return
when all APs have reported in, or the timeout has expired -- whichever
happens first.
(Accessing these PCDs dynamically is safe. The PEI and DXE phase instances
of this library are restricted to PEIM and DXE_DRIVER client modules, thus
the PCD accesses cannot be linked into runtime code.)
Cc: Igor Mammedov <imammedo@redhat.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com>
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=116
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* Introduce a generic Debugger Configuration protocol.
* Add private configuration data in the EBC Debugger and make it
register the Debugger Configuration protocol on initialization.
* Add a shell application that uses the protocol above to access
the private data in order to configure the EBC debugger.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Pete Batard <pete@akeo.ie>
reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Liming Gao [Wed, 23 Nov 2016 04:51:29 +0000 (12:51 +0800)]
MdeModulePkg PeiCore: Make SetPeiServicesTablePointer() early in EntryPoint
Make SetPeiServicesTablePointer() earlier than ProcessLibraryConstructorList()
so the constructor() function can get the correct pei service table pointer.
"UefiCpuPkg/UefiCpuPkg.dec" already allows platforms to make
PcdCpuMaxLogicalProcessorNumber dynamic, however PiSmmCpuDxeSmm does not
take this into account everywhere. As soon as a platform turns the PCD
into a dynamic one, at least S3 fails. When the PCD is dynamic, all
PcdGet() calls translate into PCD DXE protocol calls, which are only
permitted at boot time, not at runtime or during S3 resume.
We already have a variable called mMaxNumberOfCpus; it is initialized in
the entry point function like this:
> //
> // If support CPU hot plug, we need to allocate resources for possibly
> // hot-added processors
> //
> if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
> mMaxNumberOfCpus = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
> } else {
> mMaxNumberOfCpus = mNumberOfCpus;
> }
There's another use of the PCD a bit higher up, also in the entry point
function:
> //
> // Use MP Services Protocol to retrieve the number of processors and
> // number of enabled processors
> //
> Status = MpServices->GetNumberOfProcessors (MpServices, &mNumberOfCpus,
> &NumberOfEnabledProcessors);
> ASSERT_EFI_ERROR (Status);
> ASSERT (mNumberOfCpus <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
Preserve these calls in the entry point function, and replace all other
uses of PcdCpuMaxLogicalProcessorNumber -- there are only reads -- with
mMaxNumberOfCpus.
For PcdCpuHotPlugSupport==TRUE, this is an unobservable change.
For PcdCpuHotPlugSupport==FALSE, we even save SMRAM, because we no longer
allocate resources needlessly for CPUs that can never appear in the
system.
PcdCpuMaxLogicalProcessorNumber is also retrieved in
"UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c", but only in
the library instance constructor, which runs even before the entry point
function is called.
Cc: Igor Mammedov <imammedo@redhat.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com>
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=116
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Star Zeng [Wed, 23 Nov 2016 08:38:33 +0000 (16:38 +0800)]
SecurityPkg Tcg2PPLib: Support BlockSID related actions
Then Tcg2PhysicalPresenceLib can support TCG2 PP TPM2,
storage management and vendor specific requests according
to Physical Presence Interface Specification.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Jeff Fan [Wed, 23 Nov 2016 13:52:24 +0000 (21:52 +0800)]
UefiCpuPkg/DxeMpLib: Allocate new safe stack < 4GB
For long mode DXE, we will disable paging on AP to protected mode to execute AP
safe loop code in reserved memory range under 4GB. But we forget to allocate
stack for AP under 4GB and AP still are using original AP stack. If original AP
stack is larger than 4GB, it cannot be used after AP is transferred to protected
mode. Besides MwaitSupport == TRUE, AP stack is still required during phase of
disabling paging in long mode DXE.
Moreover, even though AP stack is always under 4GB (a) in Ia32 DXE and (b) with
this patch, after transferring to protected mode from X64 DXE, AP stack
(in BootServiceData) maybe crashed by OS after Exit Boot Service event.
This fix is to allocate reserved memory range under 4GB together with AP safe
loop code. APs will switch to new stack in safe loop code.
Cc: Laszlo Ersek <lersek@redhat.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
Sami Mujawar [Thu, 24 Nov 2016 19:56:12 +0000 (19:56 +0000)]
ArmPlatformPkg: Fix VE RTSM mem map descriptor count
The number of memory map entries used exceeded the allocated count,
thereby causing memory corruption.
Fixed the number of Virtual Memory Map Descriptors allocated in
describing the RTSM Memory Map. Also added an assert to confirm
that the descriptor count has not been exceeded, in the hope that it may
help highlight the problem should a new entry be added.
Evan Lloyd [Thu, 24 Nov 2016 19:56:11 +0000 (19:56 +0000)]
ArmPlatformPkg: Reformat VE Memory Map code
This change is purely cosmetic, with no functional impact, and only
exists to isolate cosmetic changes from a functional fix.
Some indentation is adjusted.
Overlength lines are re-flowed.
alignment on = is adjusted as some lines exceeded 80 columns.
if statement converted to conditional assignment.
Redundant re-calculation of CacheAttributes removed.
Ard Biesheuvel [Mon, 21 Nov 2016 12:21:38 +0000 (12:21 +0000)]
ArmPkg: remove the LinuxLoader application
The LinuxLoader application boots Linux in a way that prevents the OS
from accessing UEFI runtime services. Since we have better ways now
of invoking the kernel (via GRUB, or directly via the kernel's UEFI
stub), remove the obsolete LinuxLoader so that people will no longer
mistake it for a suitable reference of how to invoke the OS from UEFI.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Ard Biesheuvel [Mon, 21 Nov 2016 12:19:54 +0000 (12:19 +0000)]
BeagleBoardPkg/BeagleBoardPkg.dsc: remove the LinuxLoader application
The LinuxLoader should no longer be used now that both the ARM and arm64
kernels as well as GRUB have full support for acting as an OS loader in
the UEFI spec sense. So remove it from the Beagle build.
Ard Biesheuvel [Mon, 21 Nov 2016 12:13:18 +0000 (12:13 +0000)]
EmbeddedPkg/AndroidFastboot: drop dependency on the LinuxLoader
When booting the kernel via Fastboot, invoke the kernel image directly
rather than passing it to the LinuxLoader app. This requires the kernel
image to be built with UEFI stub support.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Hao Wu [Thu, 24 Nov 2016 02:43:33 +0000 (10:43 +0800)]
MdeModulePkg/EbcDebugger: Add ASSERT to ensure FieldBuffer is not NULL
In function EdbLoadCodBySymbolByIec(), AsciiStrGetNewTokenField() at line
1589 will return NULL if the first character in 'LineBuffer' is '\0'. But
the previous if statement at line 1576 ensures the above case will not
happen.
This commit adds ASSERT as warnings for the case that will not happen.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Hao Wu [Thu, 24 Nov 2016 02:37:55 +0000 (10:37 +0800)]
MdeModulePkg/EbcDebugger: Add missing check for symbol not found
In function DebuggerDisplaySymbolAccrodingToAddress(), when variable
'CandidateAddress' (returned by EbdFindSymbolAddress function) equals
(UINTN) -1, it also indicates that the symbol is not found at the given
address.
This commit adds this missing check.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Hao Wu [Thu, 24 Nov 2016 02:26:06 +0000 (10:26 +0800)]
MdeModulePkg/EbcDebugger: Add check for invalid 'CommandArg'
Add checks for the return value of function Atoi() in EdbCmdBreakpoint.c.
If the input parameter 'CommandArg' contains non-digit character, print
corresponding error message.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Dandan Bi [Tue, 15 Nov 2016 11:13:33 +0000 (19:13 +0800)]
MdeModulePkg/SetupBrowser:Don't support password without interactive flag
In current SetupBrowser, the logic related to non-interative password
is not correct. How to support it correctly or whether support it
is still under investigation. First step remove the incorrect logic.
Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
Haojian Zhuang [Wed, 23 Nov 2016 13:36:21 +0000 (21:36 +0800)]
EmbeddedPkg/MmcDxe: invoke SetIos() protocol method to set speed and width
Add the interface to change the bus width and speed.
By default, MMC is initialized with 1-bit mode and less than 400KHz bus
clock. It causes MMC working inefficiently.
Set I/O bus width on both MMC controller and EXTCSD. Otherwise, it may
cause unmatched failure case. And support more timing mode, high speed,
HS200 & HS400 mode.
Haojian Zhuang [Wed, 23 Nov 2016 13:36:23 +0000 (21:36 +0800)]
ArmPlatformPkg/PL180MciDxe: update for identifying SD
When CMD6 & ACMD51 are added into identifying SD process, PL180
should also support CMD6 & ACMD51. Otherwise, it will hang when
system tries to read expected data.
Marcin Wojtas [Thu, 24 Nov 2016 07:54:33 +0000 (08:54 +0100)]
MdeModulePkg/AtaAtapiPassThru: Ensure GHC.AE bit is always set in Ahci
According to AHCI Spec 1.3 GHC.AE bit description:
"The implementation of this bit is dependent upon the value of the
CAP.SAM bit. If CAP.SAM is '0', then GHC.AE shall be read-write and shall
have a reset value of '0'. If CAP.SAM is '1', then AE shall be read-only
and shall have a reset value of '1'."
Being in AhciMode, for proper operation it is required, that GHC.AE bit
is always set, before any other AHCI registers are written to. Current
AhciMode implementation, both in AhciReset() and AhciModeInitialization()
functions, set GHC.AE bit only depending on 'CAP.SAM == 0' condition,
assuming (according to the AHCI spec), that otherwise it has to be set
anyway. It may however happen, that even if 'CAP.SAM == 1', GHC.AE
requires updating by software.
This patch enables in AhciMode setting GHC.AE in case its initial value
is '0'. It fixes AHCI support for Marvell Armada 70x0 and 80x0 SoC
families. The change is transparent to all other platforms.
OvmfPkg/build.sh: Make GCC5 the default toolchain, catch GCC43 and earlier
v2:
* Changes suggested by Laszlo:
- change the catch-all (*) to GCC5, from GCC44
- remove the (5.*.*) pattern from GCC49
- generate error for GCC < 4.4
In v3, also generate error for really GCC < 4.4, like GCC 1.
Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Feng Tian [Wed, 23 Nov 2016 01:46:32 +0000 (09:46 +0800)]
MdeModulePkg/Xhci: Add 10ms delay before sending SendAddr cmd to dev
We send ADDRESS DEVICE CMD in XhcInitializeDeviceSlot(), which will
cause XHC issue a USB SET_ADDRESS request to the USB Device.
According to USB spec, there should have a 10ms delay before this
operation after resetting a given port.
But in original code, there is a possible path which may have no such
10ms delay:
UsbHubResetPort()->UsbHubSetPortFeature()->Stall(20)->UsbHubGetPortSt
atus()->XhcPollPortStatusChange()->(if RESET_C bit is set)->
XhcInitializeDeviceSlot()->(if RESET_C bit is set)->Stall(10)
projects / mirror_edk2.git / log