Laszlo Ersek [Fri, 18 Mar 2016 23:08:47 +0000 (00:08 +0100)]
OvmfPkg/PlatformPei: suppress wrong VS2008 warning (use of uninited local)
VS2008 seems to think that the "PciExBarBase" variable (introduced in
commit 7b8fe63561b4) can be evaluated for the
AddReservedMemoryBaseSizeHob() function call with its value being
uninitialized / indeterminate. This is not the case (see
"mHostBridgeDevId"); suppress the warning.
Reported-by: David Woodhouse <dwmw2@infradead.org>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/8871/focus=9431 Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: David Woodhouse <David.Woodhouse@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Star Zeng [Thu, 17 Mar 2016 05:31:44 +0000 (13:31 +0800)]
MdeModulePkg PlatformVarCleanupLib: Locate VarCheck protocol when using
Do not locate VarCheck protocol in Constructor, then the
gEdkiiVarCheckProtocolGuid could be removed from [Depex].
It will be more flexible for the library Consumer to work without VarCheck
protocol installed, for example at recovery boot mode with EmuRuntimeDxe.
The unused UefiLib is also been removed from [LibraryClasses] in *.inf.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Ard Biesheuvel [Wed, 16 Mar 2016 14:04:18 +0000 (15:04 +0100)]
Omap35xxPkg: drop CpuExceptionHandlerLib library class resolution
Remove the null resolution for CpuExceptionHandlerLib: this version will
no longer work once we update ARM's CpuDxe to depend on the ARM specific
version. Since this module does not actually rely on it, let's just remove
all mention of it.
Ard Biesheuvel [Wed, 16 Mar 2016 14:03:40 +0000 (15:03 +0100)]
BeagleBoardPkg: move to ARM version of CpuExceptionHandlerLib
Change our resolution for the previously unused CpuExceptionHandlerLib
from the null implementation to the newly added implementation specific
to AARCH64 and ARM. This is needed since our CpuDxe will start using it
in a subsequent patch.
Ard Biesheuvel [Wed, 16 Mar 2016 10:03:55 +0000 (11:03 +0100)]
ArmVirtPkg/ArmVirtQemu: move to ARM version of CpuExceptionHandlerLib
Change our resolution for the previously unused CpuExceptionHandlerLib
from the null implementation to the newly added implementation specific
to AARCH64 and ARM. This is needed since our CpuDxe will start using it
in a subsequent patch.
Cohen, Eugene [Mon, 7 Mar 2016 15:16:35 +0000 (15:16 +0000)]
ArmPkg: ARM/AArch64 implementation of CpuExceptionHandlerLib
Introduce ARM and AArch64 instances of the CpuExceptionHandlerLib which
provides exception handling and registration of handlers regardless of
execution phase.
Two variants of the ArmExceptionLib are provided: one where exception
handlers reside within the module (meeting appropriate architectural
alignment requirements for the vector table) and another one that will
relocate a copy of thee xception handlers to an address specified by
PcdCpuVectorBaseAddress. The ArmRelocateExceptionLib is intended for use
in cases where ArmExceptionLib is too large for the application
(uncompressed XIP images) as driven by the vector table alignment padding.
The AArch64 build of this library supports execution at EL1, EL2, and EL3
exception levels.
Tested on ARM, and AArch64 with SEC, DXE Core, and CpuDxe modules.
ConSplitter's Absolute Pointer should scale virtual device's resolution like what Simple Pointer do.
Before this change, caller will get Virtual device's resolution but physical device's current point.
This change let caller get Virtual device's resolution with virtual device's current point.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Derek Lin <derek.lin2@hpe.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Qiu Shumin [Tue, 8 Mar 2016 02:26:29 +0000 (10:26 +0800)]
ShellPkg: Per UEFI Shell 2.2 SPEC to make Shell supports 'NoNesting'.
This patch makes Shell support -nonesting invocation option. This option
specifies that EFI_SHELL_PROTOCOL.Execute API nesting of a new Shell
instance is optional and dependent on the 'nonesting' Shell environment
variable.
Fu Siyuan [Mon, 14 Mar 2016 02:43:42 +0000 (10:43 +0800)]
NetworkPkg: Fix the driver model issue in HTTP Boot driver.
The HTTP Boot driver have some UEFI driver model problems which will make the
code ASSERT when it's disconnected.
First, the driver opens the HttpSb protocol BY_CHILD without BY_DRIVER attribute.
So the driver binding stop won't be called when HTTP driver is disconnected, so
a child handle is left and made HTTP driver binding stop function goes into error.
This patch remove this unnecessary OpenProtocol and only unload the HII from when
both the IP4 and IP6 stack have been stopped completely.
The second issue is the HTTP boot driver always use the driver's image handle as
it's driver binding handle, it's not correct. HTTP Boot driver provides 2 separate
driver binding protocols from IP4 and IP6 stack, so it has 2 driver binding handle.
So this patch fix the code to use correct driver binding handle when create/open
a HTTP child handle.
Dandan Bi [Tue, 15 Mar 2016 01:44:16 +0000 (09:44 +0800)]
MdeModulePkg/DriverSampleDxe: Uninstall the ConfigAccess protocol
In DriverSampleInit, has installed the configAccess protocol to
the DriverHandle[1], but don't uninstall it in DriverSampleUnload.
Now uninstall the configAccess protocol.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Yonghong Zhu [Thu, 25 Feb 2016 08:13:31 +0000 (16:13 +0800)]
BaseTools: add new command line option to support override PCD value
this patch add new feature to support override PCD value on the command
line. The value from the command line is the highest priority.
1.Add option(--pcd) to support both PcdName and TokenSpaceGuild.PcdName
2.For void* type PCD, use following format:
cstring PCD: --pcd PcdName="string"
unicodestring PCD: --pcd PcdName=L"string"
CArray PCD: --pcd PcdName=B"{0x1, 0x2}"
3.Build Report, use *B to show the PCD value was overridden in the
command line.
4.Error Condition:
Report error if the PCD is not found
Report error if the PcdName is found under multiple different TokenSpaceGuid
Report error if PCD value syntax is incorrect
Report error if void* type PCD value exceed its max size
Ruiyu Ni [Tue, 15 Mar 2016 08:10:40 +0000 (16:10 +0800)]
OvmfPkg/LegacyRegion: Support legacy region manipulation of Q35
Current implementation only supports legacy region of 440 chip.
When QEMU is launched in Q35 mode using CSM enabled OVMF image,
LegacyBios driver fails to start due to the legacy region
[0xC0000, 0xFFFFF] cannot be written.
v2:
* just updates the comments.
v3:
* uses PcdOvmfHostBridgePciDevId as Jordan suggested.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Justen Jordan <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Marvin Haeuser [Sun, 21 Feb 2016 00:46:59 +0000 (08:46 +0800)]
BaseTools: Support recent versions of cx_freeze.
This patch fixes the assumed invalid command to start recent versions
of cx_freeze on Windows, which are python and not Windows
executables. To launch them correctly, the '$(PYTHON_HOME)\python'
prefix has been added, so that Python can interpret the tool.
Star Zeng [Mon, 14 Mar 2016 01:48:26 +0000 (09:48 +0800)]
MdeModulePkg: Add PcdMaxPeiPerformanceLogEntries16 PROMPT&HELP STR to *.uni
Commit 7c50b3434377cbb49ce4514ee31339000a5cadc0 introduced
PcdMaxPeiPerformanceLogEntries16 to support > 256 PEI performance log
entries, but its PROMPT&HELP STR were forgotten to be added into *.uni.
Haojian Zhuang [Mon, 14 Mar 2016 05:30:37 +0000 (13:30 +0800)]
ArmPlatformPkg: PL061: support multiple controller
Support multiple PL061 controllers. If platform gpio driver couldn't be
found, PL061 gpio driver will continue to load PcdPL061GpioBase as the
register base.
It could be compatible with the use case of current PL061 gpio driver.
Haojian Zhuang [Mon, 14 Mar 2016 05:30:36 +0000 (13:30 +0800)]
EmbeddedPkg: enhance for multiple gpio controllers
EmbeddedGpio only supports one gpio controller in one platform. Now
create PLATFORM_GPIO_CONTROLLER to support multiple gpio controllers
in one platform.
Yonghong Zhu [Sun, 13 Mar 2016 10:13:04 +0000 (18:13 +0800)]
BaseTools/BPDG: Fix the bug to get the PCD Size
The original bug is only consider int format of PcdSize, but forgot the
Hex format. The fix is use the already exist variable PCD.PcdBinSize
which done to translate PCD size cover both format.
Michael Kinney [Tue, 8 Mar 2016 22:54:30 +0000 (14:54 -0800)]
UefiCpuPkg/Include: Add top level MSR include file
Add top level MSR include file that includes the Architecural MSR
include file and all family specific MSR files from the Msr
subdirectory
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR).
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Michael Kinney [Tue, 8 Mar 2016 22:05:47 +0000 (14:05 -0800)]
UefiCpuPkg/Include: Add Pentium M MSR include file
Add Pentium M MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-18.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Michael Kinney [Tue, 8 Mar 2016 22:03:12 +0000 (14:03 -0800)]
UefiCpuPkg/Include: Add Xeon Processor D MSR include file
Add Xeon Processor D MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-13.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Michael Kinney [Tue, 8 Mar 2016 21:57:13 +0000 (13:57 -0800)]
UefiCpuPkg/Include: Add Atom MSR include file
Add Atom MSRs from:
Intel(R) 64 and IA-32 Architectures Software Developer's
Manual, Volume 3, December 2015, Chapter 35
Model-Specific-Registers (MSR), Section 35-3.
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Qin Long [Fri, 11 Mar 2016 21:57:18 +0000 (13:57 -0800)]
CryptoPkg/OpensslLib: Upgrade OpenSSL version to 1.0.2g
OpenSSL 1.0.2g was released with several severity fixes at
01-Mar-2016(https://www.openssl.org/news/secadv/20160301.txt).
Upgrade the supported OpenSSL version in CryptoPkg/OpensslLib to
catch the latest release 1.0.2g.
(NOTE: RT4175 from David Woodhouse was included in 1.0.2g. The
new-generated patch will remove this part. And the line
endings were still kept as before in this version for
consistency)
CC: Ting Ye <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qin Long <qin.long@intel.com> Reviewed-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Fri, 11 Mar 2016 21:16:51 +0000 (13:16 -0800)]
CryptoPkg/OpensslLib: Convert saved opensslconf.h to DOS line endings
Until we fix the git repository to store line endings properly and then
just check them out in the appropriate form for the platform, let's make
process_files.sh convert the opensslconf.h to DOS line endings when it
creates it.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Reviewed-by: Qin Long <qin.long@intel.com>
Ard Biesheuvel [Thu, 10 Mar 2016 10:36:31 +0000 (17:36 +0700)]
ArmVirtPkg/VirtFdtDxe: set /chosen/linux,pci-probe-only to 1 in DTB
Unlike Linux on x86, which typically honors the PCI configuration performed
by the firmware, Linux on ARM assumes that the PCI subsystem needs to be
configured from scratch. This is not entirely unreasonable given the
historical background of embedded systems using very basic bootloaders,
but is no longer tenable with Linux on arm64 moving to UEFI and ACPI in the
server space. For this reason, PCI support in the arm64 kernel running under
ACPI is likely to move to the x86 model of honoring the PCI configuration
done by the firmware.
So let's align with that in our DT based configuration as well, and set the
/chosen/linux,pci-probe-only property to 1 in the Device Tree before we
hand it to the OS.
In case we are exposing an emulated VGA PCI device to the guest, which may
subsequently get exposed via the Graphics Output protocol and driven as an
efifb by the OS, this ensures the PCI resource allocations for the framebuffer
are not overridden, since that would cause the framebuffer to stop working.
Jiewen Yao [Thu, 10 Mar 2016 05:52:15 +0000 (21:52 -0800)]
SecurityPkg: Clear LocalAuthSession content after use.
Some commands in DxeTcg2PhysicalPresenceLib accept
AuthSession as input parameter and copy to local
command buffer. After use, this AuthSession content
should be zeroed, because there might be some secrete
there.
Jiewen Yao [Wed, 9 Mar 2016 04:47:15 +0000 (20:47 -0800)]
SecurityPkg: Add Tpm2 prefix to lib to avoid conflict.
Tpm2Ptp.c is library, but it miss Tpm2 prefix for
IsPtpPresence() and GetPtpInterface(). There might
be risk as name symbol conflict. This patch adds Tpm2
prefix for them.
Jiewen Yao [Thu, 10 Mar 2016 05:44:40 +0000 (21:44 -0800)]
SecurityPkg: Fix Tcg2 SubmitRequestToPreOSFunction() fail in second times.
Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction()
has check if current request is same as previous.
But it forget check RequestParameter, which causes
second request fail to process, if RequestParameter
is different.
This issue is caused by the string token ID for help message,
which is defined in the internal head file.
This head file is used for reference more than once. So,
multiple definition for the string token ID error will be
enrolled.
Laszlo Ersek [Fri, 4 Mar 2016 00:49:54 +0000 (01:49 +0100)]
OvmfPkg: PciHostBridgeLib: permit access to the full extended config space
By now OVMF makes MdeModulePkg/Bus/Pci/PciHostBridgeDxe go through
MMCONFIG (when running on Q35). Enable the driver to address each B/D/F's
config space up to and including offset 0xFFF.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
Every module will select 0xCF8 vs. ECAM based on the OVMF platform type
(i440fx or Q35). Notably, MdeModulePkg/Bus/Pci/PciHostBridgeDxe is among
the affected drivers.
The BasePciExpressLib instance is where the PcdPciExpressBaseAddress PCD
fills its original role.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
Laszlo Ersek [Thu, 3 Mar 2016 23:53:12 +0000 (00:53 +0100)]
OvmfPkg: add DxePciLibI440FxQ35
This library is a trivial unification of the following two PciLib
instances (and the result is easily diffable against each):
- MdePkg/Library/BasePciLibCf8
- MdePkg/Library/BasePciLibPciExpress
The PCI config access method is determined in the constructor function,
from the dynamic PCD "PcdOvmfHostBridgePciDevId" that is set by
PlatformPei.
The library instance is usable in DXE phase or later modules: the PciLib
instances being unified have no firmware phase / client module type
restrictions, and here the only PCD access is made in the constructor
function. That is, even before a given client executable's entry point is
invoked.
The library instance depends on PlatformPei both for setting the PCD
mentioned above, and also for enabling MMCONFIG on Q35. PEI and earlier
phase modules are not expected to need extended config access even on Q35.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
Laszlo Ersek [Thu, 3 Mar 2016 19:46:22 +0000 (20:46 +0100)]
OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG / ECAM) on Q35
The comments in the code should speak for themselves; here we note only
two facts:
- The PCI config space writes (to the PCIEXBAR register) are performed
using the 0xCF8 / 0xCFC IO ports, by virtue of PciLib being resolved to
BasePciLibCf8. (This library resolution will permanently remain in place
for the PEI phase.)
- Since PCIEXBAR counts as a chipset register, it is the responsibility of
the firmware to reprogram it at S3 resume. Therefore
PciExBarInitialization() is called regardless of the boot path. (Marcel
recently posted patches for SeaBIOS that implement this.)
This patch suffices to enable PCIEXBAR (and the dependent ACPI table
generation in QEMU), for the sake of "PCIeHotplug" in the Linux guest:
ACPI: MCFG 0x000000007E17F000 00003C
(v01 BOCHS BXPCMCFG 00000001 BXPC 00000001)
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0x80000000-0x8fffffff]
(base 0x80000000)
PCI: MMCONFIG at [mem 0x80000000-0x8fffffff] reserved in E820
acpi PNP0A08:00: _OSC: OS supports
[ExtendedConfig ASPM ClockPM Segments MSI]
acpi PNP0A08:00: _OSC: OS now controls
[PCIeHotplug PME AER PCIeCapability]
In the following patches, we'll equip the core PCI host bridge / root
bridge driver and the rest of DXE as well to utilize ECAM on Q35.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Ref: https://github.com/tianocore/edk2/issues/32
Ref: http://thread.gmane.org/gmane.comp.bios.coreboot.seabios/10548 Suggested-by: Marcel Apfelbaum <marcel@redhat.com> Reported-by: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Michał Zegan <webczat_200@poczta.onet.pl> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Laszlo Ersek [Tue, 8 Mar 2016 12:01:03 +0000 (13:01 +0100)]
OvmfPkg: PlatformPei: lower the 32-bit PCI MMIO base to 2GB on Q35
Gerd has advised us that long term support Q35 machine types have no low
RAM above 2GB, hence we should utilize the [2GB, 3GB) gap -- that we
currently leave unused -- for MMIO. (Plus, later in this series, for the
PCIEXBAR too.)
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Ref: https://github.com/tianocore/edk2/issues/32
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/8707/focus=8817 Suggested-by: Gerd Hoffmann <kraxel@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Michał Zegan <webczat_200@poczta.onet.pl> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Section 5.1.16 ("PCIEXBAR -- PCI Express Register Range Base Address") in
Intel document #316966-002 (already referenced near the top of this header
file) describes the Q35 DRAM Controller register that configures the
memory-mapped PCI config space (also known as MMCONFIG, and ECAM /
Enhanced Configuration Access Method).
In this patch we add the macros we'll need later. We'll only support the
256 MB memory-mapped config space -- enough for buses [0, 255].
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Ref: https://github.com/tianocore/edk2/issues/32
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
Jordan Justen [Thu, 3 Mar 2016 08:44:38 +0000 (00:44 -0800)]
BaseTools ConvertMasmToNasm: Fix exception when no arguments are given
Convert to use the argparse library rather than optparse.
As part of the conversion, the script will now give an error message
if no arguments are given. Previously the script would give an
exception when no arguments were given.
Jordan Justen [Wed, 10 Feb 2016 18:08:37 +0000 (10:08 -0800)]
BaseTools ConvertMasmToNasm: Fix running script outside of a git tree
The script previously would hit an exception if it was run outside of
a git tree.
The exception looked like:
edk2/BaseTools/Scripts/ConvertMasmToNasm.py Version 0.01
Traceback (most recent call last):
File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 986, in <module>
ConvertAsmApp()
File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 984, in __init__
ConvertAsmFile(src, dst, self)
File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 209, in __init__
CommonUtils.__init__(self, clone)
File "edk2/BaseTools/Scripts/ConvertMasmToNasm.py", line 69, in __init__
self.gitemail = clone.gitemail
AttributeError: ConvertAsmApp instance has no attribute 'gitemail'
Cohen, Eugene [Tue, 1 Mar 2016 23:39:36 +0000 (23:39 +0000)]
BaseTools: Update ARM/AArch64 GenFv vector processing for encapsulated FVs
Instead of only handling SEC Core or PEI Core instances in the outer FV,
the GenFv tool will now recurse into FV image FFS files to look for instances
in encapsulated FVs so the vector area can be updated appropriately.
Yonghong Zhu [Wed, 9 Mar 2016 06:03:39 +0000 (14:03 +0800)]
BaseTools: report warning if VOID* PCD with {} value is not 8-byte aligned
For VOID* Pcd with {} value, If platform developer wants to put in a
specific hex offset value that is not 8-byte aligned for VOID * then we
allow it with a warning message.
Ghazi Belaam [Fri, 4 Mar 2016 22:07:50 +0000 (06:07 +0800)]
NetworkPkg: Use the New Functions from HttpLib
After submitting changes for HttpLib, other modules should be able to use
those functions
1 remove the private function and their calls
2 update it with the functions from httpLib
Marvin Haeuser [Sun, 21 Feb 2016 00:46:58 +0000 (08:46 +0800)]
BaseTools: Add Multiple Workspaces support for custom Makefiles.
This patch makes sure the MODULE_DIR variable points to the correct
location when multiple workspaces are used. Currently, it is
always prefixed with $(WORKSPACE), which only works as long as the
package is in the Workspace.
Code modules were not effected because the required paths were valid,
but for custom Makefiles, the MODULE_DIR variable is used.
Cinnamon Shia [Tue, 8 Mar 2016 06:00:04 +0000 (14:00 +0800)]
MdeModulePkg: Increase the maximum number of PEI performance log entries
The maximum number of PEI performance log entries is 255.
Add a new PCD, PcdMaxPeiPerformanceLogEntries16, to increase the maximum
number of PEI performance log entries.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com> Reviewed-by: Samer EL-Haj-Mahmoud <elhaj@hpe.com> Reviewed-by: Joseph Shifflett <joseph.shifflett@hpe.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Gary Lin [Tue, 8 Mar 2016 09:50:44 +0000 (17:50 +0800)]
OvmfPkg: Enable Network2 Shell Commands for IPv6
Enable the network2 commands when NETWORK_IP6_ENABLE is TRUE, so we
would have Ping6 and Ifconfig6.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Ching-Pang Lin <glin@suse.com>
[lersek@redhat.com: added the word "Shell" to the subject] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Star Zeng [Mon, 7 Mar 2016 06:01:46 +0000 (14:01 +0800)]
MdeModulePkg AcpiTableDxe: Use Rsdt to check against NULL
Some static scan tool may regard CurrentRsdtEntry to be potentially
referenced to NULL pointer if CurrentRsdtEntry == NULL is used in
the right above if condition judgment.
It is introduced by commit f9bbb8d9c3f065faba9f266cf4e731fe2ca70c4d.
To avoid it and have same style with
"((Xsdt == NULL) || CurrentTablePointer64 == (UINT64) (UINTN) Table->Table)",
use Rsdt instead of CurrentRsdtEntry to check against NULL.
Laszlo Ersek [Tue, 8 Mar 2016 03:12:57 +0000 (11:12 +0800)]
NetworkPkg: HttpBootDxe: fix gcc build failure.
Commit fa848a404894 ("NetworkPkg: Add URI configuration form to HTTP boot
driver") causes the build to fail with gcc:
> NetworkPkg/HttpBootDxe/HttpBootConfig.c: In function
> 'HttpBootAddBootOption':
> NetworkPkg/HttpBootDxe/HttpBootConfig.c:148:14:
> error: passing argument 3 of 'GetVariable2' from incompatible pointer
> type [-Werror]
> );
> ^
> In file included from NetworkPkg/HttpBootDxe/HttpBootDxe.h:31:0,
> from NetworkPkg/HttpBootDxe/HttpBootConfig.c:15:
> MdePkg/Include/Library/UefiLib.h:708:1: note: expected 'void **' but
> argument is of type 'CHAR16 **'
> GetVariable2 (
> ^
> cc1: all warnings being treated as errors
-----Original Message-----
From: Leahy, Leroy P
Sent: Friday, March 4, 2016 8:58 AM
To: Ni, Ruiyu <ruiyu.ni@intel.com>; edk2-devel@lists.01.org; Bjorge, Erik C <erik.c.bjorge@intel.com> Cc: Leahy, Leroy P <leroy.p.leahy@intel.com>
Subject: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling error
Change vender to vendor
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Ruiyu Ni [Fri, 4 Mar 2016 10:12:38 +0000 (18:12 +0800)]
MdeModulePkg/Bds: More user-friendly network boot option description
The patch enhances the UefiBootManagerLib to use more user-friendly
network boot option description.
It builds description like below:
"PXEv6 (MAC:112233445566 VLAN1)"
"HTTPv4 (MAC:112233445566)"
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
Zhang, Lubo [Mon, 29 Feb 2016 06:25:50 +0000 (14:25 +0800)]
NetworkPkg: Support print help information using -? command.
v2:
*Modify the logic of show SAD,SPD and PAD help info, include them in -?
instead of follow -p command.
Since Shell supports finding help information from resource section
of application image. We modify the Shell application Under NetworkPkg
to support print help information string using -? command.
Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
projects / mirror_edk2.git / log