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(parent: 6e5a33d) | patch
UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supports
authorRay Ni <ray.ni@intel.com>
Wed, 12 Jun 2019 09:26:45 +0000 (17:26 +0800)
committerRay Ni <ray.ni@intel.com>
Fri, 12 Jul 2019 07:13:51 +0000 (15:13 +0800)
commit4eee0cc7cc0db74489b99c19eba056b53eda6358
treec360139d639118a99fe6c86c0ff58b335b189656tree
parent6e5a33d1fba7c170dc8680eeb81a9c7f4fe14fe6commit | diff
UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supports

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1946

The patch changes SMM environment to use 5 level paging when CPU
supports it.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
(cherry picked from commit 7365eb2c8cf1d7112330d09918c0c67e8d0b827a)
UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c diff | blob | blame | history
UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c diff | blob | blame | history
UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c diff | blob | blame | history
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm diff | blob | blame | history
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c diff | blob | blame | history
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