From f0bbcdf80df932cb72aae4707ad4274fdfcc5726 Mon Sep 17 00:00:00 2001 From: Leendert van Doorn Date: Thu, 24 Mar 2016 15:30:06 -0500 Subject: [PATCH] ArmPkg|EmbeddedPkg: make PcdCpuVectorBaseAddress 64 bits wide Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran Reviewed-by: Ard Biesheuvel --- ArmPkg/ArmPkg.dec | 4 ++-- ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 4 ++-- EmbeddedPkg/Library/GdbDebugAgent/Arm/Processor.c | 8 ++++---- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index ff4531e441..e903066538 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -60,7 +60,7 @@ # On ARM Architecture with the Security Extension, the address for the # Vector Table can be mapped anywhere in the memory map. It means we can # point the Exception Vector Table to its location in CpuDxe. - # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress) + # By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress) gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022 # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before # it has been configured by the CPU DXE @@ -90,7 +90,7 @@ # This PCD will free the unallocated buffers if their size reach this threshold. # We set the default value to 512MB. gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003 - gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004 + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004 gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005 # diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c index 0cf0766b9c..e8ea1f159d 100644 --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c +++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c @@ -103,7 +103,7 @@ InitializeCpuExceptionHandlers( // if we are requested to copy exceptin handlers to another location if (gArmRelocateVectorTable) { - VectorBase = PcdGet32(PcdCpuVectorBaseAddress); + VectorBase = PcdGet64(PcdCpuVectorBaseAddress); Status = CopyExceptionHandlers(VectorBase); } @@ -118,7 +118,7 @@ InitializeCpuExceptionHandlers( // for encapsulated FVs. ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0); - // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector + // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector // Base Address to point into CpuDxe code. VectorBase = (UINTN)ExceptionHandlersStart; diff --git a/EmbeddedPkg/Library/GdbDebugAgent/Arm/Processor.c b/EmbeddedPkg/Library/GdbDebugAgent/Arm/Processor.c index 61c6184fae..2b353f0a23 100644 --- a/EmbeddedPkg/Library/GdbDebugAgent/Arm/Processor.c +++ b/EmbeddedPkg/Library/GdbDebugAgent/Arm/Processor.c @@ -481,7 +481,7 @@ InFiqCrack ( IN UINT32 PC ) { - UINT32 VectorBase = PcdGet32 (PcdCpuVectorBaseAddress); + UINT64 VectorBase = PcdGet64 (PcdCpuVectorBaseAddress); UINT32 Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart; if ((PC >= VectorBase) && (PC <= (VectorBase + Length))) { @@ -626,7 +626,7 @@ InitializeDebugAgent ( UINTN Offset; UINTN Length; BOOLEAN IrqEnabled; - UINT32 *VectorBase; + UINT64 *VectorBase; // @@ -644,7 +644,7 @@ InitializeDebugAgent ( // // Reserve space for the exception handlers // - VectorBase = (UINT32 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress); + VectorBase = (UINT64 *)(UINTN)PcdGet64 (PcdCpuVectorBaseAddress); // Copy our assembly code into the page that contains the exception vectors. @@ -657,7 +657,7 @@ InitializeDebugAgent ( *(UINTN *) (((UINT8 *)VectorBase) + Offset) = (UINTN)AsmCommonExceptionEntry; // Flush Caches since we updated executable stuff - InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length); + InvalidateInstructionCacheRange ((VOID *)PcdGet64(PcdCpuVectorBaseAddress), Length); // setup a timer so gdb can break in via ctrl-c DebugAgentTimerIntialize (); -- 2.39.2