From 7fffeef9bece37fe48341fcf47edb474f954e690 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Wed, 2 May 2012 20:00:54 +0000 Subject: [PATCH] ARM Packages: Fixed th 'NS' (Non Secure) bit in the MMU page Table Descriptor The 'NS' bit must only be set in Secure world to define the Non-Secure region of the Non-Secure World. This bit must not be set in Non-Secure World. Signed-off-by: Olivier Martin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13252 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Include/Chipset/ARM1176JZ-S.h | 46 +++++++------- ArmPkg/Include/Chipset/ArmV7Mmu.h | 61 +++++++++---------- ArmPkg/Include/Library/ArmLib.h | 15 +++-- ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c | 6 +- ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c | 6 +- ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c | 24 ++++---- .../ArmRealViewEbLibRTSM/ArmRealViewEbMem.c | 8 +-- .../Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c | 19 ++---- .../Library/ArmVExpressLibRTSM/RTSMMem.c | 8 +-- ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c | 3 +- 10 files changed, 97 insertions(+), 99 deletions(-) diff --git a/ArmPkg/Include/Chipset/ARM1176JZ-S.h b/ArmPkg/Include/Chipset/ARM1176JZ-S.h index 8ae43c735d..ba24bcb626 100644 --- a/ArmPkg/Include/Chipset/ARM1176JZ-S.h +++ b/ArmPkg/Include/Chipset/ARM1176JZ-S.h @@ -1,6 +1,7 @@ /** @file Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2011-2012, ARM Limited. All rights reserved. This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -38,8 +39,7 @@ #define TT_DESCRIPTOR_SECTION_SIZE (0x00100000) #define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19) -#define TT_DESCRIPTOR_SECTION_NS_SECURE (0UL << 19) -#define TT_DESCRIPTOR_SECTION_NS_NON_SECURE (1UL << 19) +#define TT_DESCRIPTOR_SECTION_NS (1UL << 19) #define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17) #define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17) @@ -86,27 +86,27 @@ #define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000) #define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) (a & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK) -#define TT_DESCRIPTOR_SECTION_WRITE_BACK(Secure) (TT_DESCRIPTOR_TYPE_SECTION | \ - (Secure ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC) -#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(Secure) (TT_DESCRIPTOR_TYPE_SECTION | \ - (Secure ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC) -#define TT_DESCRIPTOR_SECTION_UNCACHED(Secure) (TT_DESCRIPTOR_TYPE_SECTION | \ - (Secure ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE) +#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_TYPE_SECTION | \ + (NonSecure ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC) +#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_TYPE_SECTION | \ + (NonSecure ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC) +#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_TYPE_SECTION | \ + (NonSecure ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE) #define CPACR_CP_FULL_ACCESS 0x0FFFFFFF diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/ArmV7Mmu.h index 581cd9572c..380ab9f229 100644 --- a/ArmPkg/Include/Chipset/ArmV7Mmu.h +++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011, ARM Limited. All rights reserved. +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -66,8 +66,7 @@ #define TT_DESCRIPTOR_SECTION_SIZE (0x00100000) #define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19) -#define TT_DESCRIPTOR_SECTION_NS_SECURE (0UL << 19) -#define TT_DESCRIPTOR_SECTION_NS_NON_SECURE (1UL << 19) +#define TT_DESCRIPTOR_SECTION_NS (1UL << 19) #define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17) #define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17) @@ -166,34 +165,34 @@ #define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK) #define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12 -#define TT_DESCRIPTOR_SECTION_WRITE_BACK(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC) -#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC) -#define TT_DESCRIPTOR_SECTION_DEVICE(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE) -#define TT_DESCRIPTOR_SECTION_UNCACHED(Secure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((Secure) ? TT_DESCRIPTOR_SECTION_NS_SECURE : TT_DESCRIPTOR_SECTION_NS_NON_SECURE ) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE) +#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ + ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC) +#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ + ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC) +#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ + ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE) +#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ + ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ + TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ + TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ + TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ + TT_DESCRIPTOR_SECTION_AP_RW_RW | \ + TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE) #define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \ diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 9b4a036bef..50cd50212f 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -1,6 +1,7 @@ /** @file Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -47,15 +48,21 @@ typedef struct { UINTN InstructionCacheLineLength; } ARM_CACHE_INFO; +/** + * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes. + * + * The Non Secure memory attribute (ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_*) should only + * be used in Secure World to distinguished Secure to Non-Secure memory. + */ typedef enum { ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED = 0, - ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED, + ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK, - ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK, + ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK, ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH, - ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH, + ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH, ARM_MEMORY_REGION_ATTRIBUTE_DEVICE, - ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE + ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE } ARM_MEMORY_REGION_ATTRIBUTES; #define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1) diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c b/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c index 1257be8cf6..86427035ed 100644 --- a/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c +++ b/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c @@ -39,13 +39,13 @@ FillTranslationTable ( case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED: Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK: Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH: Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED: Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(1); break; default: diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c b/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c index 6b698a3356..7c3a384a97 100644 --- a/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c +++ b/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c @@ -40,9 +40,9 @@ FillTranslationTable ( case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED: Attributes = TT_DESCRIPTOR_SECTION_UNCACHED_UNBUFFERED; break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK: - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH: - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED: ASSERT(0); // Trustzone is not supported on ARMv5 default: Attributes = TT_DESCRIPTOR_SECTION_UNCACHED_UNBUFFERED; diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c index 69f360c3a6..a0fbc1ff5c 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c @@ -41,19 +41,19 @@ PopulateLevel2PageTable ( switch (Attributes) { case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK: - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK: PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK; break; case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH: - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH: PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_THROUGH; break; case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE: - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE: PageAttributes = TT_DESCRIPTOR_PAGE_DEVICE; break; case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED: - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED: PageAttributes = TT_DESCRIPTOR_PAGE_UNCACHED; break; default: @@ -146,16 +146,16 @@ FillTranslationTable ( case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED: Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK: Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH: Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE: Attributes = TT_DESCRIPTOR_SECTION_DEVICE(1); break; - case ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED: + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED: Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(1); break; default: @@ -245,20 +245,20 @@ ArmConfigureMmu ( // Translate the Memory Attributes into Translation Table Register Attributes if ((TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED) || - (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED)) { + (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED)) { TTBRAttributes = TTBR_NON_CACHEABLE; } else if ((TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK) || - (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK)) { + (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK)) { TTBRAttributes = TTBR_WRITE_BACK_ALLOC; } else if ((TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH) || - (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_THROUGH)) { + (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) { TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC; } else { //TODO: We should raise an error here TTBRAttributes = TTBR_NON_CACHEABLE; } - ArmSetTTBR0 ((VOID *)(UINTN)((TranslationTable & 0xFFFFC000) | (TTBRAttributes & 0x7F))); + ArmSetTTBR0 ((VOID *)(UINTN)((TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F))); ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) | DOMAIN_ACCESS_CONTROL_NONE(14) | diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c index 66b149c8e4..d1a55a8360 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c @@ -74,13 +74,13 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE; VirtualMemoryTable[Index].Length = ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // SMB CS0-CS1 - NOR Flash 1 & 2 VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_NOR_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_NOR_BASE; VirtualMemoryTable[Index].Length = ARM_EB_SMB_NOR_SZ + ARM_EB_SMB_DOC_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // SMB CS2 - SRAM VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_SRAM_BASE; @@ -92,14 +92,14 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_PERIPH_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_PERIPH_BASE; VirtualMemoryTable[Index].Length = ARM_EB_SMB_PERIPH_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // If a Logic Tile is connected to The ARM Versatile Express Motherboard if (MmioRead32(ARM_EB_SYS_PROCID1_REG) != 0) { VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_LOGIC_TILE_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE; VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1)); } else { diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c index 13ec5de8d0..ef8fa4191a 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c @@ -26,8 +26,6 @@ // DDR attributes #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED -#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK -#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED /** Return the Virtual Memory Map of your platform @@ -45,7 +43,6 @@ ArmPlatformGetVirtualMemoryMap ( ) { ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; - BOOLEAN TrustzoneSupport; UINTN Index = 0; ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; @@ -56,14 +53,10 @@ ArmPlatformGetVirtualMemoryMap ( return; } - // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World. - // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case - TrustzoneSupport = PcdGetBool (PcdTrustzoneSupport); - if (FeaturePcdGet(PcdCacheEnable) == TRUE) { - CacheAttributes = (TrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED); + CacheAttributes = DDR_ATTRIBUTES_CACHED; } else { - CacheAttributes = (TrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED); + CacheAttributes = DDR_ATTRIBUTES_UNCACHED; } if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) { @@ -84,13 +77,13 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE; VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ; - VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE); + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // SMB CS0-CS1 - NOR Flash 1 & 2 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE; VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ; - VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE); + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // SMB CS2 - SRAM VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE; @@ -102,14 +95,14 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE; VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ; - VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE); + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // If a Logic Tile is connected to The ARM Versatile Express Motherboard if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) { VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE; VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ; - VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE); + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1)); } else { diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index 4537a71456..f3e8cafc0f 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -85,13 +85,13 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE; VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // SMB CS0-CS1 - NOR Flash 1 & 2 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE; VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // SMB CS2 - SRAM VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE; @@ -103,7 +103,7 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE; VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE; VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; //TODO:This should be enabled for final release. Right now, ARM VE RTSM crashes. // // If a Logic Tile is connected to The ARM Versatile Express Motherboard @@ -111,7 +111,7 @@ ArmPlatformGetVirtualMemoryMap ( // VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE; // VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE; // VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ; -// VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE; +// VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // // ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1)); // } else { diff --git a/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c b/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c index 3477693916..138216e9b7 100644 --- a/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c +++ b/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011, ARM Limited. All rights reserved. +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -27,7 +27,6 @@ // Section #define TT_DESCRIPTOR_SECTION_STRONGLY_ORDER (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - TT_DESCRIPTOR_SECTION_NS_NON_SECURE | \ TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ -- 2.39.2