From a41b5272cdffba5fd9c4734d4c06c8682186d822 Mon Sep 17 00:00:00 2001 From: erictian Date: Wed, 29 Sep 2010 05:50:45 +0000 Subject: [PATCH] add native ide/ahci driver git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10901 6f19259b-4bc3-4df7-8a09-765794883524 --- .../Bus/Ata/AtaAtapiPassThru/AhciMode.c | 2010 +++++++++++++ .../Bus/Ata/AtaAtapiPassThru/AhciMode.h | 464 +++ .../Ata/AtaAtapiPassThru/AtaAtapiPassThru.c | 2195 ++++++++++++++ .../Ata/AtaAtapiPassThru/AtaAtapiPassThru.h | 1000 +++++++ .../Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf | 68 + .../Bus/Ata/AtaAtapiPassThru/ComponentName.c | 251 ++ .../Bus/Ata/AtaAtapiPassThru/IdeMode.c | 2524 +++++++++++++++++ .../Bus/Ata/AtaAtapiPassThru/IdeMode.h | 293 ++ 8 files changed, 8805 insertions(+) create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c create mode 100644 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c new file mode 100644 index 0000000000..71d58f6622 --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -0,0 +1,2010 @@ +/** @file + The file for AHCI mode of ATA host controller. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "AtaAtapiPassThru.h" + +/** + Read AHCI Operation register. + + @param PciIo The PCI IO protocol instance. + @param Offset The operation register offset. + + @return The register content read. + +**/ +UINT32 +EFIAPI +AhciReadReg ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Offset + ) +{ + UINT32 Data; + + ASSERT (PciIo != NULL); + + Data = 0; + + PciIo->Mem.Read ( + PciIo, + EfiPciIoWidthUint32, + EFI_AHCI_BAR_INDEX, + (UINT64) Offset, + 1, + &Data + ); + + return Data; +} + +/** + Write AHCI Operation register. + + @param PciIo The PCI IO protocol instance. + @param Offset The operation register offset. + @param Data The data used to write down. + +**/ +VOID +EFIAPI +AhciWriteReg ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Offset, + IN UINT32 Data + ) +{ + ASSERT (PciIo != NULL); + + PciIo->Mem.Write ( + PciIo, + EfiPciIoWidthUint32, + EFI_AHCI_BAR_INDEX, + (UINT64) Offset, + 1, + &Data + ); + + return ; +} + +/** + Do AND operation with the value of AHCI Operation register. + + @param PciIo The PCI IO protocol instance. + @param Offset The operation register offset. + @param AndData The data used to do AND operation. + +**/ +VOID +EFIAPI +AhciAndReg ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Offset, + IN UINT32 AndData + ) +{ + UINT32 Data; + + ASSERT (PciIo != NULL); + + Data = AhciReadReg (PciIo, Offset); + + Data &= AndData; + + AhciWriteReg (PciIo, Offset, Data); +} + +/** + Do OR operation with the value of AHCI Operation register. + + @param PciIo The PCI IO protocol instance. + @param Offset The operation register offset. + @param OrData The data used to do OR operation. + +**/ +VOID +EFIAPI +AhciOrReg ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Offset, + IN UINT32 OrData + ) +{ + UINT32 Data; + + ASSERT (PciIo != NULL); + + Data = AhciReadReg (PciIo, Offset); + + Data |= OrData; + + AhciWriteReg (PciIo, Offset, Data); +} + +/** + Wait for memory set to the test value. + + @param PciIo The PCI IO protocol instance. + @param Offset The memory address to test. + @param MaskValue The mask value of memory. + @param TestValue The test value of memory. + @param Timeout The time out value for wait memory set. + + @retval EFI_DEVICE_ERROR The memory is not set. + @retval EFI_TIMEOUT The memory setting is time out. + @retval EFI_SUCCESS The memory is correct set. + +**/ +EFI_STATUS +EFIAPI +AhciWaitMemSet ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Offset, + IN UINT32 MaskValue, + IN UINT32 TestValue, + IN UINT64 Timeout + ) +{ + UINT32 Value; + UINT32 Delay; + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + + do { + Value = AhciReadReg (PciIo, Offset) & MaskValue; + + if (Value == TestValue) { + return EFI_SUCCESS; + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_DEVICE_ERROR; +} + +/** + Check if the device is still on port. It also checks if the AHCI controller + supports the address and data count will be transfered. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + + @retval EFI_SUCCESS The device is attached to port and the transfer data is + supported by AHCI controller. + @retval EFI_UNSUPPORTED The transfer address and count is not supported by AHCI + controller. + @retval EFI_NOT_READY The physical communication between AHCI controller and device + is not ready. + +**/ +EFI_STATUS +EFIAPI +AhciCheckDeviceStatus ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port + ) +{ + UINT32 Data; + UINT32 Offset; + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS; + + Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_SSTS_DET_MASK; + + if (Data == EFI_AHCI_PORT_SSTS_DET_PCE) { + return EFI_SUCCESS; + } + + return EFI_NOT_READY; +} + +/** + + Clear the port interrupt and error status. It will also clear + HBA interrupt status. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + +**/ +VOID +EFIAPI +AhciClearPortStatus ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port + ) +{ + UINT32 Offset; + + // + // Clear any error status + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SERR; + AhciWriteReg (PciIo, Offset, AhciReadReg (PciIo, Offset)); + + // + // Clear any port interrupt status + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS; + AhciWriteReg (PciIo, Offset, AhciReadReg (PciIo, Offset)); + + // + // Clear any HBA interrupt status + // + AhciWriteReg (PciIo, EFI_AHCI_IS_OFFSET, AhciReadReg (PciIo, EFI_AHCI_IS_OFFSET)); +} + +/** + Enable the FIS running for giving port. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param Timeout The timeout value of enabling FIS. + + @retval EFI_DEVICE_ERROR The FIS enable setting fails. + @retval EFI_TIMEOUT The FIS enable setting is time out. + @retval EFI_SUCCESS The FIS enable successfully. + +**/ +EFI_STATUS +EFIAPI +AhciEnableFisReceive ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT64 Timeout + ) +{ + UINT32 Offset; + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE); + + return AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_CMD_FR, + EFI_AHCI_PORT_CMD_FR, + Timeout + ); +} + +/** + Disable the FIS running for giving port. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param Timeout The timeout value of disabling FIS. + + @retval EFI_DEVICE_ERROR The FIS disable setting fails. + @retval EFI_TIMEOUT The FIS disable setting is time out. + @retval EFI_UNSUPPORTED The port is in running state. + @retval EFI_SUCCESS The FIS disable successfully. + +**/ +EFI_STATUS +EFIAPI +AhciDisableFisReceive ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT64 Timeout + ) +{ + UINT32 Offset; + UINT32 Data; + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + Data = AhciReadReg (PciIo, Offset); + + // + // Before disabling Fis receive, the DMA engine of the port should NOT be in running status. + // + if ((Data & (EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_CR)) != 0) { + return EFI_UNSUPPORTED; + } + + // + // Check if the Fis receive DMA engine for the port is running. + // + if ((Data & EFI_AHCI_PORT_CMD_FR) != EFI_AHCI_PORT_CMD_FR) { + return EFI_SUCCESS; + } + + AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_FRE)); + + return AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_CMD_FR, + 0, + Timeout + ); +} + + + +/** + Build the command list, command table and prepare the fis receiver. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param CommandFis The control fis will be used for the transfer. + @param CommandList The command list will be used for the transfer. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param CommandSlotNumber The command slot will be used for the transfer. + @param DataPhysicalAddr The pointer to the data buffer pci bus master address. + @param DataLength The data count to be transferred. + +**/ +VOID +EFIAPI +AhciBuildCommand ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_COMMAND_FIS *CommandFis, + IN EFI_AHCI_COMMAND_LIST *CommandList, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN UINT8 CommandSlotNumber, + IN OUT VOID *DataPhysicalAddr, + IN UINT64 DataLength + ) +{ + UINT64 BaseAddr; + UINT64 PrdtNumber; + UINT64 PrdtIndex; + UINTN RemainedData; + UINTN MemAddr; + DATA_64 Data64; + UINT32 Offset; + + // + // Filling the PRDT + // + PrdtNumber = (DataLength + EFI_AHCI_MAX_DATA_PER_PRDT - 1) / EFI_AHCI_MAX_DATA_PER_PRDT; + + // + // According to AHCI 1.3 spec, a PRDT entry can point to a maximum 4MB data block. + // It also limits that the maximum amount of the PRDT entry in the command table + // is 65535. + // + ASSERT (PrdtNumber <= 65535); + + Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFis) + sizeof (EFI_AHCI_RECEIVED_FIS) * Port; + + BaseAddr = Data64.Uint64; + + ZeroMem ((VOID *)((UINTN) BaseAddr), sizeof (EFI_AHCI_RECEIVED_FIS)); + + ZeroMem (AhciRegisters->AhciCommandTable, sizeof (EFI_AHCI_COMMAND_TABLE)); + + CommandFis->AhciCFisPmNum = PortMultiplier; + + CopyMem (&AhciRegisters->AhciCommandTable->CommandFis, CommandFis, sizeof (EFI_AHCI_COMMAND_FIS)); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + if (AtapiCommand != NULL) { + CopyMem ( + &AhciRegisters->AhciCommandTable->AtapiCmd, + AtapiCommand, + AtapiCommandLength + ); + + CommandList->AhciCmdA = 1; + CommandList->AhciCmdP = 1; + CommandList->AhciCmdC = (DataLength == 0) ? 1 : 0; + + AhciOrReg (PciIo, Offset, (EFI_AHCI_PORT_CMD_DLAE | EFI_AHCI_PORT_CMD_ATAPI)); + } else { + AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_DLAE | EFI_AHCI_PORT_CMD_ATAPI)); + } + + RemainedData = DataLength; + MemAddr = (UINTN) DataPhysicalAddr; + CommandList->AhciCmdPrdtl = (UINT32)PrdtNumber; + + for (PrdtIndex = 0; PrdtIndex < PrdtNumber; PrdtIndex++) { + if (RemainedData < EFI_AHCI_MAX_DATA_PER_PRDT) { + AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDbc = (UINT32)RemainedData - 1; + } else { + AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDbc = EFI_AHCI_MAX_DATA_PER_PRDT - 1; + } + + Data64.Uint64 = (UINT64)MemAddr; + AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDba = Data64.Uint32.Lower32; + AhciRegisters->AhciCommandTable->PrdtTable[PrdtIndex].AhciPrdtDbau = Data64.Uint32.Upper32; + RemainedData -= EFI_AHCI_MAX_DATA_PER_PRDT; + MemAddr += EFI_AHCI_MAX_DATA_PER_PRDT; + } + + // + // Set the last PRDT to Interrupt On Complete + // + if (PrdtNumber > 0) { + AhciRegisters->AhciCommandTable->PrdtTable[PrdtNumber - 1].AhciPrdtIoc = 1; + } + + CopyMem ( + (VOID *) ((UINTN) AhciRegisters->AhciCmdList + (UINTN) CommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST)), + CommandList, + sizeof (EFI_AHCI_COMMAND_LIST) + ); + + Data64.Uint64 = (UINT64)(UINTN) AhciRegisters->AhciCommandTablePciAddr; + AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdCtba = Data64.Uint32.Lower32; + AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdCtbau = Data64.Uint32.Upper32; + AhciRegisters->AhciCmdList[CommandSlotNumber].AhciCmdPmp = PortMultiplier; + +} + +/** + Buid a command FIS. + + @param CmdFis A pointer to the EFI_AHCI_COMMAND_FIS data structure. + @param AtaCommandBlock A pointer to the AhciBuildCommandFis data structure. + +**/ +VOID +EFIAPI +AhciBuildCommandFis ( + IN OUT EFI_AHCI_COMMAND_FIS *CmdFis, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock + ) +{ + ZeroMem (CmdFis, sizeof (EFI_AHCI_COMMAND_FIS)); + + CmdFis->AhciCFisType = EFI_AHCI_FIS_REGISTER_H2D; + // + // Indicator it's a command + // + CmdFis->AhciCFisCmdInd = 0x1; + CmdFis->AhciCFisCmd = AtaCommandBlock->AtaCommand; + + CmdFis->AhciCFisFeature = AtaCommandBlock->AtaFeatures; + CmdFis->AhciCFisFeatureExp = AtaCommandBlock->AtaFeaturesExp; + + CmdFis->AhciCFisSecNum = AtaCommandBlock->AtaSectorNumber; + CmdFis->AhciCFisSecNumExp = AtaCommandBlock->AtaSectorNumberExp; + + CmdFis->AhciCFisClyLow = AtaCommandBlock->AtaCylinderLow; + CmdFis->AhciCFisClyLowExp = AtaCommandBlock->AtaCylinderLowExp; + + CmdFis->AhciCFisClyHigh = AtaCommandBlock->AtaCylinderHigh; + CmdFis->AhciCFisClyHighExp = AtaCommandBlock->AtaCylinderHighExp; + + CmdFis->AhciCFisSecCount = AtaCommandBlock->AtaSectorCount; + CmdFis->AhciCFisSecCountExp = AtaCommandBlock->AtaSectorCountExp; + + CmdFis->AhciCFisDevHead = AtaCommandBlock->AtaDeviceHead | 0xE0; +} + +/** + Start a PIO data transfer on specific port. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param Read The transfer direction. + @param AtaCommandBlock The EFI_ATA_COMMAND_BLOCK data. + @param AtaStatusBlock The EFI_ATA_STATUS_BLOCK data. + @param MemoryAddr The pointer to the data buffer. + @param DataCount The data count to be transferred. + @param Timeout The timeout value of non data transfer. + + @retval EFI_DEVICE_ERROR The PIO data transfer abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for transfer. + @retval EFI_SUCCESS The PIO data transfer executes successfully. + +**/ +EFI_STATUS +AhciPioTransfer ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN BOOLEAN Read, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN OUT VOID *MemoryAddr, + IN UINT32 DataCount, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINTN FisBaseAddr; + UINT32 Offset; + UINT32 Value; + EFI_PHYSICAL_ADDRESS PhyAddr; + VOID *Map; + UINTN MapLength; + EFI_PCI_IO_PROTOCOL_OPERATION Flag; + UINT32 Delay; + EFI_AHCI_COMMAND_FIS CFis; + EFI_AHCI_COMMAND_LIST CmdList; + + if (Read) { + Flag = EfiPciIoOperationBusMasterWrite; + } else { + Flag = EfiPciIoOperationBusMasterRead; + } + + // + // construct command list and command table with pci bus address + // + MapLength = DataCount; + Status = PciIo->Map ( + PciIo, + Flag, + MemoryAddr, + &MapLength, + &PhyAddr, + &Map + ); + + if (EFI_ERROR (Status) || (DataCount != MapLength)) { + return EFI_OUT_OF_RESOURCES; + } + + // + // Package read needed + // + AhciBuildCommandFis (&CFis, AtaCommandBlock); + + ZeroMem (&CmdList, sizeof (EFI_AHCI_COMMAND_LIST)); + + CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4; + CmdList.AhciCmdW = Read ? 0 : 1; + + AhciBuildCommand ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + &CFis, + &CmdList, + AtapiCommand, + AtapiCommandLength, + 0, + (VOID *)(UINTN)PhyAddr, + DataCount + ); + + Status = AhciStartCommand ( + PciIo, + Port, + 0, + Timeout + ); + if (EFI_ERROR (Status)) { + goto Exit; + } + + // + // Checking the status and wait the driver sending data + // + FisBaseAddr = (UINTN)AhciRegisters->AhciRFis + Port * sizeof (EFI_AHCI_RECEIVED_FIS); + // + // Wait device sends the PIO setup fis before data transfer + // + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + Value = *(UINT32 *) (FisBaseAddr + EFI_AHCI_PIO_FIS_OFFSET); + + if ((Value & EFI_AHCI_FIS_TYPE_MASK) == EFI_AHCI_FIS_PIO_SETUP) { + break; + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay(100); + + Delay--; + } while (Delay > 0); + + if (Delay == 0) { + Status = EFI_TIMEOUT; + goto Exit; + } + + // + // Wait for command compelte + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI; + Status = AhciWaitMemSet ( + PciIo, + Offset, + 0xFFFFFFFF, + 0, + Timeout + ); + + if (EFI_ERROR (Status)) { + goto Exit; + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS; + Status = AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_IS_PSS, + EFI_AHCI_PORT_IS_PSS, + Timeout + ); + if (EFI_ERROR (Status)) { + goto Exit; + } + +Exit: + AhciStopCommand ( + PciIo, + Port, + Timeout + ); + + AhciDisableFisReceive ( + PciIo, + Port, + Timeout + ); + + PciIo->Unmap ( + PciIo, + Map + ); + + return Status; +} + +/** + Start a DMA data transfer on specific port + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param Read The transfer direction. + @param AtaCommandBlock The EFI_ATA_COMMAND_BLOCK data. + @param AtaStatusBlock The EFI_ATA_STATUS_BLOCK data. + @param MemoryAddr The pointer to the data buffer. + @param DataCount The data count to be transferred. + @param Timeout The timeout value of non data transfer. + + @retval EFI_DEVICE_ERROR The DMA data transfer abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for transfer. + @retval EFI_SUCCESS The DMA data transfer executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciDmaTransfer ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN BOOLEAN Read, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN OUT VOID *MemoryAddr, + IN UINTN DataCount, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINT32 Offset; + EFI_PHYSICAL_ADDRESS PhyAddr; + VOID *Map; + UINTN MapLength; + EFI_PCI_IO_PROTOCOL_OPERATION Flag; + EFI_AHCI_COMMAND_FIS CFis; + EFI_AHCI_COMMAND_LIST CmdList; + + if (Read) { + Flag = EfiPciIoOperationBusMasterWrite; + } else { + Flag = EfiPciIoOperationBusMasterRead; + } + + // + // construct command list and command table with pci bus address + // + MapLength = DataCount; + Status = PciIo->Map ( + PciIo, + Flag, + MemoryAddr, + &MapLength, + &PhyAddr, + &Map + ); + + if (EFI_ERROR (Status) || (DataCount != MapLength)) { + return EFI_OUT_OF_RESOURCES; + } + + // + // Package read needed + // + AhciBuildCommandFis (&CFis, AtaCommandBlock); + + ZeroMem (&CmdList, sizeof (EFI_AHCI_COMMAND_LIST)); + + CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4; + CmdList.AhciCmdW = Read ? 0 : 1; + + AhciBuildCommand ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + &CFis, + &CmdList, + AtapiCommand, + AtapiCommandLength, + 0, + (VOID *)(UINTN)PhyAddr, + DataCount + ); + + Status = AhciStartCommand ( + PciIo, + Port, + 0, + Timeout + ); + if (EFI_ERROR (Status)) { + goto Exit; + } + + // + // Wait device PRD processed + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS; + Status = AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_IS_DPS, + EFI_AHCI_PORT_IS_DPS, + Timeout + ); + + if (EFI_ERROR (Status)) { + goto Exit; + } + + // + // Wait for command compelte + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI; + Status = AhciWaitMemSet ( + PciIo, + Offset, + 0xFFFFFFFF, + 0, + Timeout + ); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IS; + Status = AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_IS_DHRS, + EFI_AHCI_PORT_IS_DHRS, + Timeout + ); + if (EFI_ERROR (Status)) { + goto Exit; + } + +Exit: + AhciStopCommand ( + PciIo, + Port, + Timeout + ); + + AhciDisableFisReceive ( + PciIo, + Port, + Timeout + ); + + PciIo->Unmap ( + PciIo, + Map + ); + + return Status; +} + +/** + Start a non data transfer on specific port. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param AtaCommandBlock The EFI_ATA_COMMAND_BLOCK data. + @param AtaStatusBlock The EFI_ATA_STATUS_BLOCK data. + @param Timeout The timeout value of non data transfer. + + @retval EFI_DEVICE_ERROR The non data transfer abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for transfer. + @retval EFI_SUCCESS The non data transfer executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciNonDataTransfer ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINTN FisBaseAddr; + UINT32 Offset; + UINT32 Value; + UINT32 Delay; + + EFI_AHCI_COMMAND_FIS CFis; + EFI_AHCI_COMMAND_LIST CmdList; + + // + // Package read needed + // + AhciBuildCommandFis (&CFis, AtaCommandBlock); + + ZeroMem (&CmdList, sizeof (EFI_AHCI_COMMAND_LIST)); + + CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4; + + AhciBuildCommand ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + &CFis, + &CmdList, + AtapiCommand, + AtapiCommandLength, + 0, + NULL, + 0 + ); + + Status = AhciStartCommand ( + PciIo, + Port, + 0, + Timeout + ); + if (EFI_ERROR (Status)) { + goto Exit; + } + + // + // Wait device sends the Response Fis + // + FisBaseAddr = (UINTN)AhciRegisters->AhciRFis + Port * sizeof (EFI_AHCI_RECEIVED_FIS); + // + // Wait device sends the PIO setup fis before data transfer + // + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + Value = *(UINT32 *) (FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET); + + if ((Value & EFI_AHCI_FIS_TYPE_MASK) == EFI_AHCI_FIS_REGISTER_D2H) { + break; + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay(100); + + Delay --; + } while (Delay > 0); + + if (Delay == 0) { + Status = EFI_TIMEOUT; + goto Exit; + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI; + + Status = AhciWaitMemSet ( + PciIo, + Offset, + 0xFFFFFFFF, + 0, + Timeout + ); + +Exit: + AhciStopCommand ( + PciIo, + Port, + Timeout + ); + + AhciDisableFisReceive ( + PciIo, + Port, + Timeout + ); + + return Status; +} + +/** + Stop command running for giving port + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param Timeout The timeout value of stop. + + @retval EFI_DEVICE_ERROR The command stop unsuccessfully. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_SUCCESS The command stop successfully. + +**/ +EFI_STATUS +EFIAPI +AhciStopCommand ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT64 Timeout + ) +{ + UINT32 Offset; + UINT32 Data; + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + Data = AhciReadReg (PciIo, Offset); + + if ((Data & (EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_CR)) == 0) { + return EFI_SUCCESS; + } + + if ((Data & EFI_AHCI_PORT_CMD_ST) != 0) { + AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_ST)); + } + + return AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_CMD_CR, + 0, + Timeout + ); +} + +/** + Start command for give slot on specific port. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param CommandSlot The number of CommandSlot. + @param Timeout The timeout value of start. + + @retval EFI_DEVICE_ERROR The command start unsuccessfully. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_SUCCESS The command start successfully. + +**/ +EFI_STATUS +EFIAPI +AhciStartCommand ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT8 CommandSlot, + IN UINT64 Timeout + ) +{ + UINT32 CmdSlotBit; + EFI_STATUS Status; + UINT32 PortStatus; + UINT32 StartCmd; + UINT32 PortTfd; + UINT32 Offset; + UINT32 Capability; + + // + // Collect AHCI controller information + // + Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET); + + CmdSlotBit = (UINT32) (1 << CommandSlot); + + AhciClearPortStatus ( + PciIo, + Port + ); + + Status = AhciEnableFisReceive ( + PciIo, + Port, + Timeout + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Setting the command + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SACT; + AhciAndReg (PciIo, Offset, 0); + AhciOrReg (PciIo, Offset, CmdSlotBit); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI; + AhciAndReg (PciIo, Offset, 0); + AhciOrReg (PciIo, Offset, CmdSlotBit); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + PortStatus = AhciReadReg (PciIo, Offset); + + StartCmd = 0; + if ((PortStatus & EFI_AHCI_PORT_CMD_ALPE) != 0) { + StartCmd = AhciReadReg (PciIo, Offset); + StartCmd &= ~EFI_AHCI_PORT_CMD_ICC_MASK; + StartCmd |= EFI_AHCI_PORT_CMD_ACTIVE; + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD; + PortTfd = AhciReadReg (PciIo, Offset); + + if ((PortTfd & (EFI_AHCI_PORT_TFD_BSY | EFI_AHCI_PORT_TFD_DRQ)) != 0) { + if ((Capability & BIT24) != 0) { + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_COL); + + AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_CMD_COL, + 0, + Timeout + ); + } + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_ST | StartCmd); + + return EFI_SUCCESS; +} + +/** + Do AHCI port reset. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param Timeout The timeout value of reset. + + @retval EFI_DEVICE_ERROR The port reset unsuccessfully + @retval EFI_TIMEOUT The reset operation is time out. + @retval EFI_SUCCESS The port reset successfully. + +**/ +EFI_STATUS +EFIAPI +AhciPortReset ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINT32 Offset; + + AhciClearPortStatus (PciIo, Port); + + AhciStopCommand (PciIo, Port, Timeout); + + AhciDisableFisReceive (PciIo, Port, Timeout); + + AhciEnableFisReceive (PciIo, Port, Timeout); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SCTL; + + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_SCTL_DET_INIT); + + // + // wait 5 milliseceond before de-assert DET + // + MicroSecondDelay (5000); + + AhciAndReg (PciIo, Offset, (UINT32)EFI_AHCI_PORT_SCTL_MASK); + + // + // wait 5 milliseceond before de-assert DET + // + MicroSecondDelay (5000); + + // + // Wait for communication to be re-established + // + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS; + Status = AhciWaitMemSet ( + PciIo, + Offset, + EFI_AHCI_PORT_SSTS_DET_MASK, + EFI_AHCI_PORT_SSTS_DET_PCE, + Timeout + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SERR; + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_ERR_CLEAR); + + return EFI_SUCCESS; +} + +/** + Do AHCI HBA reset. + + @param PciIo The PCI IO protocol instance. + @param Timeout The timeout value of reset. + + + @retval EFI_DEVICE_ERROR AHCI controller is failed to complete hardware reset. + @retval EFI_TIMEOUT The reset operation is time out. + @retval EFI_SUCCESS AHCI controller is reset successfully. + +**/ +EFI_STATUS +EFIAPI +AhciReset ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINT32 Delay; + UINT32 Value; + + AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE); + + AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_RESET); + + Status = EFI_TIMEOUT; + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + + do { + Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET); + + if ((Value & EFI_AHCI_GHC_RESET) == 0) { + break; + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay(100); + + Delay--; + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + Send Buffer cmd to specific device. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param Buffer The data buffer to store IDENTIFY PACKET data. + + @retval EFI_DEVICE_ERROR The cmd abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for executing. + @retval EFI_SUCCESS The cmd executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciIdentify ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN OUT EFI_IDENTIFY_DATA *Buffer + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + EFI_ATA_STATUS_BLOCK AtaStatusBlock; + + if (PciIo == NULL || AhciRegisters == NULL || Buffer == NULL) { + return EFI_INVALID_PARAMETER; + } + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + ZeroMem (&AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_IDENTIFY_DRIVE; + AtaCommandBlock.AtaSectorCount = 1; + + Status = AhciPioTransfer ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + NULL, + 0, + TRUE, + &AtaCommandBlock, + &AtaStatusBlock, + Buffer, + sizeof (EFI_IDENTIFY_DATA), + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + +/** + Send Buffer cmd to specific device. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param Buffer The data buffer to store IDENTIFY PACKET data. + + @retval EFI_DEVICE_ERROR The cmd abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for executing. + @retval EFI_SUCCESS The cmd executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciIdentifyPacket ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN OUT EFI_IDENTIFY_DATA *Buffer + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + EFI_ATA_STATUS_BLOCK AtaStatusBlock; + + if (PciIo == NULL || AhciRegisters == NULL) { + return EFI_INVALID_PARAMETER; + } + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + ZeroMem (&AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_IDENTIFY_DEVICE; + AtaCommandBlock.AtaSectorCount = 1; + + Status = AhciPioTransfer ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + NULL, + 0, + TRUE, + &AtaCommandBlock, + &AtaStatusBlock, + Buffer, + sizeof (EFI_IDENTIFY_DATA), + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + +/** + Send SET FEATURE cmd on specific device. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param Feature The data to send Feature register. + @param FeatureSpecificData The specific data for SET FEATURE cmd. + + @retval EFI_DEVICE_ERROR The cmd abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for executing. + @retval EFI_SUCCESS The cmd executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciDeviceSetFeature ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN UINT16 Feature, + IN UINT32 FeatureSpecificData + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + EFI_ATA_STATUS_BLOCK AtaStatusBlock; + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + ZeroMem (&AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_SET_FEATURES; + AtaCommandBlock.AtaFeatures = (UINT8) Feature; + AtaCommandBlock.AtaFeaturesExp = (UINT8) (Feature >> 8); + AtaCommandBlock.AtaSectorCount = (UINT8) FeatureSpecificData; + AtaCommandBlock.AtaSectorNumber = (UINT8) (FeatureSpecificData >> 8); + AtaCommandBlock.AtaCylinderLow = (UINT8) (FeatureSpecificData >> 16); + AtaCommandBlock.AtaCylinderHigh = (UINT8) (FeatureSpecificData >> 24); + + Status = AhciNonDataTransfer ( + PciIo, + AhciRegisters, + (UINT8)Port, + (UINT8)PortMultiplier, + NULL, + 0, + &AtaCommandBlock, + &AtaStatusBlock, + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + +/** + This function is used to send out ATAPI commands conforms to the Packet Command + with PIO Protocol. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The number of port multiplier. + @param Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET structure. + + @retval EFI_SUCCESS send out the ATAPI packet command successfully + and device sends data successfully. + @retval EFI_DEVICE_ERROR the device failed to send data. + +**/ +EFI_STATUS +EFIAPI +AhciPacketCommandExecute ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet + ) +{ + EFI_STATUS Status; + VOID *Buffer; + UINT32 Length; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + EFI_ATA_STATUS_BLOCK AtaStatusBlock; + BOOLEAN Read; + UINT8 Retry; + + if (Packet == NULL || Packet->Cdb == NULL) { + return EFI_INVALID_PARAMETER; + } + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + ZeroMem (&AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK)); + AtaCommandBlock.AtaCommand = ATA_CMD_PACKET; + // + // No OVL; No DMA + // + AtaCommandBlock.AtaFeatures = 0x00; + // + // set the transfersize to ATAPI_MAX_BYTE_COUNT to let the device + // determine how many data should be transferred. + // + AtaCommandBlock.AtaCylinderLow = (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff); + AtaCommandBlock.AtaCylinderHigh = (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8); + + if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) { + Buffer = Packet->InDataBuffer; + Length = Packet->InTransferLength; + Read = TRUE; + } else { + Buffer = Packet->OutDataBuffer; + Length = Packet->OutTransferLength; + Read = FALSE; + } + + if (Length == 0) { + Status = AhciNonDataTransfer ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + Packet->Cdb, + Packet->CdbLength, + &AtaCommandBlock, + &AtaStatusBlock, + Packet->Timeout + ); + } else { + // + // READ_CAPACITY cmd may execute failure. Retry 5 times + // + if (((UINT8 *)Packet->Cdb)[0] == ATA_CMD_READ_CAPACITY) { + Retry = 5; + } else { + Retry = 1; + } + do { + Status = AhciPioTransfer ( + PciIo, + AhciRegisters, + Port, + PortMultiplier, + Packet->Cdb, + Packet->CdbLength, + Read, + &AtaCommandBlock, + &AtaStatusBlock, + Buffer, + Length, + Packet->Timeout + ); + if (!EFI_ERROR (Status)) { + break; + } + Retry--; + } while (Retry != 0); + } + return Status; +} + +/** + Allocate transfer-related data struct which is used at AHCI mode. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + +**/ +EFI_STATUS +EFIAPI +AhciCreateTransferDescriptor ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN OUT EFI_AHCI_REGISTERS *AhciRegisters + ) +{ + EFI_STATUS Status; + UINTN Bytes; + VOID *Buffer; + + UINT32 Capability; + UINT8 MaxPortNumber; + UINT8 MaxCommandSlotNumber; + BOOLEAN Support64Bit; + UINT64 MaxReceiveFisSize; + UINT64 MaxCommandListSize; + UINT64 MaxCommandTableSize; + + Buffer = NULL; + // + // Collect AHCI controller information + // + Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET); + MaxPortNumber = (UINT8) ((Capability & 0x1F) + 1); + // + // Get the number of command slots per port supported by this HBA. + // + MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1); + Support64Bit = ((Capability & BIT31) != 0) ? TRUE : FALSE; + + MaxReceiveFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS); + Status = PciIo->AllocateBuffer ( + PciIo, + AllocateAnyPages, + EfiBootServicesData, + EFI_SIZE_TO_PAGES (MaxReceiveFisSize), + &Buffer, + 0 + ); + + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + + ZeroMem (Buffer, MaxReceiveFisSize); + + AhciRegisters->AhciRFis = Buffer; + AhciRegisters->MaxReceiveFisSize = MaxReceiveFisSize; + Bytes = MaxReceiveFisSize; + + Status = PciIo->Map ( + PciIo, + EfiPciIoOperationBusMasterCommonBuffer, + Buffer, + &Bytes, + &(EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciRFisPciAddr, + &AhciRegisters->MapRFis + ); + + if (EFI_ERROR (Status) || (Bytes != MaxReceiveFisSize)) { + // + // Map error or unable to map the whole RFis buffer into a contiguous region. + // + Status = EFI_OUT_OF_RESOURCES; + goto Error6; + } + + if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciRFisPciAddr > 0x100000000UL)) { + // + // The AHCI HBA doesn't support 64bit addressing, so should not get a >4G pci bus master address. + // + Status = EFI_DEVICE_ERROR; + goto Error5; + } + + // + // Allocate memory for command list + // Note that the implemenation is a single task model which only use a command list for all ports. + // + Buffer = NULL; + MaxCommandListSize = MaxCommandSlotNumber * sizeof (EFI_AHCI_COMMAND_LIST); + Status = PciIo->AllocateBuffer ( + PciIo, + AllocateAnyPages, + EfiBootServicesData, + EFI_SIZE_TO_PAGES (MaxCommandListSize), + &Buffer, + 0 + ); + + if (EFI_ERROR (Status)) { + // + // Free mapped resource. + // + Status = EFI_OUT_OF_RESOURCES; + goto Error5; + } + + ZeroMem (Buffer, MaxCommandListSize); + + AhciRegisters->AhciCmdList = Buffer; + AhciRegisters->MaxCommandListSize = MaxCommandListSize; + Bytes = MaxCommandListSize; + + Status = PciIo->Map ( + PciIo, + EfiPciIoOperationBusMasterCommonBuffer, + Buffer, + &Bytes, + &(EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCmdListPciAddr, + &AhciRegisters->MapCmdList + ); + + if (EFI_ERROR (Status) || (Bytes != MaxCommandListSize)) { + // + // Map error or unable to map the whole cmd list buffer into a contiguous region. + // + Status = EFI_OUT_OF_RESOURCES; + goto Error4; + } + + if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCmdListPciAddr > 0x100000000UL)) { + // + // The AHCI HBA doesn't support 64bit addressing, so should not get a >4G pci bus master address. + // + Status = EFI_DEVICE_ERROR; + goto Error3; + } + + // + // Allocate memory for command table + // According to AHCI 1.3 spec, a PRD table can contain maximum 65535 entries. + // + Buffer = NULL; + MaxCommandTableSize = sizeof (EFI_AHCI_COMMAND_TABLE); + + Status = PciIo->AllocateBuffer ( + PciIo, + AllocateAnyPages, + EfiBootServicesData, + EFI_SIZE_TO_PAGES (MaxCommandTableSize), + &Buffer, + 0 + ); + + if (EFI_ERROR (Status)) { + // + // Free mapped resource. + // + Status = EFI_OUT_OF_RESOURCES; + goto Error3; + } + + ZeroMem (Buffer, MaxCommandTableSize); + + AhciRegisters->AhciCommandTable = Buffer; + AhciRegisters->MaxCommandTableSize = MaxCommandTableSize; + Bytes = MaxCommandTableSize; + + Status = PciIo->Map ( + PciIo, + EfiPciIoOperationBusMasterCommonBuffer, + Buffer, + &Bytes, + &(EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCommandTablePciAddr, + &AhciRegisters->MapCommandTable + ); + + if (EFI_ERROR (Status) || (Bytes != MaxCommandTableSize)) { + // + // Map error or unable to map the whole cmd list buffer into a contiguous region. + // + Status = EFI_OUT_OF_RESOURCES; + goto Error2; + } + + if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCommandTablePciAddr > 0x100000000UL)) { + // + // The AHCI HBA doesn't support 64bit addressing, so should not get a >4G pci bus master address. + // + Status = EFI_DEVICE_ERROR; + goto Error1; + } + + return EFI_SUCCESS; + // + // Map error or unable to map the whole CmdList buffer into a contiguous region. + // +Error1: + PciIo->Unmap ( + PciIo, + AhciRegisters->MapCommandTable + ); +Error2: + PciIo->FreeBuffer ( + PciIo, + EFI_SIZE_TO_PAGES (MaxCommandTableSize), + AhciRegisters->AhciCommandTable + ); +Error3: + PciIo->Unmap ( + PciIo, + AhciRegisters->MapCmdList + ); +Error4: + PciIo->FreeBuffer ( + PciIo, + EFI_SIZE_TO_PAGES (MaxCommandListSize), + AhciRegisters->AhciCmdList + ); +Error5: + PciIo->Unmap ( + PciIo, + AhciRegisters->MapRFis + ); +Error6: + PciIo->FreeBuffer ( + PciIo, + EFI_SIZE_TO_PAGES (MaxReceiveFisSize), + AhciRegisters->AhciRFis + ); + + return Status; +} + +/** + Initialize ATA host controller at AHCI mode. + + The function is designed to initialize ATA host controller. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + +**/ +EFI_STATUS +EFIAPI +AhciModeInitialization ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit; + UINT32 Capability; + UINT8 MaxPortNumber; + UINT32 PortImplementBitMap; + UINT8 MaxCommandSlotNumber; + BOOLEAN Support64Bit; + + EFI_AHCI_REGISTERS *AhciRegisters; + + UINT8 Port; + DATA_64 Data64; + UINT32 Offset; + UINT32 Data; + EFI_IDENTIFY_DATA Buffer; + EFI_ATA_DEVICE_TYPE DeviceType; + EFI_ATA_COLLECTIVE_MODE *SupportedModes; + EFI_ATA_TRANSFER_MODE TransferMode; + + if (Instance == NULL) { + return EFI_INVALID_PARAMETER; + } + + PciIo = Instance->PciIo; + IdeInit = Instance->IdeControllerInit; + + Status = AhciReset (PciIo, ATA_ATAPI_TIMEOUT); + + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + // + // Enable AE before accessing any AHCI registers + // + AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE); + + // + // Collect AHCI controller information + // + Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET); + + // + // Get the number of command slots per port supported by this HBA. + // + MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1); + Support64Bit = ((Capability & BIT31) != 0) ? TRUE : FALSE; + + // + // Get the bit map of those ports exposed by this HBA. + // It indicates which ports that the HBA supports are available for software to use. + // + PortImplementBitMap = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET); + MaxPortNumber = (UINT8) ((Capability & 0x1F) + 1); + + AhciRegisters = &Instance->AhciRegisters; + Status = AhciCreateTransferDescriptor (PciIo, AhciRegisters); + + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + + for (Port = 0; Port < MaxPortNumber; Port ++) { + Data64.Uint64 = (UINTN) (AhciRegisters->AhciRFisPciAddr) + sizeof (EFI_AHCI_RECEIVED_FIS) * Port; + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_FB; + AhciWriteReg (PciIo, Offset, Data64.Uint32.Lower32); + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_FBU; + AhciWriteReg (PciIo, Offset, Data64.Uint32.Upper32); + + // + // Single task envrionment, we only use one command table for all port + // + Data64.Uint64 = (UINTN) (AhciRegisters->AhciCmdListPciAddr); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CLB; + AhciWriteReg (PciIo, Offset, Data64.Uint32.Lower32); + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CLBU; + AhciWriteReg (PciIo, Offset, Data64.Uint32.Upper32); + + if ((PortImplementBitMap & (BIT0 << Port)) != 0) { + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; + + if ((Capability & EFI_AHCI_PORT_CMD_ASP) != 0) { + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_SUD); + } + Data = AhciReadReg (PciIo, Offset); + if ((Data & EFI_AHCI_PORT_CMD_CPD) != 0) { + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_POD); + } + + AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_CMD_FRE|EFI_AHCI_PORT_CMD_COL|EFI_AHCI_PORT_CMD_ST)); + } + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SCTL; + AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_SCTL_IPM_MASK)); + + AhciAndReg (PciIo, Offset,(UINT32) ~(EFI_AHCI_PORT_SCTL_IPM_PSD)); + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_SCTL_IPM_PSD); + + AhciAndReg (PciIo, Offset, (UINT32)~(EFI_AHCI_PORT_SCTL_IPM_SSD)); + AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_SCTL_IPM_SSD); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_IE; + AhciAndReg (PciIo, Offset, 0); + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SERR; + AhciWriteReg (PciIo, Offset, AhciReadReg (PciIo, Offset)); + } + + // + // Stall for 100 milliseconds. + // + MicroSecondDelay(100000); + + IdeInit->NotifyPhase (IdeInit, EfiIdeBeforeChannelEnumeration, Port); + + for (Port = 0; Port < MaxPortNumber; Port ++) { + if ((PortImplementBitMap & (BIT0 << Port)) != 0) { + + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS; + Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_SSTS_DET_MASK; + + if (Data == 0) { + continue; + } + // + // Found device in the port + // + if (Data == EFI_AHCI_PORT_SSTS_DET_PCE) { + Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SIG; + + Status = AhciWaitMemSet ( + PciIo, + Offset, + 0x0000FFFF, + 0x00000101, + ATA_ATAPI_TIMEOUT + ); + if (EFI_ERROR (Status)) { + continue; + } + + // + // Now inform the IDE Controller Init Module. + // + IdeInit->NotifyPhase (IdeInit, EfiIdeBusBeforeDevicePresenceDetection, Port); + + Data = AhciReadReg (PciIo, Offset); + + if ((Data & EFI_AHCI_ATAPI_SIG_MASK) == EFI_AHCI_ATAPI_DEVICE_SIG) { + Status = AhciIdentifyPacket (PciIo, AhciRegisters, Port, 0, &Buffer); + + if (EFI_ERROR (Status)) { + continue; + } + + DeviceType = EfiIdeCdrom; + } else if ((Data & EFI_AHCI_ATAPI_SIG_MASK) == EFI_AHCI_ATA_DEVICE_SIG) { + Status = AhciIdentify (PciIo, AhciRegisters, Port, 0, &Buffer); + + if (EFI_ERROR (Status)) { + continue; + } + + DeviceType = EfiIdeHarddisk; + } else { + continue; + } + + DEBUG ((EFI_D_INFO, "port [%d] port mulitplier [%d] has a [%a]\n", + Port, 0, DeviceType == EfiIdeCdrom ? "cdrom" : "harddisk")); + + // + // Submit identify data to IDE controller init driver + // + IdeInit->SubmitData (IdeInit, Port, 0, &Buffer); + + // + // Now start to config ide device parameter and transfer mode. + // + Status = IdeInit->CalculateMode ( + IdeInit, + Port, + 0, + &SupportedModes + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Calculate Mode Fail, Status = %r\n", Status)); + continue; + } + + // + // Set best supported PIO mode on this IDE device + // + if (SupportedModes->PioMode.Mode <= EfiAtaPioMode2) { + TransferMode.ModeCategory = EFI_ATA_MODE_DEFAULT_PIO; + } else { + TransferMode.ModeCategory = EFI_ATA_MODE_FLOW_PIO; + } + + TransferMode.ModeNumber = (UINT8) (SupportedModes->PioMode.Mode); + + // + // Set supported DMA mode on this IDE device. Note that UDMA & MDMA cann't + // be set together. Only one DMA mode can be set to a device. If setting + // DMA mode operation fails, we can continue moving on because we only use + // PIO mode at boot time. DMA modes are used by certain kind of OS booting + // + if (SupportedModes->UdmaMode.Valid) { + TransferMode.ModeCategory = EFI_ATA_MODE_UDMA; + TransferMode.ModeNumber = (UINT8) (SupportedModes->UdmaMode.Mode); + } else if (SupportedModes->MultiWordDmaMode.Valid) { + TransferMode.ModeCategory = EFI_ATA_MODE_MDMA; + TransferMode.ModeNumber = (UINT8) SupportedModes->MultiWordDmaMode.Mode; + } + + Status = AhciDeviceSetFeature (PciIo, AhciRegisters, Port, 0, 0x03, (UINT32)(*(UINT8 *)&TransferMode)); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Set transfer Mode Fail, Status = %r\n", Status)); + continue; + } + // + // Found a ATA or ATAPI device, add it into the device list. + // + CreateNewDeviceInfo (Instance, Port, 0, DeviceType, &Buffer); + } + } + } + return EFI_SUCCESS; +} + + + diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h new file mode 100644 index 0000000000..668e9921b2 --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h @@ -0,0 +1,464 @@ +/** @file + Header file for AHCI mode of ATA host controller. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ +#ifndef __ATA_HC_AHCI_MODE_H__ +#define __ATA_HC_AHCI_MODE_H__ + +#define EFI_AHCI_BAR_INDEX 0x05 + +#define EFI_AHCI_CAPABILITY_OFFSET 0x0000 +#define EFI_AHCI_GHC_OFFSET 0x0004 +#define EFI_AHCI_GHC_RESET BIT0 +#define EFI_AHCI_GHC_IE BIT1 +#define EFI_AHCI_GHC_ENABLE BIT31 +#define EFI_AHCI_IS_OFFSET 0x0008 +#define EFI_AHCI_PI_OFFSET 0x000C + +typedef struct { + UINT32 Lower32; + UINT32 Upper32; +} DATA_32; + +typedef union { + DATA_32 Uint32; + UINT64 Uint64; +} DATA_64; + +#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000 +#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000 +#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000 +#define EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000 + +// +// Each PRDT entry can point to a memory block up to 4M byte +// +#define EFI_AHCI_MAX_DATA_PER_PRDT 0x400000 + +#define EFI_AHCI_FIS_REGISTER_H2D 0x27 //Register FIS - Host to Device +#define EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20 +#define EFI_AHCI_FIS_REGISTER_D2H 0x34 //Register FIS - Device to Host +#define EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20 +#define EFI_AHCI_FIS_DMA_ACTIVATE 0x39 //DMA Activate FIS - Device to Host +#define EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4 +#define EFI_AHCI_FIS_DMA_SETUP 0x41 //DMA Setup FIS - Bi-directional +#define EFI_AHCI_FIS_DMA_SETUP_LENGTH 28 +#define EFI_AHCI_FIS_DATA 0x46 //Data FIS - Bi-directional +#define EFI_AHCI_FIS_BIST 0x58 //BIST Activate FIS - Bi-directional +#define EFI_AHCI_FIS_BIST_LENGTH 12 +#define EFI_AHCI_FIS_PIO_SETUP 0x5F //PIO Setup FIS - Device to Host +#define EFI_AHCI_FIS_PIO_SETUP_LENGTH 20 +#define EFI_AHCI_FIS_SET_DEVICE 0xA1 //Set Device Bits FIS - Device to Host +#define EFI_AHCI_FIS_SET_DEVICE_LENGTH 8 + +#define EFI_AHCI_D2H_FIS_OFFSET 0x40 +#define EFI_AHCI_DMA_FIS_OFFSET 0x00 +#define EFI_AHCI_PIO_FIS_OFFSET 0x20 +#define EFI_AHCI_SDB_FIS_OFFSET 0x58 +#define EFI_AHCI_FIS_TYPE_MASK 0xFF +#define EFI_AHCI_U_FIS_OFFSET 0x60 + +// +// Port register +// +#define EFI_AHCI_PORT_START 0x0100 +#define EFI_AHCI_PORT_REG_WIDTH 0x0080 +#define EFI_AHCI_PORT_CLB 0x0000 +#define EFI_AHCI_PORT_CLBU 0x0004 +#define EFI_AHCI_PORT_FB 0x0008 +#define EFI_AHCI_PORT_FBU 0x000C +#define EFI_AHCI_PORT_IS 0x0010 +#define EFI_AHCI_PORT_IS_DHRS BIT0 +#define EFI_AHCI_PORT_IS_PSS BIT1 +#define EFI_AHCI_PORT_IS_SSS BIT2 +#define EFI_AHCI_PORT_IS_SDBS BIT3 +#define EFI_AHCI_PORT_IS_UFS BIT4 +#define EFI_AHCI_PORT_IS_DPS BIT5 +#define EFI_AHCI_PORT_IS_PCS BIT6 +#define EFI_AHCI_PORT_IS_DIS BIT7 +#define EFI_AHCI_PORT_IS_PRCS BIT22 +#define EFI_AHCI_PORT_IS_IPMS BIT23 +#define EFI_AHCI_PORT_IS_OFS BIT24 +#define EFI_AHCI_PORT_IS_INFS BIT26 +#define EFI_AHCI_PORT_IS_IFS BIT27 +#define EFI_AHCI_PORT_IS_HBDS BIT28 +#define EFI_AHCI_PORT_IS_HBFS BIT29 +#define EFI_AHCI_PORT_IS_TFES BIT30 +#define EFI_AHCI_PORT_IS_CPDS BIT31 +#define EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF +#define EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F + +#define EFI_AHCI_PORT_IE 0x0014 +#define EFI_AHCI_PORT_CMD 0x0018 +#define EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE +#define EFI_AHCI_PORT_CMD_ST BIT0 +#define EFI_AHCI_PORT_CMD_SUD BIT1 +#define EFI_AHCI_PORT_CMD_POD BIT2 +#define EFI_AHCI_PORT_CMD_COL BIT3 +#define EFI_AHCI_PORT_CMD_CR BIT15 +#define EFI_AHCI_PORT_CMD_FRE BIT4 +#define EFI_AHCI_PORT_CMD_FR BIT14 +#define EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_FRE | EFI_AHCI_PORT_CMD_COL) +#define EFI_AHCI_PORT_CMD_PMA BIT17 +#define EFI_AHCI_PORT_CMD_HPCP BIT18 +#define EFI_AHCI_PORT_CMD_MPSP BIT19 +#define EFI_AHCI_PORT_CMD_CPD BIT20 +#define EFI_AHCI_PORT_CMD_ESP BIT21 +#define EFI_AHCI_PORT_CMD_ATAPI BIT24 +#define EFI_AHCI_PORT_CMD_DLAE BIT25 +#define EFI_AHCI_PORT_CMD_ALPE BIT26 +#define EFI_AHCI_PORT_CMD_ASP BIT27 +#define EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31) +#define EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 ) +#define EFI_AHCI_PORT_TFD 0x0020 +#define EFI_AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0) +#define EFI_AHCI_PORT_TFD_BSY BIT7 +#define EFI_AHCI_PORT_TFD_DRQ BIT3 +#define EFI_AHCI_PORT_TFD_ERR BIT0 +#define EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00 +#define EFI_AHCI_PORT_SIG 0x0024 +#define EFI_AHCI_PORT_SSTS 0x0028 +#define EFI_AHCI_PORT_SSTS_DET_MASK 0x000F +#define EFI_AHCI_PORT_SSTS_DET 0x0001 +#define EFI_AHCI_PORT_SSTS_DET_PCE 0x0003 +#define EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0 +#define EFI_AHCI_PORT_SCTL 0x002C +#define EFI_AHCI_PORT_SCTL_DET_MASK 0x000F +#define EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK) +#define EFI_AHCI_PORT_SCTL_DET_INIT 0x0001 +#define EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003 +#define EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0 +#define EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00 +#define EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300 +#define EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100 +#define EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200 +#define EFI_AHCI_PORT_SERR 0x0030 +#define EFI_AHCI_PORT_SERR_RDIE BIT0 +#define EFI_AHCI_PORT_SERR_RCE BIT1 +#define EFI_AHCI_PORT_SERR_TDIE BIT8 +#define EFI_AHCI_PORT_SERR_PCDIE BIT9 +#define EFI_AHCI_PORT_SERR_PE BIT10 +#define EFI_AHCI_PORT_SERR_IE BIT11 +#define EFI_AHCI_PORT_SERR_PRC BIT16 +#define EFI_AHCI_PORT_SERR_PIE BIT17 +#define EFI_AHCI_PORT_SERR_CW BIT18 +#define EFI_AHCI_PORT_SERR_BDE BIT19 +#define EFI_AHCI_PORT_SERR_DE BIT20 +#define EFI_AHCI_PORT_SERR_CRCE BIT21 +#define EFI_AHCI_PORT_SERR_HE BIT22 +#define EFI_AHCI_PORT_SERR_LSE BIT23 +#define EFI_AHCI_PORT_SERR_TSTE BIT24 +#define EFI_AHCI_PORT_SERR_UFT BIT25 +#define EFI_AHCI_PORT_SERR_EX BIT26 +#define EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF +#define EFI_AHCI_PORT_SACT 0x0034 +#define EFI_AHCI_PORT_CI 0x0038 +#define EFI_AHCI_PORT_SNTF 0x003C + + +#pragma pack(1) +// +// Command List structure includes total 32 entries. +// The entry data structure is listed at the following. +// +typedef struct { + UINT32 AhciCmdCfl:5; //Command FIS Length + UINT32 AhciCmdA:1; //ATAPI + UINT32 AhciCmdW:1; //Write + UINT32 AhciCmdP:1; //Prefetchable + UINT32 AhciCmdR:1; //Reset + UINT32 AhciCmdB:1; //BIST + UINT32 AhciCmdC:1; //Clear Busy upon R_OK + UINT32 AhciCmdRsvd:1; + UINT32 AhciCmdPmp:4; //Port Multiplier Port + UINT32 AhciCmdPrdtl:16; //Physical Region Descriptor Table Length + UINT32 AhciCmdPrdbc; //Physical Region Descriptor Byte Count + UINT32 AhciCmdCtba; //Command Table Descriptor Base Address + UINT32 AhciCmdCtbau; //Command Table Descriptor Base Address Upper 32-BITs + UINT32 AhciCmdRsvd1[4]; +} EFI_AHCI_COMMAND_LIST; + +// +// This is a software constructed FIS. +// For data transfer operations, this is the H2D Register FIS format as +// specified in the Serial ATA Revision 2.6 specification. +// +typedef struct { + UINT8 AhciCFisType; + UINT8 AhciCFisPmNum:4; + UINT8 AhciCFisRsvd:1; + UINT8 AhciCFisRsvd1:1; + UINT8 AhciCFisRsvd2:1; + UINT8 AhciCFisCmdInd:1; + UINT8 AhciCFisCmd; + UINT8 AhciCFisFeature; + UINT8 AhciCFisSecNum; + UINT8 AhciCFisClyLow; + UINT8 AhciCFisClyHigh; + UINT8 AhciCFisDevHead; + UINT8 AhciCFisSecNumExp; + UINT8 AhciCFisClyLowExp; + UINT8 AhciCFisClyHighExp; + UINT8 AhciCFisFeatureExp; + UINT8 AhciCFisSecCount; + UINT8 AhciCFisSecCountExp; + UINT8 AhciCFisRsvd3; + UINT8 AhciCFisControl; + UINT8 AhciCFisRsvd4[4]; + UINT8 AhciCFisRsvd5[44]; +} EFI_AHCI_COMMAND_FIS; + +// +// ACMD: ATAPI command (12 or 16 bytes) +// +typedef struct { + UINT8 AtapiCmd[0x10]; +} EFI_AHCI_ATAPI_COMMAND; + +// +// Physical Region Descriptor Table includes up to 65535 entries +// The entry data structure is listed at the following. +// the actual entry number comes from the PRDTL field in the command +// list entry for this command slot. +// +typedef struct { + UINT32 AhciPrdtDba; //Data Base Address + UINT32 AhciPrdtDbau; //Data Base Address Upper 32-BITs + UINT32 AhciPrdtRsvd; + UINT32 AhciPrdtDbc:22; //Data Byte Count + UINT32 AhciPrdtRsvd1:9; + UINT32 AhciPrdtIoc:1; //Interrupt on Completion +} EFI_AHCI_COMMAND_PRDT; + +// +// Command table data strucute which is pointed to by the entry in the command list +// +typedef struct { + EFI_AHCI_COMMAND_FIS CommandFis; // A software constructed FIS. + EFI_AHCI_ATAPI_COMMAND AtapiCmd; // 12 or 16 bytes ATAPI cmd. + UINT8 Reserved[0x30]; + EFI_AHCI_COMMAND_PRDT PrdtTable[65535]; // The scatter/gather list for data transfer +} EFI_AHCI_COMMAND_TABLE; + +// +// Received FIS structure +// +typedef struct { + UINT8 AhciDmaSetupFis[0x1C]; // Dma Setup Fis: offset 0x00 + UINT8 AhciDmaSetupFisRsvd[0x04]; + UINT8 AhciPioSetupFis[0x14]; // Pio Setup Fis: offset 0x20 + UINT8 AhciPioSetupFisRsvd[0x0C]; + UINT8 AhciD2HRegisterFis[0x14]; // D2H Register Fis: offset 0x40 + UINT8 AhciD2HRegisterFisRsvd[0x04]; + UINT64 AhciSetDeviceBitsFis; // Set Device Bits Fix: offset 0x58 + UINT8 AhciUnknownFis[0x40]; // Unkonwn Fis: offset 0x60 + UINT8 AhciUnknownFisRsvd[0x60]; +} EFI_AHCI_RECEIVED_FIS; + +#pragma pack() + +typedef struct { + EFI_AHCI_RECEIVED_FIS *AhciRFis; + EFI_AHCI_COMMAND_LIST *AhciCmdList; + EFI_AHCI_COMMAND_TABLE *AhciCommandTable; + EFI_AHCI_RECEIVED_FIS *AhciRFisPciAddr; + EFI_AHCI_COMMAND_LIST *AhciCmdListPciAddr; + EFI_AHCI_COMMAND_TABLE *AhciCommandTablePciAddr; + UINT64 MaxCommandListSize; + UINT64 MaxCommandTableSize; + UINT64 MaxReceiveFisSize; + VOID *MapRFis; + VOID *MapCmdList; + VOID *MapCommandTable; +} EFI_AHCI_REGISTERS; + +/** + This function is used to send out ATAPI commands conforms to the Packet Command + with PIO Protocol. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The number of port multiplier. + @param Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET structure. + + @retval EFI_SUCCESS send out the ATAPI packet command successfully + and device sends data successfully. + @retval EFI_DEVICE_ERROR the device failed to send data. + +**/ +EFI_STATUS +EFIAPI +AhciPacketCommandExecute ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet + ); + +/** + Start command for give slot on specific port. + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param CommandSlot The number of CommandSlot. + @param Timeout The timeout value of start. + + @retval EFI_DEVICE_ERROR The command start unsuccessfully. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_SUCCESS The command start successfully. + +**/ +EFI_STATUS +EFIAPI +AhciStartCommand ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT8 CommandSlot, + IN UINT64 Timeout + ); + +/** + Stop command running for giving port + + @param PciIo The PCI IO protocol instance. + @param Port The number of port. + @param Timeout The timeout value of stop. + + @retval EFI_DEVICE_ERROR The command stop unsuccessfully. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_SUCCESS The command stop successfully. + +**/ +EFI_STATUS +EFIAPI +AhciStopCommand ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT8 Port, + IN UINT64 Timeout + ); + +/** + Start a non data transfer on specific port. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param AtaCommandBlock The EFI_ATA_COMMAND_BLOCK data. + @param AtaStatusBlock The EFI_ATA_STATUS_BLOCK data. + @param Timeout The timeout value of non data transfer. + + @retval EFI_DEVICE_ERROR The non data transfer abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for transfer. + @retval EFI_SUCCESS The non data transfer executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciNonDataTransfer ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ); + +/** + Start a DMA data transfer on specific port + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param Read The transfer direction. + @param AtaCommandBlock The EFI_ATA_COMMAND_BLOCK data. + @param AtaStatusBlock The EFI_ATA_STATUS_BLOCK data. + @param MemoryAddr The pointer to the data buffer. + @param DataCount The data count to be transferred. + @param Timeout The timeout value of non data transfer. + + @retval EFI_DEVICE_ERROR The DMA data transfer abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for transfer. + @retval EFI_SUCCESS The DMA data transfer executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciDmaTransfer ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN BOOLEAN Read, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN OUT VOID *MemoryAddr, + IN UINTN DataCount, + IN UINT64 Timeout + ); + +/** + Start a PIO data transfer on specific port. + + @param PciIo The PCI IO protocol instance. + @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS. + @param Port The number of port. + @param PortMultiplier The timeout value of stop. + @param AtapiCommand The atapi command will be used for the transfer. + @param AtapiCommandLength The length of the atapi command. + @param Read The transfer direction. + @param AtaCommandBlock The EFI_ATA_COMMAND_BLOCK data. + @param AtaStatusBlock The EFI_ATA_STATUS_BLOCK data. + @param MemoryAddr The pointer to the data buffer. + @param DataCount The data count to be transferred. + @param Timeout The timeout value of non data transfer. + + @retval EFI_DEVICE_ERROR The PIO data transfer abort with error occurs. + @retval EFI_TIMEOUT The operation is time out. + @retval EFI_UNSUPPORTED The device is not ready for transfer. + @retval EFI_SUCCESS The PIO data transfer executes successfully. + +**/ +EFI_STATUS +EFIAPI +AhciPioTransfer ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_AHCI_REGISTERS *AhciRegisters, + IN UINT8 Port, + IN UINT8 PortMultiplier, + IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL, + IN UINT8 AtapiCommandLength, + IN BOOLEAN Read, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN OUT VOID *MemoryAddr, + IN UINT32 DataCount, + IN UINT64 Timeout + ); + + +#endif + diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c new file mode 100644 index 0000000000..f90846ad15 --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c @@ -0,0 +1,2195 @@ +/** @file + This file implements ATA_PASSTHRU_PROCTOCOL and EXT_SCSI_PASSTHRU_PROTOCOL interfaces + for managed ATA controllers. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "AtaAtapiPassThru.h" + +// +// EFI_DRIVER_BINDING_PROTOCOL instance +// +EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding = { + AtaAtapiPassThruSupported, + AtaAtapiPassThruStart, + AtaAtapiPassThruStop, + 0x10, + NULL, + NULL +}; + +ATA_ATAPI_PASS_THRU_INSTANCE gAtaAtapiPassThruInstanceTemplate = { + ATA_ATAPI_PASS_THRU_SIGNATURE, + 0, // Controller Handle + NULL, // PciIo Protocol + NULL, // IdeControllerInit Protocol + { // AtaPassThruMode + // + // According to UEFI2.3 spec Section 12.10, Drivers for non-RAID ATA controllers should set + // both EFI_ATA_PASS_THRU_ATTRIBUTES_PHYSICAL and EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL + // bits. + // Note that the driver doesn't support AtaPassThru non blocking I/O. + // + EFI_ATA_PASS_THRU_ATTRIBUTES_PHYSICAL | EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL, + // + // IoAlign + // + sizeof (UINTN) + }, + { // AtaPassThru + NULL, + AtaPassThruPassThru, + AtaPassThruGetNextPort, + AtaPassThruGetNextDevice, + AtaPassThruBuildDevicePath, + AtaPassThruGetDevice, + AtaPassThruResetPort, + AtaPassThruResetDevice + }, + { // ExtScsiPassThruMode + // + // AdapterId + // + 0, + // + // According to UEFI2.3 spec Section 14.7, Drivers for non-RAID SCSI controllers should set + // both EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL and EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL + // bits. + // Note that the driver doesn't support ExtScsiPassThru non blocking I/O. + // + EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL | EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL, + // + // IoAlign + // + sizeof (UINTN) + }, + { // ExtScsiPassThru + NULL, + ExtScsiPassThruPassThru, + ExtScsiPassThruGetNextTargetLun, + ExtScsiPassThruBuildDevicePath, + ExtScsiPassThruGetTargetLun, + ExtScsiPassThruResetChannel, + ExtScsiPassThruResetTargetLun, + ExtScsiPassThruGetNextTarget + }, + EfiAtaUnknownMode, // Work Mode + { // IdeRegisters + {0}, + {0} + }, + { // AhciRegisters + 0 + }, + { // DeviceList + NULL, + NULL + }, + 0, // OriginalAttributes + 0, // PreviousPort + 0, // PreviousPortMultiplier + 0, // PreviousTargetId + 0 // PreviousLun +}; + +ATAPI_DEVICE_PATH mAtapiDevicePathTemplate = { + { + MESSAGING_DEVICE_PATH, + MSG_ATAPI_DP, + (UINT8) (sizeof (ATAPI_DEVICE_PATH)), + (UINT8) ((sizeof (ATAPI_DEVICE_PATH)) >> 8), + }, + 0, + 0, + 0 +}; + +SATA_DEVICE_PATH mSataDevicePathTemplate = { + { + MESSAGING_DEVICE_PATH, + MSG_SATA_DP, + (UINT8) (sizeof (SATA_DEVICE_PATH)), + (UINT8) ((sizeof (SATA_DEVICE_PATH)) >> 8), + }, + 0, + 0, + 0 +}; + +UINT8 mScsiId[TARGET_MAX_BYTES] = { + 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF +}; + +/** + The Entry Point of module. + + @param[in] ImageHandle The firmware allocated handle for the EFI image. + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The entry point is executed successfully. + @retval other Some error occurs when executing this entry point. + +**/ +EFI_STATUS +EFIAPI +InitializeAtaAtapiPassThru ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + // + // Install driver model protocol(s). + // + Status = EfiLibInstallDriverBindingComponentName2 ( + ImageHandle, + SystemTable, + &gAtaAtapiPassThruDriverBinding, + ImageHandle, + &gAtaAtapiPassThruComponentName, + &gAtaAtapiPassThruComponentName2 + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} + +/** + Tests to see if this driver supports a given controller. If a child device is provided, + it further tests to see if this driver supports creating a handle for the specified child device. + + This function checks to see if the driver specified by This supports the device specified by + ControllerHandle. Drivers will typically use the device path attached to + ControllerHandle and/or the services from the bus I/O abstraction attached to + ControllerHandle to determine if the driver supports ControllerHandle. This function + may be called many times during platform initialization. In order to reduce boot times, the tests + performed by this function must be very small, and take as little time as possible to execute. This + function must not change the state of any hardware devices, and this function must be aware that the + device specified by ControllerHandle may already be managed by the same driver or a + different driver. This function must match its calls to AllocatePages() with FreePages(), + AllocatePool() with FreePool(), and OpenProtocol() with CloseProtocol(). + Because ControllerHandle may have been previously started by the same driver, if a protocol is + already in the opened state, then it must not be closed with CloseProtocol(). This is required + to guarantee the state of ControllerHandle is not modified by this function. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle The handle of the controller to test. This handle + must support a protocol interface that supplies + an I/O abstraction to the driver. + @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This + parameter is ignored by device drivers, and is optional for bus + drivers. For bus drivers, if this parameter is not NULL, then + the bus driver must determine if the bus controller specified + by ControllerHandle and the child controller specified + by RemainingDevicePath are both supported by this + bus driver. + + @retval EFI_SUCCESS The device specified by ControllerHandle and + RemainingDevicePath is supported by the driver specified by This. + @retval EFI_ALREADY_STARTED The device specified by ControllerHandle and + RemainingDevicePath is already being managed by the driver + specified by This. + @retval EFI_ACCESS_DENIED The device specified by ControllerHandle and + RemainingDevicePath is already being managed by a different + driver or an application that requires exclusive access. + Currently not implemented. + @retval EFI_UNSUPPORTED The device specified by ControllerHandle and + RemainingDevicePath is not supported by the driver specified by This. +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + EFI_PCI_IO_PROTOCOL *PciIo; + PCI_TYPE00 PciData; + EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit; + + // + // SATA Controller is a device driver, and should ingore the + // "RemainingDevicePath" according to UEFI spec + // + Status = gBS->OpenProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + (VOID *) &ParentDevicePath, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (EFI_ERROR (Status)) { + // + // EFI_ALREADY_STARTED is also an error + // + return Status; + } + // + // Close the protocol because we don't use it here + // + gBS->CloseProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + Status = gBS->OpenProtocol ( + Controller, + &gEfiIdeControllerInitProtocolGuid, + (VOID **) &IdeControllerInit, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + + if (EFI_ERROR (Status)) { + // + // EFI_ALREADY_STARTED is also an error + // + return Status; + } + + // + // Close the I/O Abstraction(s) used to perform the supported test + // + gBS->CloseProtocol ( + Controller, + &gEfiIdeControllerInitProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + // + // Now test the EfiPciIoProtocol + // + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (EFI_ERROR (Status)) { + return Status; + } + // + // Now further check the PCI header: Base class (offset 0x0B) and + // Sub Class (offset 0x0A). This controller should be an ATA controller + // + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint8, + PCI_CLASSCODE_OFFSET, + sizeof (PciData.Hdr.ClassCode), + PciData.Hdr.ClassCode + ); + if (EFI_ERROR (Status)) { + gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + return EFI_UNSUPPORTED; + } + // + // Close PciIo protocol as we have gotten the PciData. + // + gBS->CloseProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + if (IS_PCI_IDE (&PciData) || IS_PCI_SATADPA (&PciData)) { + return EFI_SUCCESS; + } + + return EFI_UNSUPPORTED; +} + +/** + Starts a device controller or a bus controller. + + The Start() function is designed to be invoked from the EFI boot service ConnectController(). + As a result, much of the error checking on the parameters to Start() has been moved into this + common boot service. It is legal to call Start() from other locations, + but the following calling restrictions must be followed, or the system behavior will not be deterministic. + 1. ControllerHandle must be a valid EFI_HANDLE. + 2. If RemainingDevicePath is not NULL, then it must be a pointer to a naturally aligned + EFI_DEVICE_PATH_PROTOCOL. + 3. Prior to calling Start(), the Supported() function for the driver specified by This must + have been called with the same calling parameters, and Supported() must have returned EFI_SUCCESS. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle The handle of the controller to start. This handle + must support a protocol interface that supplies + an I/O abstraction to the driver. + @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This + parameter is ignored by device drivers, and is optional for bus + drivers. For a bus driver, if this parameter is NULL, then handles + for all the children of Controller are created by this driver. + If this parameter is not NULL and the first Device Path Node is + not the End of Device Path Node, then only the handle for the + child device specified by the first Device Path Node of + RemainingDevicePath is created by this driver. + If the first Device Path Node of RemainingDevicePath is + the End of Device Path Node, no child handle is created by this + driver. + + @retval EFI_SUCCESS The device was started. + @retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval Others The driver failded to start the device. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + EFI_PCI_IO_PROTOCOL *PciIo; + UINT64 Supports; + BOOLEAN PciAttributesSaved; + UINT64 OriginalPciAttributes; + + Status = EFI_SUCCESS; + IdeControllerInit = NULL; + Instance = NULL; + PciAttributesSaved = FALSE; + OriginalPciAttributes = 0; + + DEBUG ((EFI_D_INFO, "==AtaAtapiPassThru Start== Controller = %x\n", Controller)); + + Status = gBS->OpenProtocol ( + Controller, + &gEfiIdeControllerInitProtocolGuid, + (VOID **) &IdeControllerInit, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Open Ide_Controller_Init Error, Status=%r", Status)); + goto ErrorExit; + } + + Status = gBS->OpenProtocol ( + Controller, + &gEfiPciIoProtocolGuid, + (VOID **) &PciIo, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Get Pci_Io Protocol Error, Status=%r", Status)); + goto ErrorExit; + } + + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationGet, + 0, + &OriginalPciAttributes + ); + + if (EFI_ERROR (Status)) { + goto ErrorExit; + } + PciAttributesSaved = TRUE; + + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationSupported, + 0, + &Supports + ); + if (!EFI_ERROR (Status)) { + Supports &= EFI_PCI_DEVICE_ENABLE; + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationEnable, + Supports, + NULL + ); + } + + if (EFI_ERROR (Status)) { + goto ErrorExit; + } + + // + // Allocate a buffer to store the ATA_ATAPI_PASS_THRU_INSTANCE data structure + // + Instance = AllocateCopyPool (sizeof (ATA_ATAPI_PASS_THRU_INSTANCE), &gAtaAtapiPassThruInstanceTemplate); + if (Instance == NULL) { + goto ErrorExit; + } + + Instance->ControllerHandle = Controller; + Instance->IdeControllerInit = IdeControllerInit; + Instance->PciIo = PciIo; + Instance->OriginalPciAttributes = OriginalPciAttributes; + Instance->AtaPassThru.Mode = &Instance->AtaPassThruMode; + Instance->ExtScsiPassThru.Mode = &Instance->ExtScsiPassThruMode; + InitializeListHead(&Instance->DeviceList); + + // + // Enumerate all inserted ATA devices. + // + Status = EnumerateAttachedDevice (Instance); + if (EFI_ERROR (Status)) { + goto ErrorExit; + } + + Status = gBS->InstallMultipleProtocolInterfaces ( + &Controller, + &gEfiAtaPassThruProtocolGuid, &(Instance->AtaPassThru), + &gEfiExtScsiPassThruProtocolGuid, &(Instance->ExtScsiPassThru), + NULL + ); + ASSERT_EFI_ERROR (Status); + + return Status; + +ErrorExit: + if (IdeControllerInit != NULL) { + gBS->CloseProtocol ( + Controller, + &gEfiIdeControllerInitProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } + + // + // Remove all inserted ATA devices. + // + DestroyDeviceInfoList(Instance); + + if (Instance != NULL) { + FreePool (Instance); + } + return EFI_UNSUPPORTED; +} + +/** + Stops a device controller or a bus controller. + + The Stop() function is designed to be invoked from the EFI boot service DisconnectController(). + As a result, much of the error checking on the parameters to Stop() has been moved + into this common boot service. It is legal to call Stop() from other locations, + but the following calling restrictions must be followed, or the system behavior will not be deterministic. + 1. ControllerHandle must be a valid EFI_HANDLE that was used on a previous call to this + same driver's Start() function. + 2. The first NumberOfChildren handles of ChildHandleBuffer must all be a valid + EFI_HANDLE. In addition, all of these handles must have been created in this driver's + Start() function, and the Start() function must have called OpenProtocol() on + ControllerHandle with an Attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle A handle to the device being stopped. The handle must + support a bus specific I/O protocol for the driver + to use to stop the device. + @param[in] NumberOfChildren The number of child device handles in ChildHandleBuffer. + @param[in] ChildHandleBuffer An array of child handles to be freed. May be NULL + if NumberOfChildren is 0. + + @retval EFI_SUCCESS The device was stopped. + @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +{ + EFI_STATUS Status; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + EFI_ATA_PASS_THRU_PROTOCOL *AtaPassThru; + EFI_PCI_IO_PROTOCOL *PciIo; + EFI_AHCI_REGISTERS *AhciRegisters; + UINT64 Supports; + + DEBUG ((EFI_D_INFO, "==AtaAtapiPassThru Stop== Controller = %x\n", Controller)); + + Status = gBS->OpenProtocol ( + Controller, + &gEfiAtaPassThruProtocolGuid, + (VOID **) &AtaPassThru, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS(AtaPassThru); + PciIo = Instance->PciIo; + + // + // Disable this ATA host controller. + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationSupported, + 0, + &Supports + ); + if (!EFI_ERROR (Status)) { + Supports &= EFI_PCI_DEVICE_ENABLE; + PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationDisable, + Supports, + NULL + ); + } + + // + // Restore original PCI attributes + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationSet, + Instance->OriginalPciAttributes, + NULL + ); + ASSERT_EFI_ERROR (Status); + + gBS->UninstallMultipleProtocolInterfaces ( + Controller, + &gEfiAtaPassThruProtocolGuid, &(Instance->AtaPassThru), + &gEfiExtScsiPassThruProtocolGuid, &(Instance->ExtScsiPassThru), + NULL + ); + + // + // Close protocols opened by AtaAtapiPassThru controller driver + // + gBS->CloseProtocol ( + Controller, + &gEfiIdeControllerInitProtocolGuid, + This->DriverBindingHandle, + Controller + ); + + // + // Free allocated resource + // + DestroyDeviceInfoList(Instance); + + // + // If the current working mode is AHCI mode, then pre-allocated resource + // for AHCI initialization should be released. + // + if (Instance->Mode == EfiAtaAhciMode) { + AhciRegisters = &Instance->AhciRegisters; + PciIo->Unmap ( + PciIo, + AhciRegisters->MapCommandTable + ); + PciIo->FreeBuffer ( + PciIo, + EFI_SIZE_TO_PAGES (AhciRegisters->MaxCommandTableSize), + AhciRegisters->AhciCommandTable + ); + PciIo->Unmap ( + PciIo, + AhciRegisters->MapCmdList + ); + PciIo->FreeBuffer ( + PciIo, + EFI_SIZE_TO_PAGES (AhciRegisters->MaxCommandListSize), + AhciRegisters->AhciCmdList + ); + PciIo->Unmap ( + PciIo, + AhciRegisters->MapRFis + ); + PciIo->FreeBuffer ( + PciIo, + EFI_SIZE_TO_PAGES (AhciRegisters->MaxReceiveFisSize), + AhciRegisters->AhciRFis + ); + } + FreePool (Instance); + + return Status; +} + +/** + Traverse the attached ATA devices list to find out the device to access. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + @param[in] Port The port number of the ATA device to send the command. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to send the command. + If there is no port multiplier, then specify 0. + @param[in] DeviceType The device type of the ATA device. + + @retval The pointer to the data structure of the device info to access. + +**/ +LIST_ENTRY * +EFIAPI +SearchDeviceInfoList ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT16 Port, + IN UINT16 PortMultiplier, + IN EFI_ATA_DEVICE_TYPE DeviceType + ) +{ + EFI_ATA_DEVICE_INFO *DeviceInfo; + LIST_ENTRY *Node; + + Node = GetFirstNode (&Instance->DeviceList); + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if ((DeviceInfo->Type == DeviceType) && + (Port == DeviceInfo->Port) && + (PortMultiplier == DeviceInfo->PortMultiplier)) { + return Node; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return NULL; +} + +/** + Allocate device info data structure to contain device info. + And insert the data structure to the tail of device list for tracing. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + @param[in] Port The port number of the ATA device to send the command. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to send the command. + If there is no port multiplier, then specify 0. + @param[in] DeviceType The device type of the ATA device. + @param[in] IdentifyData The data buffer to store the output of the IDENTIFY cmd. + + @retval EFI_SUCCESS Successfully insert the ata device to the tail of device list. + @retval EFI_OUT_OF_RESOURCES Can not allocate enough resource for use. + +**/ +EFI_STATUS +EFIAPI +CreateNewDeviceInfo ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT16 Port, + IN UINT16 PortMultiplier, + IN EFI_ATA_DEVICE_TYPE DeviceType, + IN EFI_IDENTIFY_DATA *IdentifyData + ) +{ + EFI_ATA_DEVICE_INFO *DeviceInfo; + + DeviceInfo = AllocateZeroPool (sizeof (EFI_ATA_DEVICE_INFO)); + + if (DeviceInfo == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + DeviceInfo->Signature = ATA_ATAPI_DEVICE_SIGNATURE; + DeviceInfo->Port = Port; + DeviceInfo->PortMultiplier = PortMultiplier; + DeviceInfo->Type = DeviceType; + + if (IdentifyData != NULL) { + DeviceInfo->IdentifyData = AllocateCopyPool (sizeof (EFI_IDENTIFY_DATA), IdentifyData); + if (DeviceInfo->IdentifyData == NULL) { + FreePool (DeviceInfo); + return EFI_OUT_OF_RESOURCES; + } + } + + InsertTailList (&Instance->DeviceList, &DeviceInfo->Link); + + return EFI_SUCCESS; +} + +/** + Destroy all attached ATA devices info. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + +**/ +VOID +EFIAPI +DestroyDeviceInfoList ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ) +{ + EFI_ATA_DEVICE_INFO *DeviceInfo; + LIST_ENTRY *Node; + + Node = GetFirstNode (&Instance->DeviceList); + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + Node = GetNextNode (&Instance->DeviceList, Node); + + RemoveEntryList (&DeviceInfo->Link); + if (DeviceInfo->IdentifyData != NULL) { + FreePool (DeviceInfo->IdentifyData); + } + FreePool (DeviceInfo); + } +} + +/** + Enumerate all attached ATA devices at IDE mode or AHCI mode separately. + + The function is designed to enumerate all attached ATA devices. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + + @retval EFI_SUCCESS Successfully enumerate attached ATA devices. + @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error. + +**/ +EFI_STATUS +EFIAPI +EnumerateAttachedDevice ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ) +{ + EFI_STATUS Status; + PCI_TYPE00 PciData; + UINT8 ClassCode; + + Status = EFI_SUCCESS; + + Status = Instance->PciIo->Pci.Read ( + Instance->PciIo, + EfiPciIoWidthUint8, + PCI_CLASSCODE_OFFSET, + sizeof (PciData.Hdr.ClassCode), + PciData.Hdr.ClassCode + ); + ASSERT_EFI_ERROR (Status); + + ClassCode = PciData.Hdr.ClassCode[1]; + + switch (ClassCode) { + case PCI_CLASS_MASS_STORAGE_IDE : + // + // The ATA controller is working at IDE mode + // + Instance->Mode = EfiAtaIdeMode; + + Status = IdeModeInitialization (Instance); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Done; + } + break; + case PCI_CLASS_MASS_STORAGE_SATADPA : + // + // The ATA controller is working at AHCI mode + // + Instance->Mode = EfiAtaAhciMode; + + Status = AhciModeInitialization (Instance); + + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Done; + } + + break; + default : + Status = EFI_UNSUPPORTED; + } + +Done: + return Status; +} + +/** + Sends an ATA command to an ATA device that is attached to the ATA controller. This function + supports both blocking I/O and non-blocking I/O. The blocking I/O functionality is required, + and the non-blocking I/O functionality is optional. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port The port number of the ATA device to send the command. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to send the command. + If there is no port multiplier, then specify 0. + @param[in, out] Packet A pointer to the ATA command to send to the ATA device specified by Port + and PortMultiplierPort. + @param[in] Event If non-blocking I/O is not supported then Event is ignored, and blocking + I/O is performed. If Event is NULL, then blocking I/O is performed. If + Event is not NULL and non blocking I/O is supported, then non-blocking + I/O is performed, and Event will be signaled when the ATA command completes. + + @retval EFI_SUCCESS The ATA command was sent by the host. For bi-directional commands, + InTransferLength bytes were transferred from InDataBuffer. For write and + bi-directional commands, OutTransferLength bytes were transferred by OutDataBuffer. + @retval EFI_BAD_BUFFER_SIZE The ATA command was not executed. The number of bytes that could be transferred + is returned in InTransferLength. For write and bi-directional commands, + OutTransferLength bytes were transferred by OutDataBuffer. + @retval EFI_NOT_READY The ATA command could not be sent because there are too many ATA commands + already queued. The caller may retry again later. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the ATA command. + @retval EFI_INVALID_PARAMETER Port, PortMultiplierPort, or the contents of Acb are invalid. The ATA + command was not sent, so no additional status information is available. + +**/ +EFI_STATUS +EFIAPI +AtaPassThruPassThru ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN UINT16 PortMultiplierPort, + IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet, + IN EFI_EVENT Event OPTIONAL + ) +{ + EFI_STATUS Status; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + EFI_ATA_PASS_THRU_CMD_PROTOCOL Protocol; + EFI_ATA_HC_WORK_MODE Mode; + LIST_ENTRY *Node; + EFI_ATA_DEVICE_INFO *DeviceInfo; + EFI_IDENTIFY_DATA *IdentifyData; + UINT64 Capacity; + UINT32 MaxSectorCount; + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->InDataBuffer, This->Mode->IoAlign)) { + return EFI_INVALID_PARAMETER; + } + + if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->OutDataBuffer, This->Mode->IoAlign)) { + return EFI_INVALID_PARAMETER; + } + + if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->Asb, This->Mode->IoAlign)) { + return EFI_INVALID_PARAMETER; + } + + // + // convert the transfer length from sector count to byte. + // + if (((Packet->Length & EFI_ATA_PASS_THRU_LENGTH_BYTES) == 0) && + (Packet->InTransferLength != 0)) { + Packet->InTransferLength = Packet->InTransferLength * 0x200; + } + + // + // convert the transfer length from sector count to byte. + // + if (((Packet->Length & EFI_ATA_PASS_THRU_LENGTH_BYTES) == 0) && + (Packet->OutTransferLength != 0)) { + Packet->OutTransferLength = Packet->OutTransferLength * 0x200; + } + + Node = SearchDeviceInfoList (Instance, Port, PortMultiplierPort, EfiIdeHarddisk); + + if (Node == NULL) { + return EFI_INVALID_PARAMETER; + } + + // + // Check whether this device needs 48-bit addressing (ATAPI-6 ata device). + // Per ATA-6 spec, word83: bit15 is zero and bit14 is one. + // If bit10 is one, it means the ata device support 48-bit addressing. + // + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + IdentifyData = DeviceInfo->IdentifyData; + MaxSectorCount = 0x100; + if ((IdentifyData->AtaData.command_set_supported_83 & (BIT10 | BIT15 | BIT14)) == 0x4400) { + Capacity = *((UINT64 *)IdentifyData->AtaData.maximum_lba_for_48bit_addressing); + if (Capacity > 0xFFFFFFF) { + // + // Capacity exceeds 120GB. 48-bit addressing is really needed + // In this case, the max sector count is 0x10000 + // + MaxSectorCount = 0x10000; + } + } + + // + // If the data buffer described by InDataBuffer/OutDataBuffer and InTransferLength/OutTransferLength + // is too big to be transferred in a single command, then no data is transferred and EFI_BAD_BUFFER_SIZE + // is returned. + // + if (((Packet->InTransferLength != 0) && (Packet->InTransferLength > MaxSectorCount * 0x200)) || + ((Packet->OutTransferLength != 0) && (Packet->OutTransferLength > MaxSectorCount * 0x200))) { + return EFI_BAD_BUFFER_SIZE; + } + + Status = EFI_UNSUPPORTED; + Protocol = Packet->Protocol; + + Mode = Instance->Mode; + switch (Mode) { + case EfiAtaIdeMode: + // + // Reassign IDE mode io port registers' base addresses + // + Status = GetIdeRegisterIoAddr (Instance->PciIo, Instance->IdeRegisters); + + if (EFI_ERROR (Status)) { + return Status; + } + + switch (Protocol) { + case EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA: + Status = AtaNonDataCommandIn( + Instance->PciIo, + &Instance->IdeRegisters[Port], + Packet->Acb, + Packet->Asb, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN: + Status = AtaPioDataInOut( + Instance->PciIo, + &Instance->IdeRegisters[Port], + Packet->InDataBuffer, + Packet->InTransferLength, + TRUE, + Packet->Acb, + Packet->Asb, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_OUT: + Status = AtaPioDataInOut( + Instance->PciIo, + &Instance->IdeRegisters[Port], + Packet->OutDataBuffer, + Packet->OutTransferLength, + FALSE, + Packet->Acb, + Packet->Asb, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_UDMA_DATA_IN: + Status = AtaUdmaInOut( + Instance->PciIo, + &Instance->IdeRegisters[Port], + TRUE, + Packet->InDataBuffer, + Packet->InTransferLength, + Packet->Acb, + Packet->Asb, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_UDMA_DATA_OUT: + Status = AtaUdmaInOut( + Instance->PciIo, + &Instance->IdeRegisters[Port], + FALSE, + Packet->OutDataBuffer, + Packet->OutTransferLength, + Packet->Acb, + Packet->Asb, + Packet->Timeout + ); + break; + default : + return EFI_UNSUPPORTED; + } + break; + case EfiAtaAhciMode : + switch (Protocol) { + case EFI_ATA_PASS_THRU_PROTOCOL_ATA_NON_DATA: + Status = AhciNonDataTransfer( + Instance->PciIo, + &Instance->AhciRegisters, + (UINT8)Port, + (UINT8)PortMultiplierPort, + NULL, + 0, + Packet->Acb, + Packet->Asb, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN: + Status = AhciPioTransfer( + Instance->PciIo, + &Instance->AhciRegisters, + (UINT8)Port, + (UINT8)PortMultiplierPort, + NULL, + 0, + TRUE, + Packet->Acb, + Packet->Asb, + Packet->InDataBuffer, + Packet->InTransferLength, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_OUT: + Status = AhciPioTransfer( + Instance->PciIo, + &Instance->AhciRegisters, + (UINT8)Port, + (UINT8)PortMultiplierPort, + NULL, + 0, + FALSE, + Packet->Acb, + Packet->Asb, + Packet->OutDataBuffer, + Packet->OutTransferLength, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_UDMA_DATA_IN: + Status = AhciDmaTransfer( + Instance->PciIo, + &Instance->AhciRegisters, + (UINT8)Port, + (UINT8)PortMultiplierPort, + NULL, + 0, + TRUE, + Packet->Acb, + Packet->Asb, + Packet->InDataBuffer, + Packet->InTransferLength, + Packet->Timeout + ); + break; + case EFI_ATA_PASS_THRU_PROTOCOL_UDMA_DATA_OUT: + Status = AhciDmaTransfer( + Instance->PciIo, + &Instance->AhciRegisters, + (UINT8)Port, + (UINT8)PortMultiplierPort, + NULL, + 0, + FALSE, + Packet->Acb, + Packet->Asb, + Packet->OutDataBuffer, + Packet->OutTransferLength, + Packet->Timeout + ); + break; + default : + return EFI_UNSUPPORTED; + } + break; + + default: + Status = EFI_DEVICE_ERROR; + break; + } + + return Status; +} + +/** + Used to retrieve the list of legal port numbers for ATA devices on an ATA controller. + These can either be the list of ports where ATA devices are actually present or the + list of legal port numbers for the ATA controller. Regardless, the caller of this + function must probe the port number returned to see if an ATA device is actually + present at that location on the ATA controller. + + The GetNextPort() function retrieves the port number on an ATA controller. If on input + Port is 0xFFFF, then the port number of the first port on the ATA controller is returned + in Port and EFI_SUCCESS is returned. + + If Port is a port number that was returned on a previous call to GetNextPort(), then the + port number of the next port on the ATA controller is returned in Port, and EFI_SUCCESS + is returned. If Port is not 0xFFFF and Port was not returned on a previous call to + GetNextPort(), then EFI_INVALID_PARAMETER is returned. + + If Port is the port number of the last port on the ATA controller, then EFI_NOT_FOUND is + returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in, out] Port On input, a pointer to the port number on the ATA controller. + On output, a pointer to the next port number on the ATA + controller. An input value of 0xFFFF retrieves the first port + number on the ATA controller. + + @retval EFI_SUCCESS The next port number on the ATA controller was returned in Port. + @retval EFI_NOT_FOUND There are no more ports on this ATA controller. + @retval EFI_INVALID_PARAMETER Port is not 0xFFFF and Port was not returned on a previous call + to GetNextPort(). + +**/ +EFI_STATUS +EFIAPI +AtaPassThruGetNextPort ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN OUT UINT16 *Port + ) +{ + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + EFI_ATA_DEVICE_INFO *DeviceInfo; + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + if (Port == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*Port == 0xFFFF) { + // + // If the Port is all 0xFF's, start to traverse the device list from the beginning + // + Node = GetFirstNode (&Instance->DeviceList); + + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if (DeviceInfo->Type == EfiIdeHarddisk) { + *Port = DeviceInfo->Port; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } else if (*Port == Instance->PreviousPort) { + Node = GetFirstNode (&Instance->DeviceList); + + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if ((DeviceInfo->Type == EfiIdeHarddisk) && + (DeviceInfo->Port > *Port)){ + *Port = DeviceInfo->Port; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } else { + // + // Port is not equal to 0xFFFF and also not equal to previous return value + // + return EFI_INVALID_PARAMETER; + } + +Exit: + // + // Update the PreviousPort and PreviousPortMultiplier. + // + Instance->PreviousPort = *Port; + + return EFI_SUCCESS; +} + +/** + Used to retrieve the list of legal port multiplier port numbers for ATA devices on a port of an ATA + controller. These can either be the list of port multiplier ports where ATA devices are actually + present on port or the list of legal port multiplier ports on that port. Regardless, the caller of this + function must probe the port number and port multiplier port number returned to see if an ATA + device is actually present. + + The GetNextDevice() function retrieves the port multiplier port number of an ATA device + present on a port of an ATA controller. + + If PortMultiplierPort points to a port multiplier port number value that was returned on a + previous call to GetNextDevice(), then the port multiplier port number of the next ATA device + on the port of the ATA controller is returned in PortMultiplierPort, and EFI_SUCCESS is + returned. + + If PortMultiplierPort points to 0xFFFF, then the port multiplier port number of the first + ATA device on port of the ATA controller is returned in PortMultiplierPort and + EFI_SUCCESS is returned. + + If PortMultiplierPort is not 0xFFFF and the value pointed to by PortMultiplierPort + was not returned on a previous call to GetNextDevice(), then EFI_INVALID_PARAMETER + is returned. + + If PortMultiplierPort is the port multiplier port number of the last ATA device on the port of + the ATA controller, then EFI_NOT_FOUND is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port The port number present on the ATA controller. + @param[in, out] PortMultiplierPort On input, a pointer to the port multiplier port number of an + ATA device present on the ATA controller. + If on input a PortMultiplierPort of 0xFFFF is specified, + then the port multiplier port number of the first ATA device + is returned. On output, a pointer to the port multiplier port + number of the next ATA device present on an ATA controller. + + @retval EFI_SUCCESS The port multiplier port number of the next ATA device on the port + of the ATA controller was returned in PortMultiplierPort. + @retval EFI_NOT_FOUND There are no more ATA devices on this port of the ATA controller. + @retval EFI_INVALID_PARAMETER PortMultiplierPort is not 0xFFFF, and PortMultiplierPort was not + returned on a previous call to GetNextDevice(). + +**/ +EFI_STATUS +EFIAPI +AtaPassThruGetNextDevice ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN OUT UINT16 *PortMultiplierPort + ) +{ + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + EFI_ATA_DEVICE_INFO *DeviceInfo; + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + if (PortMultiplierPort == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*PortMultiplierPort == 0xFFFF) { + // + // If the PortMultiplierPort is all 0xFF's, start to traverse the device list from the beginning + // + Node = GetFirstNode (&Instance->DeviceList); + + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if ((DeviceInfo->Type == EfiIdeHarddisk) && + (DeviceInfo->Port == Port)){ + *PortMultiplierPort = DeviceInfo->PortMultiplier; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } else if (*PortMultiplierPort == Instance->PreviousPortMultiplier) { + Node = GetFirstNode (&Instance->DeviceList); + + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if ((DeviceInfo->Type == EfiIdeHarddisk) && + (DeviceInfo->Port == Port) && + (DeviceInfo->PortMultiplier > *PortMultiplierPort)){ + *PortMultiplierPort = DeviceInfo->PortMultiplier; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } else { + // + // PortMultiplierPort is not equal to 0xFFFF and also not equal to previous return value + // + return EFI_INVALID_PARAMETER; + } + +Exit: + // + // Update the PreviousPort and PreviousPortMultiplier. + // + Instance->PreviousPortMultiplier = *PortMultiplierPort; + + return EFI_SUCCESS; +} + +/** + Used to allocate and build a device path node for an ATA device on an ATA controller. + + The BuildDevicePath() function allocates and builds a single device node for the ATA + device specified by Port and PortMultiplierPort. If the ATA device specified by Port and + PortMultiplierPort is not present on the ATA controller, then EFI_NOT_FOUND is returned. + If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned. If there are not enough + resources to allocate the device path node, then EFI_OUT_OF_RESOURCES is returned. + + Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of + DevicePath are initialized to describe the ATA device specified by Port and PortMultiplierPort, + and EFI_SUCCESS is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port Port specifies the port number of the ATA device for which a + device path node is to be allocated and built. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device for which a + device path node is to be allocated and built. If there is no + port multiplier, then specify 0. + @param[in, out] DevicePath A pointer to a single device path node that describes the ATA + device specified by Port and PortMultiplierPort. This function + is responsible for allocating the buffer DevicePath with the + boot service AllocatePool(). It is the caller's responsibility + to free DevicePath when the caller is finished with DevicePath. + @retval EFI_SUCCESS The device path node that describes the ATA device specified by + Port and PortMultiplierPort was allocated and returned in DevicePath. + @retval EFI_NOT_FOUND The ATA device specified by Port and PortMultiplierPort does not + exist on the ATA controller. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath. + +**/ +EFI_STATUS +EFIAPI +AtaPassThruBuildDevicePath ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN UINT16 PortMultiplierPort, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ) +{ + EFI_DEV_PATH *DevicePathNode; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + // + // Validate parameters passed in. + // + if (DevicePath == NULL) { + return EFI_INVALID_PARAMETER; + } + + Node = SearchDeviceInfoList(Instance, Port, PortMultiplierPort, EfiIdeHarddisk); + if (Node == NULL) { + return EFI_NOT_FOUND; + } + + if (Instance->Mode == EfiAtaIdeMode) { + DevicePathNode = AllocateCopyPool (sizeof (ATAPI_DEVICE_PATH), &mAtapiDevicePathTemplate); + if (DevicePathNode == NULL) { + return EFI_OUT_OF_RESOURCES; + } + DevicePathNode->Atapi.PrimarySecondary = (UINT8) Port; + DevicePathNode->Atapi.SlaveMaster = (UINT8) PortMultiplierPort; + DevicePathNode->Atapi.Lun = 0; + } else { + DevicePathNode = AllocateCopyPool (sizeof (SATA_DEVICE_PATH), &mSataDevicePathTemplate); + if (DevicePathNode == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + DevicePathNode->Sata.HBAPortNumber = Port; + DevicePathNode->Sata.PortMultiplierPortNumber = PortMultiplierPort; + DevicePathNode->Sata.Lun = 0; + } + + *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) DevicePathNode; + + return EFI_SUCCESS; +} + +/** + Used to translate a device path node to a port number and port multiplier port number. + + The GetDevice() function determines the port and port multiplier port number associated with + the ATA device described by DevicePath. If DevicePath is a device path node type that the + ATA Pass Thru driver supports, then the ATA Pass Thru driver will attempt to translate the contents + DevicePath into a port number and port multiplier port number. + + If this translation is successful, then that port number and port multiplier port number are returned + in Port and PortMultiplierPort, and EFI_SUCCESS is returned. + + If DevicePath, Port, or PortMultiplierPort are NULL, then EFI_INVALID_PARAMETER is returned. + + If DevicePath is not a device path node type that the ATA Pass Thru driver supports, then + EFI_UNSUPPORTED is returned. + + If DevicePath is a device path node type that the ATA Pass Thru driver supports, but there is not + a valid translation from DevicePath to a port number and port multiplier port number, then + EFI_NOT_FOUND is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] DevicePath A pointer to the device path node that describes an ATA device on the + ATA controller. + @param[out] Port On return, points to the port number of an ATA device on the ATA controller. + @param[out] PortMultiplierPort On return, points to the port multiplier port number of an ATA device + on the ATA controller. + + @retval EFI_SUCCESS DevicePath was successfully translated to a port number and port multiplier + port number, and they were returned in Port and PortMultiplierPort. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_INVALID_PARAMETER Port is NULL. + @retval EFI_INVALID_PARAMETER PortMultiplierPort is NULL. + @retval EFI_UNSUPPORTED This driver does not support the device path node type in DevicePath. + @retval EFI_NOT_FOUND A valid translation from DevicePath to a port number and port multiplier + port number does not exist. +**/ +EFI_STATUS +EFIAPI +AtaPassThruGetDevice ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + OUT UINT16 *Port, + OUT UINT16 *PortMultiplierPort + ) +{ + EFI_DEV_PATH *DevicePathNode; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + // + // Validate parameters passed in. + // + if (DevicePath == NULL || Port == NULL || PortMultiplierPort == NULL) { + return EFI_INVALID_PARAMETER; + } + + // + // Check whether the DevicePath belongs to SCSI_DEVICE_PATH or ATAPI_DEVICE_PATH + // + if ((DevicePath->Type != MESSAGING_DEVICE_PATH) || + ((DevicePath->SubType != MSG_SATA_DP) && + (DevicePath->SubType != MSG_ATAPI_DP)) || + ((DevicePathNodeLength(DevicePath) != sizeof(ATAPI_DEVICE_PATH)) && + (DevicePathNodeLength(DevicePath) != sizeof(SATA_DEVICE_PATH)))) { + return EFI_UNSUPPORTED; + } + + DevicePathNode = (EFI_DEV_PATH *) DevicePath; + + if (Instance->Mode == EfiAtaIdeMode) { + *Port = DevicePathNode->Atapi.PrimarySecondary; + *PortMultiplierPort = DevicePathNode->Atapi.SlaveMaster; + } else { + *Port = DevicePathNode->Sata.HBAPortNumber; + *PortMultiplierPort = DevicePathNode->Sata.PortMultiplierPortNumber; + } + + Node = SearchDeviceInfoList(Instance, *Port, *PortMultiplierPort, EfiIdeHarddisk); + + if (Node == NULL) { + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +/** + Resets a specific port on the ATA controller. This operation also resets all the ATA devices + connected to the port. + + The ResetChannel() function resets an a specific port on an ATA controller. This operation + resets all the ATA devices connected to that port. If this ATA controller does not support + a reset port operation, then EFI_UNSUPPORTED is returned. + + If a device error occurs while executing that port reset operation, then EFI_DEVICE_ERROR is + returned. + + If a timeout occurs during the execution of the port reset operation, then EFI_TIMEOUT is returned. + + If the port reset operation is completed, then EFI_SUCCESS is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port The port number on the ATA controller. + + @retval EFI_SUCCESS The ATA controller port was reset. + @retval EFI_UNSUPPORTED The ATA controller does not support a port reset operation. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the ATA port. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the ATA port. + +**/ +EFI_STATUS +EFIAPI +AtaPassThruResetPort ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Resets an ATA device that is connected to an ATA controller. + + The ResetDevice() function resets the ATA device specified by Port and PortMultiplierPort. + If this ATA controller does not support a device reset operation, then EFI_UNSUPPORTED is + returned. + + If Port or PortMultiplierPort are not in a valid range for this ATA controller, then + EFI_INVALID_PARAMETER is returned. + + If a device error occurs while executing that device reset operation, then EFI_DEVICE_ERROR + is returned. + + If a timeout occurs during the execution of the device reset operation, then EFI_TIMEOUT is + returned. + + If the device reset operation is completed, then EFI_SUCCESS is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port Port represents the port number of the ATA device to be reset. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to reset. + If there is no port multiplier, then specify 0. + @retval EFI_SUCCESS The ATA device specified by Port and PortMultiplierPort was reset. + @retval EFI_UNSUPPORTED The ATA controller does not support a device reset operation. + @retval EFI_INVALID_PARAMETER Port or PortMultiplierPort are invalid. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the ATA device + specified by Port and PortMultiplierPort. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the ATA device + specified by Port and PortMultiplierPort. + +**/ +EFI_STATUS +EFIAPI +AtaPassThruResetDevice ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN UINT16 PortMultiplierPort + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Sends a SCSI Request Packet to a SCSI device that is attached to the SCSI channel. This function + supports both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the + nonblocking I/O functionality is optional. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target The Target is an array of size TARGET_MAX_BYTES and it represents + the id of the SCSI device to send the SCSI Request Packet. Each + transport driver may choose to utilize a subset of this size to suit the needs + of transport target representation. For example, a Fibre Channel driver + may use only 8 bytes (WWN) to represent an FC target. + @param Lun The LUN of the SCSI device to send the SCSI Request Packet. + @param Packet A pointer to the SCSI Request Packet to send to the SCSI device + specified by Target and Lun. + @param Event If nonblocking I/O is not supported then Event is ignored, and blocking + I/O is performed. If Event is NULL, then blocking I/O is performed. If + Event is not NULL and non blocking I/O is supported, then + nonblocking I/O is performed, and Event will be signaled when the + SCSI Request Packet completes. + + @retval EFI_SUCCESS The SCSI Request Packet was sent by the host. For bi-directional + commands, InTransferLength bytes were transferred from + InDataBuffer. For write and bi-directional commands, + OutTransferLength bytes were transferred by + OutDataBuffer. + @retval EFI_BAD_BUFFER_SIZE The SCSI Request Packet was not executed. The number of bytes that + could be transferred is returned in InTransferLength. For write + and bi-directional commands, OutTransferLength bytes were + transferred by OutDataBuffer. + @retval EFI_NOT_READY The SCSI Request Packet could not be sent because there are too many + SCSI Request Packets already queued. The caller may retry again later. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the SCSI Request + Packet. + @retval EFI_INVALID_PARAMETER Target, Lun, or the contents of ScsiRequestPacket are invalid. + @retval EFI_UNSUPPORTED The command described by the SCSI Request Packet is not supported + by the host adapter. This includes the case of Bi-directional SCSI + commands not supported by the implementation. The SCSI Request + Packet was not sent, so no additional status information is available. + @retval EFI_TIMEOUT A timeout occurred while waiting for the SCSI Request Packet to execute. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruPassThru ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet, + IN EFI_EVENT Event OPTIONAL + ) +{ + EFI_STATUS Status; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + UINT8 Port; + UINT8 PortMultiplier; + EFI_ATA_HC_WORK_MODE Mode; + LIST_ENTRY *Node; + EFI_ATA_DEVICE_INFO *DeviceInfo; + + Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + if ((Packet == NULL) || (Packet->Cdb == NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // Don't support variable length CDB + // + if ((Packet->CdbLength != 6) && (Packet->CdbLength != 10) && + (Packet->CdbLength != 12) && (Packet->CdbLength != 16)) { + return EFI_INVALID_PARAMETER; + } + + if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->InDataBuffer, This->Mode->IoAlign)) { + return EFI_INVALID_PARAMETER; + } + + if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->OutDataBuffer, This->Mode->IoAlign)) { + return EFI_INVALID_PARAMETER; + } + + if ((This->Mode->IoAlign > 1) && !IS_ALIGNED(Packet->SenseData, This->Mode->IoAlign)) { + return EFI_INVALID_PARAMETER; + } + + // + // For ATAPI device, doesn't support multiple LUN device. + // + if (Lun != 0) { + return EFI_INVALID_PARAMETER; + } + + // + // The layout of Target array: + // ________________________________________________________________________ + // | Byte 0 | Byte 1 | ... | TARGET_MAX_BYTES - 1 | + // |_____________________|_____________________|_____|______________________| + // | | The port multiplier | | | + // | The port number | port number | N/A | N/A | + // |_____________________|_____________________|_____|______________________| + // + // For ATAPI device, 2 bytes is enough to represent the location of SCSI device. + // + Port = Target[0]; + PortMultiplier = Target[1]; + + Node = SearchDeviceInfoList(Instance, Port, PortMultiplier, EfiIdeCdrom); + if (Node == NULL) { + return EFI_INVALID_PARAMETER; + } + + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + // + // ATA_CMD_IDENTIFY_DEVICE cmd is a ATA cmd but not a SCSI cmd. + // Normally it should NOT be passed down through ExtScsiPassThru protocol interface. + // But to response EFI_DISK_INFO.Identify() request from ScsiDisk, we should handle this command. + // + if (*((UINT8*)Packet->Cdb) == ATA_CMD_IDENTIFY_DEVICE) { + CopyMem (Packet->InDataBuffer, DeviceInfo->IdentifyData, sizeof (EFI_IDENTIFY_DATA)); + return EFI_SUCCESS; + } + + Mode = Instance->Mode; + switch (Mode) { + case EfiAtaIdeMode: + // + // Reassign IDE mode io port registers' base addresses + // + Status = GetIdeRegisterIoAddr (Instance->PciIo, Instance->IdeRegisters); + + if (EFI_ERROR (Status)) { + return Status; + } + + Status = AtaPacketCommandExecute (Instance->PciIo, &Instance->IdeRegisters[Port], Port, PortMultiplier, Packet); + break; + case EfiAtaAhciMode: + Status = AhciPacketCommandExecute (Instance->PciIo, &Instance->AhciRegisters, Port, PortMultiplier, Packet); + break; + default : + Status = EFI_DEVICE_ERROR; + break; + } + + return Status; +} + +/** + Used to retrieve the list of legal Target IDs and LUNs for SCSI devices on a SCSI channel. These + can either be the list SCSI devices that are actually present on the SCSI channel, or the list of legal + Target Ids and LUNs for the SCSI channel. Regardless, the caller of this function must probe the + Target ID and LUN returned to see if a SCSI device is actually present at that location on the SCSI + channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target On input, a pointer to the Target ID (an array of size + TARGET_MAX_BYTES) of a SCSI device present on the SCSI channel. + On output, a pointer to the Target ID (an array of + TARGET_MAX_BYTES) of the next SCSI device present on a SCSI + channel. An input value of 0xF(all bytes in the array are 0xF) in the + Target array retrieves the Target ID of the first SCSI device present on a + SCSI channel. + @param Lun On input, a pointer to the LUN of a SCSI device present on the SCSI + channel. On output, a pointer to the LUN of the next SCSI device present + on a SCSI channel. + + @retval EFI_SUCCESS The Target ID and LUN of the next SCSI device on the SCSI + channel was returned in Target and Lun. + @retval EFI_INVALID_PARAMETER Target array is not all 0xF, and Target and Lun were + not returned on a previous call to GetNextTargetLun(). + @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruGetNextTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target, + IN OUT UINT64 *Lun + ) +{ + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + EFI_ATA_DEVICE_INFO *DeviceInfo; + UINT8 *Target8; + UINT16 *Target16; + + Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + if (Target == NULL || Lun == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*Target == NULL) { + return EFI_INVALID_PARAMETER; + } + + Target8 = *Target; + Target16 = (UINT16 *)*Target; + + if (CompareMem(Target8, mScsiId, TARGET_MAX_BYTES) != 0) { + // + // For ATAPI device, we use 2 least significant bytes to represent the location of SCSI device. + // So the higher bytes in Target array should be 0xFF. + // + if (CompareMem (&Target8[2], &mScsiId[2], TARGET_MAX_BYTES - 2) != 0) { + return EFI_INVALID_PARAMETER; + } + + // + // When Target is not all 0xFF's, compare 2 least significant bytes with + // previous target id to see if it is returned by previous call. + // + if ((*Target16 != Instance->PreviousTargetId) || + (*Lun != Instance->PreviousLun)) { + return EFI_INVALID_PARAMETER; + } + + // + // Traverse the whole device list to find the next cdrom closed to + // the device signified by Target[0] and Target[1]. + // + // Note that we here use a tricky way to find the next cdrom : + // All ata devices are detected and inserted into the device list + // sequentially. + // + Node = GetFirstNode (&Instance->DeviceList); + + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if ((DeviceInfo->Type == EfiIdeCdrom) && + ((Target8[0] < DeviceInfo->Port) || + (Target8[1] < DeviceInfo->PortMultiplier))) { + Target8[0] = (UINT8)DeviceInfo->Port; + Target8[1] = (UINT8)DeviceInfo->PortMultiplier; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } else { + // + // If the array is all 0xFF's, start to traverse the device list from the beginning + // + Node = GetFirstNode (&Instance->DeviceList); + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if (DeviceInfo->Type == EfiIdeCdrom) { + Target8[0] = (UINT8)DeviceInfo->Port; + Target8[1] = (UINT8)DeviceInfo->PortMultiplier; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } + +Exit: + *Lun = 0; + + // + // Update the PreviousTargetId. + // + Instance->PreviousTargetId = *Target16; + Instance->PreviousLun = *Lun; + + return EFI_SUCCESS; +} + +/** + Used to allocate and build a device path node for a SCSI device on a SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target The Target is an array of size TARGET_MAX_BYTES and it specifies the + Target ID of the SCSI device for which a device path node is to be + allocated and built. Transport drivers may chose to utilize a subset of + this size to suit the representation of targets. For example, a Fibre + Channel driver may use only 8 bytes (WWN) in the array to represent a + FC target. + @param Lun The LUN of the SCSI device for which a device path node is to be + allocated and built. + @param DevicePath A pointer to a single device path node that describes the SCSI device + specified by Target and Lun. This function is responsible for + allocating the buffer DevicePath with the boot service + AllocatePool(). It is the caller's responsibility to free + DevicePath when the caller is finished with DevicePath. + + @retval EFI_SUCCESS The device path node that describes the SCSI device specified by + Target and Lun was allocated and returned in + DevicePath. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_NOT_FOUND The SCSI devices specified by Target and Lun does not exist + on the SCSI channel. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruBuildDevicePath ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ) +{ + EFI_DEV_PATH *DevicePathNode; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + UINT8 Port; + UINT8 PortMultiplier; + + Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + Port = Target[0]; + PortMultiplier = Target[1]; + + // + // Validate parameters passed in. + // + if (DevicePath == NULL) { + return EFI_INVALID_PARAMETER; + } + + // + // can not build device path for the SCSI Host Controller. + // + if (Lun != 0) { + return EFI_NOT_FOUND; + } + + if (SearchDeviceInfoList(Instance, Port, PortMultiplier, EfiIdeCdrom) == NULL) { + return EFI_NOT_FOUND; + } + + if (Instance->Mode == EfiAtaIdeMode) { + DevicePathNode = AllocateCopyPool (sizeof (ATAPI_DEVICE_PATH), &mAtapiDevicePathTemplate); + if (DevicePathNode == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + DevicePathNode->Atapi.PrimarySecondary = Port; + DevicePathNode->Atapi.SlaveMaster = PortMultiplier; + DevicePathNode->Atapi.Lun = (UINT16) Lun; + } else { + DevicePathNode = AllocateCopyPool (sizeof (SATA_DEVICE_PATH), &mSataDevicePathTemplate); + if (DevicePathNode == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + DevicePathNode->Sata.HBAPortNumber = Port; + DevicePathNode->Sata.PortMultiplierPortNumber = PortMultiplier; + DevicePathNode->Sata.Lun = (UINT16) Lun; + } + + *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) DevicePathNode; + + return EFI_SUCCESS; +} + +/** + Used to translate a device path node to a Target ID and LUN. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param DevicePath A pointer to a single device path node that describes the SCSI device + on the SCSI channel. + @param Target A pointer to the Target Array which represents the ID of a SCSI device + on the SCSI channel. + @param Lun A pointer to the LUN of a SCSI device on the SCSI channel. + + @retval EFI_SUCCESS DevicePath was successfully translated to a Target ID and + LUN, and they were returned in Target and Lun. + @retval EFI_INVALID_PARAMETER DevicePath or Target or Lun is NULL. + @retval EFI_NOT_FOUND A valid translation from DevicePath to a Target ID and LUN + does not exist. + @retval EFI_UNSUPPORTED This driver does not support the device path node type in + DevicePath. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruGetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + OUT UINT8 **Target, + OUT UINT64 *Lun + ) +{ + EFI_DEV_PATH *DevicePathNode; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + + Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + // + // Validate parameters passed in. + // + if (DevicePath == NULL || Target == NULL || Lun == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*Target == NULL) { + return EFI_INVALID_PARAMETER; + } + // + // Check whether the DevicePath belongs to SCSI_DEVICE_PATH + // + if ((DevicePath->Type != MESSAGING_DEVICE_PATH) || + ((DevicePath->SubType != MSG_ATAPI_DP) && + (DevicePath->SubType != MSG_SATA_DP)) || + ((DevicePathNodeLength(DevicePath) != sizeof(ATAPI_DEVICE_PATH)) && + (DevicePathNodeLength(DevicePath) != sizeof(SATA_DEVICE_PATH)))) { + return EFI_UNSUPPORTED; + } + + SetMem (*Target, TARGET_MAX_BYTES, 0xFF); + + DevicePathNode = (EFI_DEV_PATH *) DevicePath; + + if (Instance->Mode == EfiAtaIdeMode) { + (*Target)[0] = (UINT8) DevicePathNode->Atapi.PrimarySecondary; + (*Target)[1] = (UINT8) DevicePathNode->Atapi.SlaveMaster; + *Lun = (UINT8) DevicePathNode->Atapi.Lun; + } else { + (*Target)[0] = (UINT8) DevicePathNode->Sata.HBAPortNumber; + (*Target)[1] = (UINT8) DevicePathNode->Sata.PortMultiplierPortNumber; + *Lun = (UINT8) DevicePathNode->Sata.Lun; + } + + Node = SearchDeviceInfoList(Instance, (*Target)[0], (*Target)[1], EfiIdeCdrom); + + if (Node == NULL) { + return EFI_NOT_FOUND; + } + + if (*Lun != 0) { + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +/** + Resets a SCSI channel. This operation resets all the SCSI devices connected to the SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + + @retval EFI_SUCCESS The SCSI channel was reset. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the SCSI channel. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the SCSI channel. + @retval EFI_UNSUPPORTED The SCSI channel does not support a channel reset operation. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruResetChannel ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Resets a SCSI logical unit that is connected to a SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target The Target is an array of size TARGET_MAX_BYTE and it represents the + target port ID of the SCSI device containing the SCSI logical unit to + reset. Transport drivers may chose to utilize a subset of this array to suit + the representation of their targets. + @param Lun The LUN of the SCSI device to reset. + + @retval EFI_SUCCESS The SCSI device specified by Target and Lun was reset. + @retval EFI_INVALID_PARAMETER Target or Lun is NULL. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the SCSI device + specified by Target and Lun. + @retval EFI_UNSUPPORTED The SCSI channel does not support a target reset operation. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the SCSI device + specified by Target and Lun. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruResetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Used to retrieve the list of legal Target IDs for SCSI devices on a SCSI channel. These can either + be the list SCSI devices that are actually present on the SCSI channel, or the list of legal Target IDs + for the SCSI channel. Regardless, the caller of this function must probe the Target ID returned to + see if a SCSI device is actually present at that location on the SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target (TARGET_MAX_BYTES) of a SCSI device present on the SCSI channel. + On output, a pointer to the Target ID (an array of + TARGET_MAX_BYTES) of the next SCSI device present on a SCSI + channel. An input value of 0xF(all bytes in the array are 0xF) in the + Target array retrieves the Target ID of the first SCSI device present on a + SCSI channel. + + @retval EFI_SUCCESS The Target ID of the next SCSI device on the SCSI + channel was returned in Target. + @retval EFI_INVALID_PARAMETER Target or Lun is NULL. + @retval EFI_TIMEOUT Target array is not all 0xF, and Target was not + returned on a previous call to GetNextTarget(). + @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruGetNextTarget ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target + ) +{ + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + LIST_ENTRY *Node; + EFI_ATA_DEVICE_INFO *DeviceInfo; + UINT8 *Target8; + UINT16 *Target16; + + Instance = EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS (This); + + if (Target == NULL || *Target == NULL) { + return EFI_INVALID_PARAMETER; + } + + Target8 = *Target; + Target16 = (UINT16 *)*Target; + + if (CompareMem(Target8, mScsiId, TARGET_MAX_BYTES) != 0) { + // + // For ATAPI device, we use 2 least significant bytes to represent the location of SCSI device. + // So the higher bytes in Target array should be 0xFF. + // + if (CompareMem (&Target8[2], &mScsiId[2], TARGET_MAX_BYTES - 2) != 0) { + return EFI_INVALID_PARAMETER; + } + + // + // When Target is not all 0xFF's, compare 2 least significant bytes with + // previous target id to see if it is returned by previous call. + // + if (*Target16 != Instance->PreviousTargetId) { + return EFI_INVALID_PARAMETER; + } + + // + // Traverse the whole device list to find the next cdrom closed to + // the device signified by Target[0] and Target[1]. + // + // Note that we here use a tricky way to find the next cdrom : + // All ata devices are detected and inserted into the device list + // sequentially. + // + Node = GetFirstNode (&Instance->DeviceList); + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if ((DeviceInfo->Type == EfiIdeCdrom) && + ((Target8[0] < DeviceInfo->Port) || + (Target8[1] < DeviceInfo->PortMultiplier))) { + Target8[0] = (UINT8)DeviceInfo->Port; + Target8[1] = (UINT8)DeviceInfo->PortMultiplier; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } else { + // + // If the array is all 0xFF's, start to traverse the device list from the beginning + // + Node = GetFirstNode (&Instance->DeviceList); + + while (!IsNull (&Instance->DeviceList, Node)) { + DeviceInfo = ATA_ATAPI_DEVICE_INFO_FROM_THIS (Node); + + if (DeviceInfo->Type == EfiIdeCdrom) { + Target8[0] = (UINT8)DeviceInfo->Port; + Target8[1] = (UINT8)DeviceInfo->PortMultiplier; + goto Exit; + } + + Node = GetNextNode (&Instance->DeviceList, Node); + } + + return EFI_NOT_FOUND; + } + +Exit: + // + // Update the PreviousTargetId. + // + Instance->PreviousTargetId = *Target16; + + return EFI_SUCCESS; +} + diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h new file mode 100644 index 0000000000..69e6dc0ebf --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h @@ -0,0 +1,1000 @@ +/** @file + Header file for ATA/ATAPI PASS THRU driver. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ +#ifndef __ATA_ATAPI_PASS_THRU_H__ +#define __ATA_ATAPI_PASS_THRU_H__ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "IdeMode.h" +#include "AhciMode.h" + +extern EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding; +extern EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComponentName; +extern EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2; + +#define ATA_ATAPI_PASS_THRU_SIGNATURE SIGNATURE_32 ('a', 'a', 'p', 't') +#define ATA_ATAPI_DEVICE_SIGNATURE SIGNATURE_32 ('a', 'd', 'e', 'v') + +typedef enum { + EfiAtaIdeMode, + EfiAtaAhciMode, + EfiAtaRaidMode, + EfiAtaUnknownMode +} EFI_ATA_HC_WORK_MODE; + +typedef enum { + EfiIdeCdrom, /* ATAPI CDROM */ + EfiIdeHarddisk, /* Hard Disk */ + EfiPortMultiplier, /* Port Multiplier */ + EfiIdeUnknown +} EFI_ATA_DEVICE_TYPE; + +// +// Ahci mode device info +// +typedef struct { + UINT32 Signature; + LIST_ENTRY Link; + + UINT16 Port; + UINT16 PortMultiplier; + EFI_ATA_DEVICE_TYPE Type; + + EFI_IDENTIFY_DATA *IdentifyData; +} EFI_ATA_DEVICE_INFO; + +typedef struct { + UINT32 Signature; + + EFI_HANDLE ControllerHandle; + EFI_PCI_IO_PROTOCOL *PciIo; + EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit; + + EFI_ATA_PASS_THRU_MODE AtaPassThruMode; + EFI_ATA_PASS_THRU_PROTOCOL AtaPassThru; + EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode; + EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru; + + EFI_ATA_HC_WORK_MODE Mode; + + EFI_IDE_REGISTERS IdeRegisters[EfiIdeMaxChannel]; + EFI_AHCI_REGISTERS AhciRegisters; + + // + // The attached device list + // + LIST_ENTRY DeviceList; + UINT64 OriginalPciAttributes; + + // + // For AtaPassThru protocol, using the following bytes to record the previous call in + // GetNextPort()/GetNextDevice(). + // + UINT16 PreviousPort; + UINT16 PreviousPortMultiplier; + // + // For ExtScsiPassThru protocol, using the following bytes to record the previous call in + // GetNextTarget()/GetNextTargetLun(). + // + UINT16 PreviousTargetId; + UINT64 PreviousLun; + +} ATA_ATAPI_PASS_THRU_INSTANCE; + +// +// Timeout value which uses 100ns as a unit. +// It means 3 second span. +// +#define ATA_ATAPI_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3) + +#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0) + +#define ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS(a) \ + CR (a, \ + ATA_ATAPI_PASS_THRU_INSTANCE, \ + AtaPassThru, \ + ATA_ATAPI_PASS_THRU_SIGNATURE \ + ) + +#define EXT_SCSI_PASS_THRU_PRIVATE_DATA_FROM_THIS(a) \ + CR (a, \ + ATA_ATAPI_PASS_THRU_INSTANCE, \ + ExtScsiPassThru, \ + ATA_ATAPI_PASS_THRU_SIGNATURE \ + ) + +#define ATA_ATAPI_DEVICE_INFO_FROM_THIS(a) \ + CR (a, \ + EFI_ATA_DEVICE_INFO, \ + Link, \ + ATA_ATAPI_DEVICE_SIGNATURE \ + ); +/** + Retrieves a Unicode string that is the user readable name of the driver. + + This function retrieves the user readable name of a driver in the form of a + Unicode string. If the driver specified by This has a user readable name in + the language specified by Language, then a pointer to the driver name is + returned in DriverName, and EFI_SUCCESS is returned. If the driver specified + by This does not support the language specified by Language, + then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified + in RFC 4646 or ISO 639-2 language code format. + + @param DriverName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by + This and the language specified by Language was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by a driver. + + This function retrieves the user readable name of the controller specified by + ControllerHandle and ChildHandle in the form of a Unicode string. If the + driver specified by This has a user readable name in the language specified by + Language, then a pointer to the controller name is returned in ControllerName, + and EFI_SUCCESS is returned. If the driver specified by This is not currently + managing the controller specified by ControllerHandle and ChildHandle, + then EFI_UNSUPPORTED is returned. If the driver specified by This does not + support the language specified by Language, then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param ControllerHandle[in] The handle of a controller that the driver + specified by This is managing. This handle + specifies the controller whose name is to be + returned. + + @param ChildHandle[in] The handle of the child controller to retrieve + the name of. This is an optional parameter that + may be NULL. It will be NULL for device + drivers. It will also be NULL for a bus drivers + that wish to retrieve the name of the bus + controller. It will not be NULL for a bus + driver that wishes to retrieve the name of a + child controller. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified in + RFC 4646 or ISO 639-2 language code format. + + @param ControllerName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + controller specified by ControllerHandle and + ChildHandle in the language specified by + Language from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in + the language specified by Language for the + driver specified by This was returned in + DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid + EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + +/** + Tests to see if this driver supports a given controller. If a child device is provided, + it further tests to see if this driver supports creating a handle for the specified child device. + + This function checks to see if the driver specified by This supports the device specified by + ControllerHandle. Drivers will typically use the device path attached to + ControllerHandle and/or the services from the bus I/O abstraction attached to + ControllerHandle to determine if the driver supports ControllerHandle. This function + may be called many times during platform initialization. In order to reduce boot times, the tests + performed by this function must be very small, and take as little time as possible to execute. This + function must not change the state of any hardware devices, and this function must be aware that the + device specified by ControllerHandle may already be managed by the same driver or a + different driver. This function must match its calls to AllocatePages() with FreePages(), + AllocatePool() with FreePool(), and OpenProtocol() with CloseProtocol(). + Because ControllerHandle may have been previously started by the same driver, if a protocol is + already in the opened state, then it must not be closed with CloseProtocol(). This is required + to guarantee the state of ControllerHandle is not modified by this function. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle The handle of the controller to test. This handle + must support a protocol interface that supplies + an I/O abstraction to the driver. + @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This + parameter is ignored by device drivers, and is optional for bus + drivers. For bus drivers, if this parameter is not NULL, then + the bus driver must determine if the bus controller specified + by ControllerHandle and the child controller specified + by RemainingDevicePath are both supported by this + bus driver. + + @retval EFI_SUCCESS The device specified by ControllerHandle and + RemainingDevicePath is supported by the driver specified by This. + @retval EFI_ALREADY_STARTED The device specified by ControllerHandle and + RemainingDevicePath is already being managed by the driver + specified by This. + @retval EFI_ACCESS_DENIED The device specified by ControllerHandle and + RemainingDevicePath is already being managed by a different + driver or an application that requires exclusive access. + Currently not implemented. + @retval EFI_UNSUPPORTED The device specified by ControllerHandle and + RemainingDevicePath is not supported by the driver specified by This. +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ); + +/** + Starts a device controller or a bus controller. + + The Start() function is designed to be invoked from the EFI boot service ConnectController(). + As a result, much of the error checking on the parameters to Start() has been moved into this + common boot service. It is legal to call Start() from other locations, + but the following calling restrictions must be followed, or the system behavior will not be deterministic. + 1. ControllerHandle must be a valid EFI_HANDLE. + 2. If RemainingDevicePath is not NULL, then it must be a pointer to a naturally aligned + EFI_DEVICE_PATH_PROTOCOL. + 3. Prior to calling Start(), the Supported() function for the driver specified by This must + have been called with the same calling parameters, and Supported() must have returned EFI_SUCCESS. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle The handle of the controller to start. This handle + must support a protocol interface that supplies + an I/O abstraction to the driver. + @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This + parameter is ignored by device drivers, and is optional for bus + drivers. For a bus driver, if this parameter is NULL, then handles + for all the children of Controller are created by this driver. + If this parameter is not NULL and the first Device Path Node is + not the End of Device Path Node, then only the handle for the + child device specified by the first Device Path Node of + RemainingDevicePath is created by this driver. + If the first Device Path Node of RemainingDevicePath is + the End of Device Path Node, no child handle is created by this + driver. + + @retval EFI_SUCCESS The device was started. + @retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. + @retval Others The driver failded to start the device. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ); + +/** + Stops a device controller or a bus controller. + + The Stop() function is designed to be invoked from the EFI boot service DisconnectController(). + As a result, much of the error checking on the parameters to Stop() has been moved + into this common boot service. It is legal to call Stop() from other locations, + but the following calling restrictions must be followed, or the system behavior will not be deterministic. + 1. ControllerHandle must be a valid EFI_HANDLE that was used on a previous call to this + same driver's Start() function. + 2. The first NumberOfChildren handles of ChildHandleBuffer must all be a valid + EFI_HANDLE. In addition, all of these handles must have been created in this driver's + Start() function, and the Start() function must have called OpenProtocol() on + ControllerHandle with an Attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance. + @param[in] ControllerHandle A handle to the device being stopped. The handle must + support a bus specific I/O protocol for the driver + to use to stop the device. + @param[in] NumberOfChildren The number of child device handles in ChildHandleBuffer. + @param[in] ChildHandleBuffer An array of child handles to be freed. May be NULL + if NumberOfChildren is 0. + + @retval EFI_SUCCESS The device was stopped. + @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ); + +/** + Traverse the attached ATA devices list to find out the device to access. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + @param[in] Port The port number of the ATA device to send the command. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to send the command. + If there is no port multiplier, then specify 0. + @param[in] DeviceType The device type of the ATA device. + + @retval The pointer to the data structure of the device info to access. + +**/ +LIST_ENTRY * +EFIAPI +SearchDeviceInfoList ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT16 Port, + IN UINT16 PortMultiplier, + IN EFI_ATA_DEVICE_TYPE DeviceType + ); + +/** + Allocate device info data structure to contain device info. + And insert the data structure to the tail of device list for tracing. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + @param[in] Port The port number of the ATA device to send the command. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to send the command. + If there is no port multiplier, then specify 0. + @param[in] DeviceType The device type of the ATA device. + @param[in] IdentifyData The data buffer to store the output of the IDENTIFY cmd. + + @retval EFI_SUCCESS Successfully insert the ata device to the tail of device list. + @retval EFI_OUT_OF_RESOURCES Can not allocate enough resource for use. + +**/ +EFI_STATUS +EFIAPI +CreateNewDeviceInfo ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT16 Port, + IN UINT16 PortMultiplier, + IN EFI_ATA_DEVICE_TYPE DeviceType, + IN EFI_IDENTIFY_DATA *IdentifyData + ); + +/** + Destroy all attached ATA devices info. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + +**/ +VOID +EFIAPI +DestroyDeviceInfoList ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ); + +/** + Enumerate all attached ATA devices at IDE mode or AHCI mode separately. + + The function is designed to enumerate all attached ATA devices. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + + @retval EFI_SUCCESS Successfully enumerate attached ATA devices. + @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error. + +**/ +EFI_STATUS +EFIAPI +EnumerateAttachedDevice ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ); + +/** + Sends an ATA command to an ATA device that is attached to the ATA controller. This function + supports both blocking I/O and non-blocking I/O. The blocking I/O functionality is required, + and the non-blocking I/O functionality is optional. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port The port number of the ATA device to send the command. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to send the command. + If there is no port multiplier, then specify 0. + @param[in, out] Packet A pointer to the ATA command to send to the ATA device specified by Port + and PortMultiplierPort. + @param[in] Event If non-blocking I/O is not supported then Event is ignored, and blocking + I/O is performed. If Event is NULL, then blocking I/O is performed. If + Event is not NULL and non blocking I/O is supported, then non-blocking + I/O is performed, and Event will be signaled when the ATA command completes. + + @retval EFI_SUCCESS The ATA command was sent by the host. For bi-directional commands, + InTransferLength bytes were transferred from InDataBuffer. For write and + bi-directional commands, OutTransferLength bytes were transferred by OutDataBuffer. + @retval EFI_BAD_BUFFER_SIZE The ATA command was not executed. The number of bytes that could be transferred + is returned in InTransferLength. For write and bi-directional commands, + OutTransferLength bytes were transferred by OutDataBuffer. + @retval EFI_NOT_READY The ATA command could not be sent because there are too many ATA commands + already queued. The caller may retry again later. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the ATA command. + @retval EFI_INVALID_PARAMETER Port, PortMultiplierPort, or the contents of Acb are invalid. The ATA + command was not sent, so no additional status information is available. + +**/ +EFI_STATUS +AtaPassThruPassThru ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN UINT16 PortMultiplierPort, + IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet, + IN EFI_EVENT Event OPTIONAL + ); + +/** + Used to retrieve the list of legal port numbers for ATA devices on an ATA controller. + These can either be the list of ports where ATA devices are actually present or the + list of legal port numbers for the ATA controller. Regardless, the caller of this + function must probe the port number returned to see if an ATA device is actually + present at that location on the ATA controller. + + The GetNextPort() function retrieves the port number on an ATA controller. If on input + Port is 0xFFFF, then the port number of the first port on the ATA controller is returned + in Port and EFI_SUCCESS is returned. + + If Port is a port number that was returned on a previous call to GetNextPort(), then the + port number of the next port on the ATA controller is returned in Port, and EFI_SUCCESS + is returned. If Port is not 0xFFFF and Port was not returned on a previous call to + GetNextPort(), then EFI_INVALID_PARAMETER is returned. + + If Port is the port number of the last port on the ATA controller, then EFI_NOT_FOUND is + returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in, out] Port On input, a pointer to the port number on the ATA controller. + On output, a pointer to the next port number on the ATA + controller. An input value of 0xFFFF retrieves the first port + number on the ATA controller. + + @retval EFI_SUCCESS The next port number on the ATA controller was returned in Port. + @retval EFI_NOT_FOUND There are no more ports on this ATA controller. + @retval EFI_INVALID_PARAMETER Port is not 0xFFFF and Port was not returned on a previous call + to GetNextPort(). + +**/ +EFI_STATUS +AtaPassThruGetNextPort ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN OUT UINT16 *Port + ); + +/** + Used to retrieve the list of legal port multiplier port numbers for ATA devices on a port of an ATA + controller. These can either be the list of port multiplier ports where ATA devices are actually + present on port or the list of legal port multiplier ports on that port. Regardless, the caller of this + function must probe the port number and port multiplier port number returned to see if an ATA + device is actually present. + + The GetNextDevice() function retrieves the port multiplier port number of an ATA device + present on a port of an ATA controller. + + If PortMultiplierPort points to a port multiplier port number value that was returned on a + previous call to GetNextDevice(), then the port multiplier port number of the next ATA device + on the port of the ATA controller is returned in PortMultiplierPort, and EFI_SUCCESS is + returned. + + If PortMultiplierPort points to 0xFFFF, then the port multiplier port number of the first + ATA device on port of the ATA controller is returned in PortMultiplierPort and + EFI_SUCCESS is returned. + + If PortMultiplierPort is not 0xFFFF and the value pointed to by PortMultiplierPort + was not returned on a previous call to GetNextDevice(), then EFI_INVALID_PARAMETER + is returned. + + If PortMultiplierPort is the port multiplier port number of the last ATA device on the port of + the ATA controller, then EFI_NOT_FOUND is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port The port number present on the ATA controller. + @param[in, out] PortMultiplierPort On input, a pointer to the port multiplier port number of an + ATA device present on the ATA controller. + If on input a PortMultiplierPort of 0xFFFF is specified, + then the port multiplier port number of the first ATA device + is returned. On output, a pointer to the port multiplier port + number of the next ATA device present on an ATA controller. + + @retval EFI_SUCCESS The port multiplier port number of the next ATA device on the port + of the ATA controller was returned in PortMultiplierPort. + @retval EFI_NOT_FOUND There are no more ATA devices on this port of the ATA controller. + @retval EFI_INVALID_PARAMETER PortMultiplierPort is not 0xFFFF, and PortMultiplierPort was not + returned on a previous call to GetNextDevice(). + +**/ +EFI_STATUS +AtaPassThruGetNextDevice ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN OUT UINT16 *PortMultiplierPort + ); + +/** + Used to allocate and build a device path node for an ATA device on an ATA controller. + + The BuildDevicePath() function allocates and builds a single device node for the ATA + device specified by Port and PortMultiplierPort. If the ATA device specified by Port and + PortMultiplierPort is not present on the ATA controller, then EFI_NOT_FOUND is returned. + If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned. If there are not enough + resources to allocate the device path node, then EFI_OUT_OF_RESOURCES is returned. + + Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of + DevicePath are initialized to describe the ATA device specified by Port and PortMultiplierPort, + and EFI_SUCCESS is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port Port specifies the port number of the ATA device for which a + device path node is to be allocated and built. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device for which a + device path node is to be allocated and built. If there is no + port multiplier, then specify 0. + @param[in, out] DevicePath A pointer to a single device path node that describes the ATA + device specified by Port and PortMultiplierPort. This function + is responsible for allocating the buffer DevicePath with the + boot service AllocatePool(). It is the caller's responsibility + to free DevicePath when the caller is finished with DevicePath. + @retval EFI_SUCCESS The device path node that describes the ATA device specified by + Port and PortMultiplierPort was allocated and returned in DevicePath. + @retval EFI_NOT_FOUND The ATA device specified by Port and PortMultiplierPort does not + exist on the ATA controller. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath. + +**/ +EFI_STATUS +AtaPassThruBuildDevicePath ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN UINT16 PortMultiplierPort, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ); + +/** + Used to translate a device path node to a port number and port multiplier port number. + + The GetDevice() function determines the port and port multiplier port number associated with + the ATA device described by DevicePath. If DevicePath is a device path node type that the + ATA Pass Thru driver supports, then the ATA Pass Thru driver will attempt to translate the contents + DevicePath into a port number and port multiplier port number. + + If this translation is successful, then that port number and port multiplier port number are returned + in Port and PortMultiplierPort, and EFI_SUCCESS is returned. + + If DevicePath, Port, or PortMultiplierPort are NULL, then EFI_INVALID_PARAMETER is returned. + + If DevicePath is not a device path node type that the ATA Pass Thru driver supports, then + EFI_UNSUPPORTED is returned. + + If DevicePath is a device path node type that the ATA Pass Thru driver supports, but there is not + a valid translation from DevicePath to a port number and port multiplier port number, then + EFI_NOT_FOUND is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] DevicePath A pointer to the device path node that describes an ATA device on the + ATA controller. + @param[out] Port On return, points to the port number of an ATA device on the ATA controller. + @param[out] PortMultiplierPort On return, points to the port multiplier port number of an ATA device + on the ATA controller. + + @retval EFI_SUCCESS DevicePath was successfully translated to a port number and port multiplier + port number, and they were returned in Port and PortMultiplierPort. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_INVALID_PARAMETER Port is NULL. + @retval EFI_INVALID_PARAMETER PortMultiplierPort is NULL. + @retval EFI_UNSUPPORTED This driver does not support the device path node type in DevicePath. + @retval EFI_NOT_FOUND A valid translation from DevicePath to a port number and port multiplier + port number does not exist. +**/ +EFI_STATUS +AtaPassThruGetDevice ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + OUT UINT16 *Port, + OUT UINT16 *PortMultiplierPort + ); + +/** + Resets a specific port on the ATA controller. This operation also resets all the ATA devices + connected to the port. + + The ResetChannel() function resets an a specific port on an ATA controller. This operation + resets all the ATA devices connected to that port. If this ATA controller does not support + a reset port operation, then EFI_UNSUPPORTED is returned. + + If a device error occurs while executing that port reset operation, then EFI_DEVICE_ERROR is + returned. + + If a timeout occurs during the execution of the port reset operation, then EFI_TIMEOUT is returned. + + If the port reset operation is completed, then EFI_SUCCESS is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port The port number on the ATA controller. + + @retval EFI_SUCCESS The ATA controller port was reset. + @retval EFI_UNSUPPORTED The ATA controller does not support a port reset operation. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the ATA port. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the ATA port. + +**/ +EFI_STATUS +AtaPassThruResetPort ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port + ); + +/** + Resets an ATA device that is connected to an ATA controller. + + The ResetDevice() function resets the ATA device specified by Port and PortMultiplierPort. + If this ATA controller does not support a device reset operation, then EFI_UNSUPPORTED is + returned. + + If Port or PortMultiplierPort are not in a valid range for this ATA controller, then + EFI_INVALID_PARAMETER is returned. + + If a device error occurs while executing that device reset operation, then EFI_DEVICE_ERROR + is returned. + + If a timeout occurs during the execution of the device reset operation, then EFI_TIMEOUT is + returned. + + If the device reset operation is completed, then EFI_SUCCESS is returned. + + @param[in] This A pointer to the EFI_ATA_PASS_THRU_PROTOCOL instance. + @param[in] Port Port represents the port number of the ATA device to be reset. + @param[in] PortMultiplierPort The port multiplier port number of the ATA device to reset. + If there is no port multiplier, then specify 0. + @retval EFI_SUCCESS The ATA device specified by Port and PortMultiplierPort was reset. + @retval EFI_UNSUPPORTED The ATA controller does not support a device reset operation. + @retval EFI_INVALID_PARAMETER Port or PortMultiplierPort are invalid. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the ATA device + specified by Port and PortMultiplierPort. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the ATA device + specified by Port and PortMultiplierPort. + +**/ +EFI_STATUS +AtaPassThruResetDevice ( + IN EFI_ATA_PASS_THRU_PROTOCOL *This, + IN UINT16 Port, + IN UINT16 PortMultiplierPort + ); + +/** + Sends a SCSI Request Packet to a SCSI device that is attached to the SCSI channel. This function + supports both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the + nonblocking I/O functionality is optional. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target The Target is an array of size TARGET_MAX_BYTES and it represents + the id of the SCSI device to send the SCSI Request Packet. Each + transport driver may choose to utilize a subset of this size to suit the needs + of transport target representation. For example, a Fibre Channel driver + may use only 8 bytes (WWN) to represent an FC target. + @param Lun The LUN of the SCSI device to send the SCSI Request Packet. + @param Packet A pointer to the SCSI Request Packet to send to the SCSI device + specified by Target and Lun. + @param Event If nonblocking I/O is not supported then Event is ignored, and blocking + I/O is performed. If Event is NULL, then blocking I/O is performed. If + Event is not NULL and non blocking I/O is supported, then + nonblocking I/O is performed, and Event will be signaled when the + SCSI Request Packet completes. + + @retval EFI_SUCCESS The SCSI Request Packet was sent by the host. For bi-directional + commands, InTransferLength bytes were transferred from + InDataBuffer. For write and bi-directional commands, + OutTransferLength bytes were transferred by + OutDataBuffer. + @retval EFI_BAD_BUFFER_SIZE The SCSI Request Packet was not executed. The number of bytes that + could be transferred is returned in InTransferLength. For write + and bi-directional commands, OutTransferLength bytes were + transferred by OutDataBuffer. + @retval EFI_NOT_READY The SCSI Request Packet could not be sent because there are too many + SCSI Request Packets already queued. The caller may retry again later. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the SCSI Request + Packet. + @retval EFI_INVALID_PARAMETER Target, Lun, or the contents of ScsiRequestPacket are invalid. + @retval EFI_UNSUPPORTED The command described by the SCSI Request Packet is not supported + by the host adapter. This includes the case of Bi-directional SCSI + commands not supported by the implementation. The SCSI Request + Packet was not sent, so no additional status information is available. + @retval EFI_TIMEOUT A timeout occurred while waiting for the SCSI Request Packet to execute. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruPassThru ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet, + IN EFI_EVENT Event OPTIONAL + ); + +/** + Used to retrieve the list of legal Target IDs and LUNs for SCSI devices on a SCSI channel. These + can either be the list SCSI devices that are actually present on the SCSI channel, or the list of legal + Target Ids and LUNs for the SCSI channel. Regardless, the caller of this function must probe the + Target ID and LUN returned to see if a SCSI device is actually present at that location on the SCSI + channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target On input, a pointer to the Target ID (an array of size + TARGET_MAX_BYTES) of a SCSI device present on the SCSI channel. + On output, a pointer to the Target ID (an array of + TARGET_MAX_BYTES) of the next SCSI device present on a SCSI + channel. An input value of 0xF(all bytes in the array are 0xF) in the + Target array retrieves the Target ID of the first SCSI device present on a + SCSI channel. + @param Lun On input, a pointer to the LUN of a SCSI device present on the SCSI + channel. On output, a pointer to the LUN of the next SCSI device present + on a SCSI channel. + + @retval EFI_SUCCESS The Target ID and LUN of the next SCSI device on the SCSI + channel was returned in Target and Lun. + @retval EFI_INVALID_PARAMETER Target array is not all 0xF, and Target and Lun were + not returned on a previous call to GetNextTargetLun(). + @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruGetNextTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target, + IN OUT UINT64 *Lun + ); + +/** + Used to allocate and build a device path node for a SCSI device on a SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target The Target is an array of size TARGET_MAX_BYTES and it specifies the + Target ID of the SCSI device for which a device path node is to be + allocated and built. Transport drivers may chose to utilize a subset of + this size to suit the representation of targets. For example, a Fibre + Channel driver may use only 8 bytes (WWN) in the array to represent a + FC target. + @param Lun The LUN of the SCSI device for which a device path node is to be + allocated and built. + @param DevicePath A pointer to a single device path node that describes the SCSI device + specified by Target and Lun. This function is responsible for + allocating the buffer DevicePath with the boot service + AllocatePool(). It is the caller's responsibility to free + DevicePath when the caller is finished with DevicePath. + + @retval EFI_SUCCESS The device path node that describes the SCSI device specified by + Target and Lun was allocated and returned in + DevicePath. + @retval EFI_INVALID_PARAMETER DevicePath is NULL. + @retval EFI_NOT_FOUND The SCSI devices specified by Target and Lun does not exist + on the SCSI channel. + @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruBuildDevicePath ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ); + +/** + Used to translate a device path node to a Target ID and LUN. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param DevicePath A pointer to a single device path node that describes the SCSI device + on the SCSI channel. + @param Target A pointer to the Target Array which represents the ID of a SCSI device + on the SCSI channel. + @param Lun A pointer to the LUN of a SCSI device on the SCSI channel. + + @retval EFI_SUCCESS DevicePath was successfully translated to a Target ID and + LUN, and they were returned in Target and Lun. + @retval EFI_INVALID_PARAMETER DevicePath or Target or Lun is NULL. + @retval EFI_NOT_FOUND A valid translation from DevicePath to a Target ID and LUN + does not exist. + @retval EFI_UNSUPPORTED This driver does not support the device path node type in + DevicePath. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruGetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + OUT UINT8 **Target, + OUT UINT64 *Lun + ); + +/** + Resets a SCSI channel. This operation resets all the SCSI devices connected to the SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + + @retval EFI_SUCCESS The SCSI channel was reset. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the SCSI channel. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the SCSI channel. + @retval EFI_UNSUPPORTED The SCSI channel does not support a channel reset operation. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruResetChannel ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This + ); + +/** + Resets a SCSI logical unit that is connected to a SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target The Target is an array of size TARGET_MAX_BYTE and it represents the + target port ID of the SCSI device containing the SCSI logical unit to + reset. Transport drivers may chose to utilize a subset of this array to suit + the representation of their targets. + @param Lun The LUN of the SCSI device to reset. + + @retval EFI_SUCCESS The SCSI device specified by Target and Lun was reset. + @retval EFI_INVALID_PARAMETER Target or Lun is NULL. + @retval EFI_TIMEOUT A timeout occurred while attempting to reset the SCSI device + specified by Target and Lun. + @retval EFI_UNSUPPORTED The SCSI channel does not support a target reset operation. + @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the SCSI device + specified by Target and Lun. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruResetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun + ); + +/** + Used to retrieve the list of legal Target IDs for SCSI devices on a SCSI channel. These can either + be the list SCSI devices that are actually present on the SCSI channel, or the list of legal Target IDs + for the SCSI channel. Regardless, the caller of this function must probe the Target ID returned to + see if a SCSI device is actually present at that location on the SCSI channel. + + @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance. + @param Target (TARGET_MAX_BYTES) of a SCSI device present on the SCSI channel. + On output, a pointer to the Target ID (an array of + TARGET_MAX_BYTES) of the next SCSI device present on a SCSI + channel. An input value of 0xF(all bytes in the array are 0xF) in the + Target array retrieves the Target ID of the first SCSI device present on a + SCSI channel. + + @retval EFI_SUCCESS The Target ID of the next SCSI device on the SCSI + channel was returned in Target. + @retval EFI_INVALID_PARAMETER Target or Lun is NULL. + @retval EFI_TIMEOUT Target array is not all 0xF, and Target was not + returned on a previous call to GetNextTarget(). + @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel. + +**/ +EFI_STATUS +EFIAPI +ExtScsiPassThruGetNextTarget ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target + ); + +/** + Initialize ATA host controller at IDE mode. + + The function is designed to initialize ATA host controller. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + +**/ +EFI_STATUS +EFIAPI +IdeModeInitialization ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ); + +/** + Initialize ATA host controller at AHCI mode. + + The function is designed to initialize ATA host controller. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + +**/ +EFI_STATUS +EFIAPI +AhciModeInitialization ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ); + +#endif + diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf new file mode 100644 index 0000000000..be73bd95f3 --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf @@ -0,0 +1,68 @@ +## @file +# AtaAtapiPassThru driver to provide native IDE/AHCI mode support. +# +# This driver installs AtaPassThru and ExtScsiPassThru protocol in each ide/sata controller +# to access to all attached Ata/Atapi devices. +# +# Copyright (c) 2010, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = AtaAtapiPassThruDxe + FILE_GUID = 5E523CB4-D397-4986-87BD-A6DD8B22F455 + MODULE_TYPE = UEFI_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = InitializeAtaAtapiPassThru + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 IPF EBC +# +# DRIVER_BINDING = gAtaAtapiPassThruDriverBinding +# COMPONENT_NAME = gAtaAtapiPassThruComponentName +# COMPONENT_NAME2 = gAtaAtapiPassThruComponentName2 +# +# + +[Sources] + AtaAtapiPassThru.c + AtaAtapiPassThru.h + AhciMode.c + AhciMode.h + IdeMode.c + IdeMode.h + ComponentName.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[LibraryClasses] + DevicePathLib + UefiBootServicesTableLib + MemoryAllocationLib + BaseMemoryLib + UefiLib + BaseLib + UefiDriverEntryPoint + DebugLib + TimerLib + +[Guids] + +[Protocols] + gEfiIdeControllerInitProtocolGuid # BY_START + gEfiAtaPassThruProtocolGuid # BY_START + gEfiExtScsiPassThruProtocolGuid # BY_START + gEfiDevicePathProtocolGuid # TO_START + gEfiPciIoProtocolGuid # TO_START diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c new file mode 100644 index 0000000000..94197261dc --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c @@ -0,0 +1,251 @@ +/** @file + UEFI Component Name(2) protocol implementation for AtaAtapiPassThru driver. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "AtaAtapiPassThru.h" + +// +// Driver name table +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruDriverNameTable[] = { + { "eng;en", L"AtaAtapiPassThru Driver" }, + { NULL , NULL } +}; + +// +// Controller name table +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruIdeControllerNameTable[] = { + { "eng;en", L"IDE Controller" }, + { NULL , NULL } +}; + +GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruAhciControllerNameTable[] = { + { "eng;en", L"AHCI Controller" }, + { NULL , NULL } +}; + +// +// EFI Component Name Protocol +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComponentName = { + AtaAtapiPassThruComponentNameGetDriverName, + AtaAtapiPassThruComponentNameGetControllerName, + "eng" +}; + +// +// EFI Component Name 2 Protocol +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2 = { + (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) AtaAtapiPassThruComponentNameGetDriverName, + (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) AtaAtapiPassThruComponentNameGetControllerName, + "en" +}; + +/** + Retrieves a Unicode string that is the user readable name of the driver. + + This function retrieves the user readable name of a driver in the form of a + Unicode string. If the driver specified by This has a user readable name in + the language specified by Language, then a pointer to the driver name is + returned in DriverName, and EFI_SUCCESS is returned. If the driver specified + by This does not support the language specified by Language, + then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified + in RFC 4646 or ISO 639-2 language code format. + + @param DriverName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by + This and the language specified by Language was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ) +{ + return LookupUnicodeString2 ( + Language, + This->SupportedLanguages, + mAtaAtapiPassThruDriverNameTable, + DriverName, + (BOOLEAN)(This == &gAtaAtapiPassThruComponentName) + ); +} + + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by a driver. + + This function retrieves the user readable name of the controller specified by + ControllerHandle and ChildHandle in the form of a Unicode string. If the + driver specified by This has a user readable name in the language specified by + Language, then a pointer to the controller name is returned in ControllerName, + and EFI_SUCCESS is returned. If the driver specified by This is not currently + managing the controller specified by ControllerHandle and ChildHandle, + then EFI_UNSUPPORTED is returned. If the driver specified by This does not + support the language specified by Language, then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param ControllerHandle[in] The handle of a controller that the driver + specified by This is managing. This handle + specifies the controller whose name is to be + returned. + + @param ChildHandle[in] The handle of the child controller to retrieve + the name of. This is an optional parameter that + may be NULL. It will be NULL for device + drivers. It will also be NULL for a bus drivers + that wish to retrieve the name of the bus + controller. It will not be NULL for a bus + driver that wishes to retrieve the name of a + child controller. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified in + RFC 4646 or ISO 639-2 language code format. + + @param ControllerName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + controller specified by ControllerHandle and + ChildHandle in the language specified by + Language from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in + the language specified by Language for the + driver specified by This was returned in + DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid + EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +AtaAtapiPassThruComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ) +{ + EFI_STATUS Status; + EFI_UNICODE_STRING_TABLE *ControllerNameTable; + VOID *Interface; + ATA_ATAPI_PASS_THRU_INSTANCE *Instance; + + if (Language == NULL || ControllerName == NULL) { + return EFI_INVALID_PARAMETER; + } + + // + // This is a device driver, so ChildHandle must be NULL. + // + if (ChildHandle != NULL) { + return EFI_UNSUPPORTED; + } + + // + // Make sure this driver is currently managing Controller Handle + // + Status = EfiTestManagedDevice ( + ControllerHandle, + gAtaAtapiPassThruDriverBinding.DriverBindingHandle, + &gEfiIdeControllerInitProtocolGuid + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // AtaPassThru and ExtScsiPassThru should also be installed at the controller handle. + // + Status = gBS->OpenProtocol ( + ControllerHandle, + &gEfiAtaPassThruProtocolGuid, + &Interface, + gAtaAtapiPassThruDriverBinding.DriverBindingHandle, + ControllerHandle, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + + Instance = ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS (Interface); + + if (Instance->Mode == EfiAtaIdeMode) { + ControllerNameTable = mAtaAtapiPassThruIdeControllerNameTable; + } else if (Instance->Mode == EfiAtaAhciMode) { + ControllerNameTable = mAtaAtapiPassThruAhciControllerNameTable; + } else { + return EFI_UNSUPPORTED; + } + + return LookupUnicodeString2 ( + Language, + This->SupportedLanguages, + ControllerNameTable, + ControllerName, + (BOOLEAN)(This == &gAtaAtapiPassThruComponentName) + ); +} diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c new file mode 100644 index 0000000000..d3eb940839 --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c @@ -0,0 +1,2524 @@ +/** @file + Header file for AHCI mode of ATA host controller. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "AtaAtapiPassThru.h" + +/** + read a one-byte data from a IDE port. + + @param PciIo The PCI IO protocol instance + @param Port The IDE Port number + + @return the one-byte data read from IDE port +**/ +UINT8 +EFIAPI +IdeReadPortB ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 Port + ) +{ + UINT8 Data; + + ASSERT (PciIo != NULL); + + Data = 0; + // + // perform 1-byte data read from register + // + PciIo->Io.Read ( + PciIo, + EfiPciIoWidthUint8, + EFI_PCI_IO_PASS_THROUGH_BAR, + (UINT64) Port, + 1, + &Data + ); + return Data; +} + +/** + write a 1-byte data to a specific IDE port. + + @param PciIo The PCI IO protocol instance + @param Port The IDE port to be writen + @param Data The data to write to the port +**/ +VOID +EFIAPI +IdeWritePortB ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 Port, + IN UINT8 Data + ) +{ + ASSERT (PciIo != NULL); + + // + // perform 1-byte data write to register + // + PciIo->Io.Write ( + PciIo, + EfiPciIoWidthUint8, + EFI_PCI_IO_PASS_THROUGH_BAR, + (UINT64) Port, + 1, + &Data + ); +} + +/** + write a 1-word data to a specific IDE port. + + @param PciIo PCI IO protocol instance + @param Port The IDE port to be writen + @param Data The data to write to the port +**/ +VOID +EFIAPI +IdeWritePortW ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 Port, + IN UINT16 Data + ) +{ + ASSERT (PciIo != NULL); + + // + // perform 1-word data write to register + // + PciIo->Io.Write ( + PciIo, + EfiPciIoWidthUint16, + EFI_PCI_IO_PASS_THROUGH_BAR, + (UINT64) Port, + 1, + &Data + ); +} + +/** + write a 2-word data to a specific IDE port. + + @param PciIo PCI IO protocol instance + @param Port The IDE port to be writen + @param Data The data to write to the port +**/ +VOID +EFIAPI +IdeWritePortDW ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 Port, + IN UINT32 Data + ) +{ + ASSERT (PciIo != NULL); + + // + // perform 2-word data write to register + // + PciIo->Io.Write ( + PciIo, + EfiPciIoWidthUint32, + EFI_PCI_IO_PASS_THROUGH_BAR, + (UINT64) Port, + 1, + &Data + ); +} + +/** + Write multiple words of data to the IDE data port. + Call the IO abstraction once to do the complete read, + not one word at a time + + @param PciIo Pointer to the EFI_PCI_IO instance + @param Port IO port to read + @param Count No. of UINT16's to read + @param Buffer Pointer to the data buffer for read + +**/ +VOID +EFIAPI +IdeWritePortWMultiple ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 Port, + IN UINTN Count, + IN VOID *Buffer + ) +{ + ASSERT (PciIo != NULL); + ASSERT (Buffer != NULL); + + // + // perform UINT16 data write to the FIFO + // + PciIo->Io.Write ( + PciIo, + EfiPciIoWidthFifoUint16, + EFI_PCI_IO_PASS_THROUGH_BAR, + (UINT64) Port, + Count, + (UINT16 *) Buffer + ); + +} + +/** + Reads multiple words of data from the IDE data port. + Call the IO abstraction once to do the complete read, + not one word at a time + + @param PciIo Pointer to the EFI_PCI_IO instance + @param Port IO port to read + @param Count Number of UINT16's to read + @param Buffer Pointer to the data buffer for read + +**/ +VOID +EFIAPI +IdeReadPortWMultiple ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT16 Port, + IN UINTN Count, + IN VOID *Buffer + ) +{ + ASSERT (PciIo != NULL); + ASSERT (Buffer != NULL); + + // + // Perform UINT16 data read from FIFO + // + PciIo->Io.Read ( + PciIo, + EfiPciIoWidthFifoUint16, + EFI_PCI_IO_PASS_THROUGH_BAR, + (UINT64) Port, + Count, + (UINT16 *) Buffer + ); + +} + +/** + This function is used to analyze the Status Register and print out + some debug information and if there is ERR bit set in the Status + Register, the Error Register's value is also be parsed and print out. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + +**/ +VOID +EFIAPI +DumpAllIdeRegisters ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock + ) +{ + EFI_ATA_STATUS_BLOCK StatusBlock; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + ZeroMem (&StatusBlock, sizeof (EFI_ATA_STATUS_BLOCK)); + + StatusBlock.AtaStatus = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); + StatusBlock.AtaError = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + StatusBlock.AtaSectorCount = IdeReadPortB (PciIo, IdeRegisters->SectorCount); + StatusBlock.AtaSectorCountExp = IdeReadPortB (PciIo, IdeRegisters->SectorCount); + StatusBlock.AtaSectorNumber = IdeReadPortB (PciIo, IdeRegisters->SectorNumber); + StatusBlock.AtaSectorNumberExp = IdeReadPortB (PciIo, IdeRegisters->SectorNumber); + StatusBlock.AtaCylinderLow = IdeReadPortB (PciIo, IdeRegisters->CylinderLsb); + StatusBlock.AtaCylinderLowExp = IdeReadPortB (PciIo, IdeRegisters->CylinderLsb); + StatusBlock.AtaCylinderHigh = IdeReadPortB (PciIo, IdeRegisters->CylinderMsb); + StatusBlock.AtaCylinderHighExp = IdeReadPortB (PciIo, IdeRegisters->CylinderMsb); + StatusBlock.AtaDeviceHead = IdeReadPortB (PciIo, IdeRegisters->Head); + + if (AtaStatusBlock != NULL) { + // + // Dump the content of all ATA registers. + // + CopyMem (AtaStatusBlock, &StatusBlock, sizeof (EFI_ATA_STATUS_BLOCK)); + } + + DEBUG_CODE_BEGIN (); + if ((StatusBlock.AtaStatus & ATA_STSREG_DWF) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Write Fault\n", StatusBlock.AtaStatus)); + } + + if ((StatusBlock.AtaStatus & ATA_STSREG_CORR) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Corrected Data\n", StatusBlock.AtaStatus)); + } + + if ((StatusBlock.AtaStatus & ATA_STSREG_ERR) != 0) { + if ((StatusBlock.AtaError & ATA_ERRREG_BBK) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Bad Block Detected\n", StatusBlock.AtaError)); + } + + if ((StatusBlock.AtaError & ATA_ERRREG_UNC) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Uncorrectable Data\n", StatusBlock.AtaError)); + } + + if ((StatusBlock.AtaError & ATA_ERRREG_MC) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Media Change\n", StatusBlock.AtaError)); + } + + if ((StatusBlock.AtaError & ATA_ERRREG_ABRT) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Abort\n", StatusBlock.AtaError)); + } + + if ((StatusBlock.AtaError & ATA_ERRREG_TK0NF) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Track 0 Not Found\n", StatusBlock.AtaError)); + } + + if ((StatusBlock.AtaError & ATA_ERRREG_AMNF) != 0) { + DEBUG ((EFI_D_ERROR, "CheckRegisterStatus()-- %02x : Error : Address Mark Not Found\n", StatusBlock.AtaError)); + } + } + DEBUG_CODE_END (); +} + +/** + This function is used to analyze the Status Register and print out + some debug information and if there is ERR bit set in the Status + Register, the Error Register's value is also be parsed and print out. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + + @retval EFI_SUCCESS No err information in the Status Register. + @retval EFI_DEVICE_ERROR Any err information in the Status Register. + +**/ +EFI_STATUS +EFIAPI +CheckStatusRegister ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters + ) +{ + EFI_STATUS Status; + UINT8 StatusRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); + + if ((StatusRegister & (ATA_STSREG_ERR | ATA_STSREG_DWF | ATA_STSREG_CORR)) == 0) { + Status = EFI_SUCCESS; + } else { + Status = EFI_DEVICE_ERROR; + } + + return Status; +} + +/** + This function is used to poll for the DRQ bit clear in the Status + Register. DRQ is cleared when the device is finished transferring data. + So this function is called after data transfer is finished. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS DRQ bit clear within the time out. + + @retval EFI_TIMEOUT DRQ bit not clear within the time out. + + @note + Read Status Register will clear interrupt status. + +**/ +EFI_STATUS +EFIAPI +DRQClear ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 StatusRegister; + UINT8 ErrorRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); + + // + // wait for BSY == 0 and DRQ == 0 + // + if ((StatusRegister & (ATA_STSREG_DRQ | ATA_STSREG_BSY)) == 0) { + break; + } + + if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { + ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + + if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) { + return EFI_ABORTED; + } + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} +/** + This function is used to poll for the DRQ bit clear in the Alternate + Status Register. DRQ is cleared when the device is finished + transferring data. So this function is called after data transfer + is finished. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS DRQ bit clear within the time out. + + @retval EFI_TIMEOUT DRQ bit not clear within the time out. + @note Read Alternate Status Register will not clear interrupt status. + +**/ +EFI_STATUS +EFIAPI +DRQClear2 ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 AltRegister; + UINT8 ErrorRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + + // + // wait for BSY == 0 and DRQ == 0 + // + if ((AltRegister & (ATA_STSREG_DRQ | ATA_STSREG_BSY)) == 0) { + break; + } + + if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { + ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + + if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) { + return EFI_ABORTED; + } + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + This function is used to poll for the DRQ bit set in the + Status Register. + DRQ is set when the device is ready to transfer data. So this function + is called after the command is sent to the device and before required + data is transferred. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS DRQ bit set within the time out. + @retval EFI_TIMEOUT DRQ bit not set within the time out. + @retval EFI_ABORTED DRQ bit not set caused by the command abort. + + @note Read Status Register will clear interrupt status. + +**/ +EFI_STATUS +EFIAPI +DRQReady ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 StatusRegister; + UINT8 ErrorRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + // + // read Status Register will clear interrupt + // + StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); + + // + // BSY==0,DRQ==1 + // + if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { + break; + } + + if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { + ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + + if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) { + return EFI_ABORTED; + } + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} +/** + This function is used to poll for the DRQ bit set in the Alternate Status Register. + DRQ is set when the device is ready to transfer data. So this function is called after + the command is sent to the device and before required data is transferred. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS DRQ bit set within the time out. + @retval EFI_TIMEOUT DRQ bit not set within the time out. + @retval EFI_ABORTED DRQ bit not set caused by the command abort. + @note Read Alternate Status Register will not clear interrupt status. + +**/ +EFI_STATUS +EFIAPI +DRQReady2 ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 AltRegister; + UINT8 ErrorRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + + do { + // + // Read Alternate Status Register will not clear interrupt status + // + AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + // + // BSY == 0 , DRQ == 1 + // + if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { + break; + } + + if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { + ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + + if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) { + return EFI_ABORTED; + } + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + This function is used to poll for the DRDY bit set in the Status Register. DRDY + bit is set when the device is ready to accept command. Most ATA commands must be + sent after DRDY set except the ATAPI Packet Command. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS DRDY bit set within the time out. + @retval EFI_TIMEOUT DRDY bit not set within the time out. + + @note Read Status Register will clear interrupt status. +**/ +EFI_STATUS +EFIAPI +DRDYReady ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 StatusRegister; + UINT8 ErrorRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); + // + // BSY == 0 , DRDY == 1 + // + if ((StatusRegister & (ATA_STSREG_DRDY | ATA_STSREG_BSY)) == ATA_STSREG_DRDY) { + break; + } + + if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { + ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + + if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) { + return EFI_ABORTED; + } + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + This function is used to poll for the DRDY bit set in the Alternate Status Register. + DRDY bit is set when the device is ready to accept command. Most ATA commands must + be sent after DRDY set except the ATAPI Packet Command. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS DRDY bit set within the time out. + @retval EFI_TIMEOUT DRDY bit not set within the time out. + + @note Read Alternate Status Register will clear interrupt status. + +**/ +EFI_STATUS +EFIAPI +DRDYReady2 ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 AltRegister; + UINT8 ErrorRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + // + // BSY == 0 , DRDY == 1 + // + if ((AltRegister & (ATA_STSREG_DRDY | ATA_STSREG_BSY)) == ATA_STSREG_DRDY) { + break; + } + + if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { + ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); + + if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) { + return EFI_ABORTED; + } + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + This function is used to poll for the BSY bit clear in the Status Register. BSY + is clear when the device is not busy. Every command must be sent after device is not busy. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS BSY bit clear within the time out. + @retval EFI_TIMEOUT BSY bit not clear within the time out. + + @note Read Status Register will clear interrupt status. +**/ +EFI_STATUS +EFIAPI +WaitForBSYClear ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 StatusRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); + + if ((StatusRegister & ATA_STSREG_BSY) == 0x00) { + break; + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + This function is used to poll for the BSY bit clear in the Status Register. BSY + is clear when the device is not busy. Every command must be sent after device is not busy. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS BSY bit clear within the time out. + @retval EFI_TIMEOUT BSY bit not clear within the time out. + + @note Read Status Register will clear interrupt status. +**/ +EFI_STATUS +EFIAPI +WaitForBSYClear2 ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT32 Delay; + UINT8 AltStatusRegister; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + + Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1); + do { + AltStatusRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + + if ((AltStatusRegister & ATA_STSREG_BSY) == 0x00) { + break; + } + + // + // Stall for 100 microseconds. + // + MicroSecondDelay (100); + + Delay--; + + } while (Delay > 0); + + if (Delay == 0) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +/** + Get IDE i/o port registers' base addresses by mode. + + In 'Compatibility' mode, use fixed addresses. + In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's + Configuration Space. + + The steps to get IDE i/o port registers' base addresses for each channel + as follows: + + 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE + controller's Configuration Space to determine the operating mode. + + 2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below. + ___________________________________________ + | | Command Block | Control Block | + | Channel | Registers | Registers | + |___________|_______________|_______________| + | Primary | 1F0h - 1F7h | 3F6h - 3F7h | + |___________|_______________|_______________| + | Secondary | 170h - 177h | 376h - 377h | + |___________|_______________|_______________| + + Table 1. Compatibility resource mappings + + b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs + in IDE controller's PCI Configuration Space, shown in the Table 2 below. + ___________________________________________________ + | | Command Block | Control Block | + | Channel | Registers | Registers | + |___________|___________________|___________________| + | Primary | BAR at offset 0x10| BAR at offset 0x14| + |___________|___________________|___________________| + | Secondary | BAR at offset 0x18| BAR at offset 0x1C| + |___________|___________________|___________________| + + Table 2. BARs for Register Mapping + + @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance + @param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to + store the IDE i/o port registers' base addresses + + @retval EFI_UNSUPPORTED Return this value when the BARs is not IO type + @retval EFI_SUCCESS Get the Base address successfully + @retval Other Read the pci configureation data error + +**/ +EFI_STATUS +EFIAPI +GetIdeRegisterIoAddr ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN OUT EFI_IDE_REGISTERS *IdeRegisters + ) +{ + EFI_STATUS Status; + PCI_TYPE00 PciData; + UINT16 CommandBlockBaseAddr; + UINT16 ControlBlockBaseAddr; + UINT16 BusMasterBaseAddr; + + if ((PciIo == NULL) || (IdeRegisters == NULL)) { + return EFI_INVALID_PARAMETER; + } + + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint8, + 0, + sizeof (PciData), + &PciData + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + BusMasterBaseAddr = (UINT16) ((PciData.Device.Bar[4] & 0x0000fff0)); + + if ((PciData.Hdr.ClassCode[0] & IDE_PRIMARY_OPERATING_MODE) == 0) { + CommandBlockBaseAddr = 0x1f0; + ControlBlockBaseAddr = 0x3f6; + } else { + // + // The BARs should be of IO type + // + if ((PciData.Device.Bar[0] & BIT0) == 0 || + (PciData.Device.Bar[1] & BIT0) == 0) { + return EFI_UNSUPPORTED; + } + + CommandBlockBaseAddr = (UINT16) (PciData.Device.Bar[0] & 0x0000fff8); + ControlBlockBaseAddr = (UINT16) ((PciData.Device.Bar[1] & 0x0000fffc) + 2); + } + + // + // Calculate IDE primary channel I/O register base address. + // + IdeRegisters[EfiIdePrimary].Data = CommandBlockBaseAddr; + IdeRegisters[EfiIdePrimary].ErrOrFeature = (UINT16) (CommandBlockBaseAddr + 0x01); + IdeRegisters[EfiIdePrimary].SectorCount = (UINT16) (CommandBlockBaseAddr + 0x02); + IdeRegisters[EfiIdePrimary].SectorNumber = (UINT16) (CommandBlockBaseAddr + 0x03); + IdeRegisters[EfiIdePrimary].CylinderLsb = (UINT16) (CommandBlockBaseAddr + 0x04); + IdeRegisters[EfiIdePrimary].CylinderMsb = (UINT16) (CommandBlockBaseAddr + 0x05); + IdeRegisters[EfiIdePrimary].Head = (UINT16) (CommandBlockBaseAddr + 0x06); + IdeRegisters[EfiIdePrimary].CmdOrStatus = (UINT16) (CommandBlockBaseAddr + 0x07); + IdeRegisters[EfiIdePrimary].AltOrDev = ControlBlockBaseAddr; + IdeRegisters[EfiIdePrimary].BusMasterBaseAddr = BusMasterBaseAddr; + + if ((PciData.Hdr.ClassCode[0] & IDE_SECONDARY_OPERATING_MODE) == 0) { + CommandBlockBaseAddr = 0x170; + ControlBlockBaseAddr = 0x376; + } else { + // + // The BARs should be of IO type + // + if ((PciData.Device.Bar[2] & BIT0) == 0 || + (PciData.Device.Bar[3] & BIT0) == 0) { + return EFI_UNSUPPORTED; + } + + CommandBlockBaseAddr = (UINT16) (PciData.Device.Bar[2] & 0x0000fff8); + ControlBlockBaseAddr = (UINT16) ((PciData.Device.Bar[3] & 0x0000fffc) + 2); + } + + // + // Calculate IDE secondary channel I/O register base address. + // + IdeRegisters[EfiIdeSecondary].Data = CommandBlockBaseAddr; + IdeRegisters[EfiIdeSecondary].ErrOrFeature = (UINT16) (CommandBlockBaseAddr + 0x01); + IdeRegisters[EfiIdeSecondary].SectorCount = (UINT16) (CommandBlockBaseAddr + 0x02); + IdeRegisters[EfiIdeSecondary].SectorNumber = (UINT16) (CommandBlockBaseAddr + 0x03); + IdeRegisters[EfiIdeSecondary].CylinderLsb = (UINT16) (CommandBlockBaseAddr + 0x04); + IdeRegisters[EfiIdeSecondary].CylinderMsb = (UINT16) (CommandBlockBaseAddr + 0x05); + IdeRegisters[EfiIdeSecondary].Head = (UINT16) (CommandBlockBaseAddr + 0x06); + IdeRegisters[EfiIdeSecondary].CmdOrStatus = (UINT16) (CommandBlockBaseAddr + 0x07); + IdeRegisters[EfiIdeSecondary].AltOrDev = ControlBlockBaseAddr; + IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = BusMasterBaseAddr + 0x8; + + return EFI_SUCCESS; +} + +/** + This function is used to implement the Soft Reset on the specified device. But, + the ATA Soft Reset mechanism is so strong a reset method that it will force + resetting on both devices connected to the same cable. + + It is called by IdeBlkIoReset(), a interface function of Block + I/O protocol. + + This function can also be used by the ATAPI device to perform reset when + ATAPI Reset command is failed. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS Soft reset completes successfully. + @retval EFI_DEVICE_ERROR Any step during the reset process is failed. + + @note The registers initial values after ATA soft reset are different + to the ATA device and ATAPI device. +**/ +EFI_STATUS +EFIAPI +AtaSoftReset ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT64 Timeout + ) +{ + UINT8 DeviceControl; + + DeviceControl = 0; + // + // disable Interrupt and set SRST bit to initiate soft reset + // + DeviceControl = ATA_CTLREG_SRST | ATA_CTLREG_IEN_L; + + IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl); + + // + // SRST should assert for at least 5 us, we use 10 us for + // better compatibility + // + MicroSecondDelay (10); + + // + // Enable interrupt to support UDMA, and clear SRST bit + // + DeviceControl = 0; + IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl); + + // + // Wait for at least 10 ms to check BSY status, we use 10 ms + // for better compatibility + // + MicroSecondDelay (10000); + + // + // slave device needs at most 31ms to clear BSY + // + if (WaitForBSYClear (PciIo, IdeRegisters, Timeout) == EFI_TIMEOUT) { + return EFI_DEVICE_ERROR; + } + + return EFI_SUCCESS; +} + +/** + Send ATA Ext command into device with NON_DATA protocol. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS Reading succeed + @retval EFI_DEVICE_ERROR Error executing commands on this device. + +**/ +EFI_STATUS +EFIAPI +AtaIssueCommand ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINT8 DeviceHead; + UINT8 AtaCommand; + + ASSERT (PciIo != NULL); + ASSERT (IdeRegisters != NULL); + ASSERT (AtaCommandBlock != NULL); + + DeviceHead = AtaCommandBlock->AtaDeviceHead; + AtaCommand = AtaCommandBlock->AtaCommand; + + Status = WaitForBSYClear (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + // + // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility) + // + IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8) (0xe0 | DeviceHead)); + + // + // set all the command parameters + // Before write to all the following registers, BSY and DRQ must be 0. + // + Status = DRQClear2 (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + // + // Fill the feature register, which is a two-byte FIFO. Need write twice. + // + IdeWritePortB (PciIo, IdeRegisters->ErrOrFeature, AtaCommandBlock->AtaFeaturesExp); + IdeWritePortB (PciIo, IdeRegisters->ErrOrFeature, AtaCommandBlock->AtaFeatures); + + // + // Fill the sector count register, which is a two-byte FIFO. Need write twice. + // + IdeWritePortB (PciIo, IdeRegisters->SectorCount, AtaCommandBlock->AtaSectorCountExp); + IdeWritePortB (PciIo, IdeRegisters->SectorCount, AtaCommandBlock->AtaSectorCount); + + // + // Fill the start LBA registers, which are also two-byte FIFO + // + IdeWritePortB (PciIo, IdeRegisters->SectorNumber, AtaCommandBlock->AtaSectorNumberExp); + IdeWritePortB (PciIo, IdeRegisters->SectorNumber, AtaCommandBlock->AtaSectorNumber); + + IdeWritePortB (PciIo, IdeRegisters->CylinderLsb, AtaCommandBlock->AtaCylinderLowExp); + IdeWritePortB (PciIo, IdeRegisters->CylinderLsb, AtaCommandBlock->AtaCylinderLow); + + IdeWritePortB (PciIo, IdeRegisters->CylinderMsb, AtaCommandBlock->AtaCylinderHighExp); + IdeWritePortB (PciIo, IdeRegisters->CylinderMsb, AtaCommandBlock->AtaCylinderHigh); + + // + // Send command via Command Register + // + IdeWritePortB (PciIo, IdeRegisters->CmdOrStatus, AtaCommand); + + // + // Stall at least 400 microseconds. + // + MicroSecondDelay (400); + + return EFI_SUCCESS; +} + +/** + This function is used to send out ATA commands conforms to the PIO Data In Protocol. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Buffer A pointer to the source buffer for the data. + @param ByteCount The length of the data. + @param Read Flag used to determine the data transfer direction. + Read equals 1, means data transferred from device to host; + Read equals 0, means data transferred from host to device. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS send out the ATA command and device send required data successfully. + @retval EFI_DEVICE_ERROR command sent failed. + +**/ +EFI_STATUS +EFIAPI +AtaPioDataInOut ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN OUT VOID *Buffer, + IN UINT64 ByteCount, + IN BOOLEAN Read, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ) +{ + UINTN WordCount; + UINTN Increment; + UINT16 *Buffer16; + EFI_STATUS Status; + + if ((PciIo == NULL) || (IdeRegisters == NULL) || (Buffer == NULL) || (AtaCommandBlock == NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // Issue ATA command + // + Status = AtaIssueCommand (PciIo, IdeRegisters, AtaCommandBlock, Timeout); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + + Buffer16 = (UINT16 *) Buffer; + + // + // According to PIO data in protocol, host can perform a series of reads to + // the data register after each time device set DRQ ready; + // The data size of "a series of read" is command specific. + // For most ATA command, data size received from device will not exceed + // 1 sector, hence the data size for "a series of read" can be the whole data + // size of one command request. + // For ATA command such as Read Sector command, the data size of one ATA + // command request is often larger than 1 sector, according to the + // Read Sector command, the data size of "a series of read" is exactly 1 + // sector. + // Here for simplification reason, we specify the data size for + // "a series of read" to 1 sector (256 words) if data size of one ATA command + // request is larger than 256 words. + // + Increment = 256; + + // + // used to record bytes of currently transfered data + // + WordCount = 0; + + while (WordCount < RShiftU64(ByteCount, 1)) { + // + // Poll DRQ bit set, data transfer can be performed only when DRQ is ready + // + Status = DRQReady2 (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + + // + // Get the byte count for one series of read + // + if ((WordCount + Increment) > RShiftU64(ByteCount, 1)) { + Increment = (UINTN)(RShiftU64(ByteCount, 1) - WordCount); + } + + if (Read) { + IdeReadPortWMultiple ( + PciIo, + IdeRegisters->Data, + Increment, + Buffer16 + ); + } else { + IdeWritePortWMultiple ( + PciIo, + IdeRegisters->Data, + Increment, + Buffer16 + ); + } + + Status = CheckStatusRegister (PciIo, IdeRegisters); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + + WordCount += Increment; + Buffer16 += Increment; + } + + Status = DRQClear (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + +Exit: + // + // Dump All Ide registers to ATA_STATUS_BLOCK + // + DumpAllIdeRegisters (PciIo, IdeRegisters, AtaStatusBlock); + + return Status; +} + +/** + Send ATA command into device with NON_DATA protocol + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS Reading succeed + @retval EFI_ABORTED Command failed + @retval EFI_DEVICE_ERROR Device status error. + +**/ +EFI_STATUS +EFIAPI +AtaNonDataCommandIn ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + + if ((PciIo == NULL) || (IdeRegisters == NULL) || (AtaCommandBlock == NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // Issue ATA command + // + Status = AtaIssueCommand (PciIo, IdeRegisters, AtaCommandBlock, Timeout); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + + // + // Wait for command completion + // + Status = WaitForBSYClear (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + + Status = CheckStatusRegister (PciIo, IdeRegisters); + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + +Exit: + // + // Dump All Ide registers to ATA_STATUS_BLOCK + // + DumpAllIdeRegisters (PciIo, IdeRegisters, AtaStatusBlock); + + return Status; +} + + +/** + Perform an ATA Udma operation (Read, ReadExt, Write, WriteExt). + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Read Flag used to determine the data transfer direction. + Read equals 1, means data transferred from device to host; + Read equals 0, means data transferred from host to device. + @param DataBuffer A pointer to the source buffer for the data. + @param DataLength The length of the data. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS the operation is successful. + @retval EFI_OUT_OF_RESOURCES Build PRD table failed + @retval EFI_UNSUPPORTED Unknown channel or operations command + @retval EFI_DEVICE_ERROR Ata command execute failed + +**/ +EFI_STATUS +EFIAPI +AtaUdmaInOut ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN BOOLEAN Read, + IN VOID *DataBuffer, + IN UINT64 DataLength, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ) +{ + EFI_STATUS Status; + UINT16 IoPortForBmic; + UINT16 IoPortForBmis; + UINT16 IoPortForBmid; + + UINT8 RegisterValue; + + EFI_ATA_DMA_PRD *PrdBaseAddr; + UINTN PrdTableNum; + UINTN PrdTableSize; + EFI_PHYSICAL_ADDRESS PrdTableMapAddr; + VOID *PrdTableMap; + + UINTN PageCount; + UINTN ByteCount; + UINTN ByteRemaining; + + UINT8 DeviceControl; + + VOID *BufferMap; + EFI_PHYSICAL_ADDRESS BufferMapAddress; + EFI_PCI_IO_PROTOCOL_OPERATION PciIoOperation; + + UINT8 DeviceHead; + UINT8 AtaCommand; + + Status = EFI_SUCCESS; + PrdBaseAddr = NULL; + + if ((PciIo == NULL) || (IdeRegisters == NULL) || (DataBuffer == NULL) || (AtaCommandBlock == NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // The data buffer should be even alignment + // + if (((UINTN)DataBuffer & 0x1) != 0) { + return EFI_INVALID_PARAMETER; + } + + // + // Calculate the number of PRD entry. + // Every entry in PRD table can specify a 64K memory region. + // + PrdTableNum = (UINTN)(RShiftU64(DataLength, 16) + 1); + + // + // Make sure that the memory region of PRD table is not cross 64K boundary + // + PrdTableSize = PrdTableNum * sizeof (EFI_ATA_DMA_PRD); + if (PrdTableSize > 0x10000) { + return EFI_INVALID_PARAMETER; + } + + // + // Allocate buffer for PRD table initialization. + // + PageCount = EFI_SIZE_TO_PAGES (PrdTableSize); + Status = PciIo->AllocateBuffer ( + PciIo, + AllocateAnyPages, + EfiBootServicesData, + PageCount, + &PrdBaseAddr, + 0 + ); + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + + ByteCount = EFI_PAGES_TO_SIZE (PageCount); + Status = PciIo->Map ( + PciIo, + EfiPciIoOperationBusMasterCommonBuffer, + PrdBaseAddr, + &ByteCount, + &PrdTableMapAddr, + &PrdTableMap + ); + if (EFI_ERROR (Status) || (ByteCount != EFI_PAGES_TO_SIZE (PageCount))) { + // + // If the data length actually mapped is not equal to the requested amount, + // it means the DMA operation may be broken into several discontinuous smaller chunks. + // Can't handle this case. + // + PciIo->FreeBuffer (PciIo, PageCount, PrdBaseAddr); + return EFI_OUT_OF_RESOURCES; + } + + ZeroMem ((VOID *) ((UINTN) PrdBaseAddr), ByteCount); + + // + // Map the host address of DataBuffer to DMA master address. + // + if (Read) { + PciIoOperation = EfiPciIoOperationBusMasterWrite; + } else { + PciIoOperation = EfiPciIoOperationBusMasterRead; + } + + ByteCount = DataLength; + Status = PciIo->Map ( + PciIo, + PciIoOperation, + DataBuffer, + &ByteCount, + &BufferMapAddress, + &BufferMap + ); + if (EFI_ERROR (Status) || (ByteCount != DataLength)) { + PciIo->Unmap (PciIo, PrdTableMap); + PciIo->FreeBuffer (PciIo, PageCount, PrdBaseAddr); + return EFI_OUT_OF_RESOURCES; + } + + // + // According to Ata spec, it requires the buffer address and size to be even. + // + ASSERT ((BufferMapAddress & 0x1) == 0); + ASSERT ((ByteCount & 0x1) == 0); + + // + // Fill the PRD table with appropriate bus master address of data buffer and data length. + // + ByteRemaining = ByteCount; + while (ByteRemaining != 0) { + if (ByteRemaining <= 0x10000) { + PrdBaseAddr->RegionBaseAddr = (UINT32) ((UINTN) BufferMapAddress); + PrdBaseAddr->ByteCount = (UINT16) ByteRemaining; + PrdBaseAddr->EndOfTable = 0x8000; + break; + } + + PrdBaseAddr->RegionBaseAddr = (UINT32) ((UINTN) BufferMapAddress); + PrdBaseAddr->ByteCount = (UINT16) 0x0; + + ByteRemaining -= 0x10000; + BufferMapAddress += 0x10000; + PrdBaseAddr++; + } + + // + // Start to enable the DMA operation + // + DeviceHead = AtaCommandBlock->AtaDeviceHead; + AtaCommand = AtaCommandBlock->AtaCommand; + + IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)(0xe0 | DeviceHead)); + + // + // Enable interrupt to support UDMA + // + DeviceControl = 0; + IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl); + + IoPortForBmic = IdeRegisters->BusMasterBaseAddr + BMIC_OFFSET; + IoPortForBmis = IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET; + IoPortForBmid = IdeRegisters->BusMasterBaseAddr + BMID_OFFSET; + + // + // Read BMIS register and clear ERROR and INTR bit + // + RegisterValue = IdeReadPortB(PciIo, IoPortForBmis); + RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR); + IdeWritePortB(PciIo, IoPortForBmis, RegisterValue); + + // + // Set the base address to BMID register + // + IdeWritePortDW(PciIo, IoPortForBmid, (UINT32)PrdTableMapAddr); + + // + // Set BMIC register to identify the operation direction + // + RegisterValue = IdeReadPortB(PciIo, IoPortForBmic); + if (Read) { + RegisterValue |= BMIC_NREAD; + } else { + RegisterValue &= ~((UINT8) BMIC_NREAD); + } + IdeWritePortB(PciIo, IoPortForBmic, RegisterValue); + + // + // Issue ATA command + // + Status = AtaIssueCommand (PciIo, IdeRegisters, AtaCommandBlock, Timeout); + + if (EFI_ERROR (Status)) { + Status = EFI_DEVICE_ERROR; + goto Exit; + } + + // + // Set START bit of BMIC register + // + RegisterValue = IdeReadPortB(PciIo, IoPortForBmic); + RegisterValue |= BMIC_START; + IdeWritePortB(PciIo, IoPortForBmic, RegisterValue); + + // + // Check the INTERRUPT and ERROR bit of BMIS + // Max transfer number of sectors for one command is 65536(32Mbyte), + // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps). + // So set the variable Count to 2000, for about 2 second Timeout time. + // + Timeout = 2000; + while (TRUE) { + RegisterValue = IdeReadPortB(PciIo, IoPortForBmis); + + if (((RegisterValue & BMIS_ERROR) != 0) || (Timeout == 0)) { + DEBUG ((EFI_D_ERROR, "ATA UDMA operation fails\n")); + Status = EFI_DEVICE_ERROR; + break; + } + + if ((RegisterValue & BMIS_INTERRUPT) != 0) { + Status = EFI_SUCCESS; + break; + } + // + // Stall for 1 milliseconds. + // + MicroSecondDelay (1000); + Timeout--; + } + + // + // Read BMIS register and clear ERROR and INTR bit + // + RegisterValue = IdeReadPortB(PciIo, IoPortForBmis); + RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR); + IdeWritePortB(PciIo, IoPortForBmis, RegisterValue); + + // + // Read Status Register of IDE device to clear interrupt + // + RegisterValue = IdeReadPortB(PciIo, IdeRegisters->CmdOrStatus); + + // + // Clear START bit of BMIC register + // + RegisterValue = IdeReadPortB(PciIo, IoPortForBmic); + RegisterValue &= ~((UINT8) BMIC_START); + IdeWritePortB(PciIo, IoPortForBmic, RegisterValue); + + // + // Disable interrupt of Select device + // + DeviceControl = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + DeviceControl |= ATA_CTLREG_IEN_L; + IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl); + // + // Stall for 10 milliseconds. + // + MicroSecondDelay (10000); + +Exit: + // + // Free all allocated resource + // + PciIo->Unmap (PciIo, PrdTableMap); + PciIo->FreeBuffer (PciIo, PageCount, PrdBaseAddr); + PciIo->Unmap (PciIo, BufferMap); + + // + // Dump All Ide registers to ATA_STATUS_BLOCK + // + DumpAllIdeRegisters (PciIo, IdeRegisters, AtaStatusBlock); + + return Status; +} + +/** + This function reads the pending data in the device. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + + @retval EFI_SUCCESS Successfully read. + @retval EFI_NOT_READY The BSY is set avoiding reading. + +**/ +EFI_STATUS +EFIAPI +AtaPacketReadPendingData ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters + ) +{ + UINT8 AltRegister; + UINT16 TempWordBuffer; + + AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + if ((AltRegister & ATA_STSREG_BSY) == ATA_STSREG_BSY) { + return EFI_NOT_READY; + } + + if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { + TempWordBuffer = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + while ((TempWordBuffer & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { + IdeReadPortWMultiple ( + PciIo, + IdeRegisters->Data, + 1, + &TempWordBuffer + ); + TempWordBuffer = IdeReadPortB (PciIo, IdeRegisters->AltOrDev); + } + } + return EFI_SUCCESS; +} + +/** + This function is called by AtaPacketCommandExecute(). + It is used to transfer data between host and device. The data direction is specified + by the fourth parameter. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Buffer Buffer contained data transferred between host and device. + @param ByteCount Data size in byte unit of the buffer. + @param Read Flag used to determine the data transfer direction. + Read equals 1, means data transferred from device to host; + Read equals 0, means data transferred from host to device. + @param Timeout Timeout value for wait DRQ ready before each data stream's transfer. + + @retval EFI_SUCCESS data is transferred successfully. + @retval EFI_DEVICE_ERROR the device failed to transfer data. +**/ +EFI_STATUS +EFIAPI +AtaPacketReadWrite ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN OUT VOID *Buffer, + IN UINT64 ByteCount, + IN BOOLEAN Read, + IN UINT64 Timeout + ) +{ + UINT32 RequiredWordCount; + UINT32 ActualWordCount; + UINT32 WordCount; + EFI_STATUS Status; + UINT16 *PtrBuffer; + + // + // No data transfer is premitted. + // + if (ByteCount == 0) { + return EFI_SUCCESS; + } + + PtrBuffer = Buffer; + RequiredWordCount = (UINT32)RShiftU64(ByteCount, 1); + // + // ActuralWordCount means the word count of data really transferred. + // + ActualWordCount = 0; + + while (ActualWordCount < RequiredWordCount) { + // + // before each data transfer stream, the host should poll DRQ bit ready, + // to see whether indicates device is ready to transfer data. + // + Status = DRQReady2 (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + CheckStatusRegister (PciIo, IdeRegisters); + return EFI_DEVICE_ERROR; + } + + // + // get current data transfer size from Cylinder Registers. + // + WordCount = IdeReadPortB (PciIo, IdeRegisters->CylinderMsb) << 8; + WordCount = WordCount | IdeReadPortB (PciIo, IdeRegisters->CylinderLsb); + WordCount = WordCount & 0xffff; + WordCount /= 2; + + WordCount = MIN (WordCount, (RequiredWordCount - ActualWordCount)); + + if (Read) { + IdeReadPortWMultiple ( + PciIo, + IdeRegisters->Data, + WordCount, + PtrBuffer + ); + } else { + IdeWritePortWMultiple ( + PciIo, + IdeRegisters->Data, + WordCount, + PtrBuffer + ); + } + + // + // read status register to check whether error happens. + // + Status = CheckStatusRegister (PciIo, IdeRegisters); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + PtrBuffer += WordCount; + ActualWordCount += WordCount; + } + + if (Read) { + // + // In the case where the drive wants to send more data than we need to read, + // the DRQ bit will be set and cause delays from DRQClear2(). + // We need to read data from the drive until it clears DRQ so we can move on. + // + AtaPacketReadPendingData (PciIo, IdeRegisters); + } + + // + // read status register to check whether error happens. + // + Status = CheckStatusRegister (PciIo, IdeRegisters); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + // + // After data transfer is completed, normally, DRQ bit should clear. + // + Status = DRQClear2 (PciIo, IdeRegisters, Timeout); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + return Status; +} + +/** + Sumbit ATAPI request sense command. + + @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance + @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to + store the IDE i/o port registers' base addresses + @param[in] Channel The channel number of device. + @param[in] Device The device number of device. + @param[in] SenseData A pointer to store sense data. + @param[in] SenseDataLength The sense data length. + @param[in] Timeout The timeout value to execute this cmd. + + @retval EFI_SUCCESS Send out the ATAPI packet command successfully. + @retval EFI_DEVICE_ERROR The device failed to send data. + +**/ +EFI_STATUS +EFIAPI +AtaPacketRequestSense ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT8 Channel, + IN UINT8 Device, + IN VOID *SenseData, + IN UINT8 SenseDataLength, + IN UINT64 Timeout + ) +{ + EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET Packet; + UINT8 Cdb[12]; + EFI_STATUS Status; + + ZeroMem (&Packet, sizeof (EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET)); + ZeroMem (Cdb, 12); + + Cdb[0] = ATA_CMD_REQUEST_SENSE; + Cdb[4] = SenseDataLength; + + Packet.Timeout = Timeout; + Packet.Cdb = Cdb; + Packet.CdbLength = 12; + Packet.DataDirection = EFI_EXT_SCSI_DATA_DIRECTION_READ; + Packet.InDataBuffer = SenseData; + Packet.InTransferLength = SenseDataLength; + + Status = AtaPacketCommandExecute (PciIo, IdeRegisters, Channel, Device, &Packet); + + return Status; +} + +/** + This function is used to send out ATAPI commands conforms to the Packet Command + with PIO Data In Protocol. + + @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance + @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to + store the IDE i/o port registers' base addresses + @param[in] Channel The channel number of device. + @param[in] Device The device number of device. + @param[in] Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET data structure. + + @retval EFI_SUCCESS send out the ATAPI packet command successfully + and device sends data successfully. + @retval EFI_DEVICE_ERROR the device failed to send data. + +**/ +EFI_STATUS +EFIAPI +AtaPacketCommandExecute ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet + ) +{ + EFI_STATUS PacketCommandStatus; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + EFI_STATUS Status; + UINT8 Count; + UINT8 PacketCommand[12]; + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + + // + // Fill ATAPI Command Packet according to CDB. + // For Atapi cmd, its length should be less than or equal to 12 bytes. + // + if (Packet->CdbLength > 12) { + return EFI_INVALID_PARAMETER; + } + + ZeroMem (PacketCommand, 12); + CopyMem (PacketCommand, Packet->Cdb, Packet->CdbLength); + + // + // No OVL; No DMA + // + AtaCommandBlock.AtaFeatures = 0x00; + // + // set the transfersize to ATAPI_MAX_BYTE_COUNT to let the device + // determine how many data should be transferred. + // + AtaCommandBlock.AtaCylinderLow = (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff); + AtaCommandBlock.AtaCylinderHigh = (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8); + AtaCommandBlock.AtaDeviceHead = Device << 0x4; + AtaCommandBlock.AtaCommand = ATA_CMD_PACKET; + + IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)(0xe0 | (Device << 0x4))); + // + // Disable interrupt + // + IdeWritePortB (PciIo, IdeRegisters->AltOrDev, ATA_DEFAULT_CTL); + + // + // Issue ATA PACKET command firstly + // + Status = AtaIssueCommand (PciIo, IdeRegisters, &AtaCommandBlock, Packet->Timeout); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = DRQReady (PciIo, IdeRegisters, Packet->Timeout); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Send out ATAPI command packet + // + for (Count = 0; Count < 6; Count++) { + IdeWritePortW (PciIo, IdeRegisters->Data, *((UINT16*)PacketCommand + Count)); + // + // Stall for 10 microseconds. + // + MicroSecondDelay (10); + } + + // + // Read/Write the data of ATAPI Command + // + if (Packet->DataDirection == EFI_EXT_SCSI_DATA_DIRECTION_READ) { + PacketCommandStatus = AtaPacketReadWrite ( + PciIo, + IdeRegisters, + Packet->InDataBuffer, + Packet->InTransferLength, + TRUE, + Packet->Timeout + ); + } else { + PacketCommandStatus = AtaPacketReadWrite ( + PciIo, + IdeRegisters, + Packet->OutDataBuffer, + Packet->OutTransferLength, + FALSE, + Packet->Timeout + ); + } + + if (!EFI_ERROR (PacketCommandStatus)) { + return PacketCommandStatus; + } + + // + // Return SenseData if PacketCommandStatus matches + // the following return codes. + // + if ((PacketCommandStatus == EFI_BAD_BUFFER_SIZE) || + (PacketCommandStatus == EFI_DEVICE_ERROR) || + (PacketCommandStatus == EFI_TIMEOUT)) { + + // + // avoid submit request sense command continuously. + // + if ((Packet->SenseData == NULL) || (((UINT8 *)Packet->Cdb)[0] == ATA_CMD_REQUEST_SENSE)) { + return PacketCommandStatus; + } + + AtaPacketRequestSense ( + PciIo, + IdeRegisters, + Channel, + Device, + Packet->SenseData, + Packet->SenseDataLength, + Packet->Timeout + ); + } + + return PacketCommandStatus; +} + + +/** + Set the calculated Best transfer mode to a detected device. + + @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param Channel The channel number of device. + @param Device The device number of device. + @param TransferMode A pointer to EFI_ATA_TRANSFER_MODE data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + + @retval EFI_SUCCESS Set transfer mode successfully. + @retval EFI_DEVICE_ERROR Set transfer mode failed. + @retval EFI_OUT_OF_RESOURCES Allocate memory failed. + +**/ +EFI_STATUS +EFIAPI +SetDeviceTransferMode ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_ATA_TRANSFER_MODE *TransferMode, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_SET_FEATURES; + AtaCommandBlock.AtaDeviceHead = (UINT8)(Device << 0x4); + AtaCommandBlock.AtaFeatures = 0x03; + AtaCommandBlock.AtaSectorCount = *((UINT8 *)TransferMode); + + // + // Send SET FEATURE command (sub command 0x03) to set pio mode. + // + Status = AtaNonDataCommandIn ( + Instance->PciIo, + &Instance->IdeRegisters[Channel], + &AtaCommandBlock, + AtaStatusBlock, + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + +/** + Set drive parameters for devices not support PACKETS command. + + @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param Channel The channel number of device. + @param Device The device number of device. + @param DriveParameters A pointer to EFI_ATA_DRIVE_PARMS data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + + @retval EFI_SUCCESS Set drive parameter successfully. + @retval EFI_DEVICE_ERROR Set drive parameter failed. + @retval EFI_OUT_OF_RESOURCES Allocate memory failed. + +**/ +EFI_STATUS +EFIAPI +SetDriveParameters ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_ATA_DRIVE_PARMS *DriveParameters, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock + + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_INIT_DRIVE_PARAM; + AtaCommandBlock.AtaSectorCount = DriveParameters->Sector; + AtaCommandBlock.AtaDeviceHead = (UINT8) ((Device << 0x4) + DriveParameters->Heads); + + // + // Send Init drive parameters + // + Status = AtaNonDataCommandIn ( + Instance->PciIo, + &Instance->IdeRegisters[Channel], + &AtaCommandBlock, + AtaStatusBlock, + ATA_ATAPI_TIMEOUT + ); + + // + // Send Set Multiple parameters + // + AtaCommandBlock.AtaCommand = ATA_CMD_SET_MULTIPLE_MODE; + AtaCommandBlock.AtaSectorCount = DriveParameters->MultipleSector; + AtaCommandBlock.AtaDeviceHead = (UINT8)(Device << 0x4); + + Status = AtaNonDataCommandIn ( + Instance->PciIo, + &Instance->IdeRegisters[Channel], + &AtaCommandBlock, + AtaStatusBlock, + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + +/** + Sends out an ATA Identify Command to the specified device. + + This function is called by DiscoverIdeDevice() during its device + identification. It sends out the ATA Identify Command to the + specified device. Only ATA device responses to this command. If + the command succeeds, it returns the Identify data structure which + contains information about the device. This function extracts the + information it needs to fill the IDE_BLK_IO_DEV data structure, + including device type, media block size, media capacity, and etc. + + @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param Channel The channel number of device. + @param Device The device number of device. + @param Buffer A pointer to data buffer which is used to contain IDENTIFY data. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + + @retval EFI_SUCCESS Identify ATA device successfully. + @retval EFI_DEVICE_ERROR ATA Identify Device Command failed or device is not ATA device. + @retval EFI_OUT_OF_RESOURCES Allocate memory failed. +**/ +EFI_STATUS +EFIAPI +AtaIdentify ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT8 Channel, + IN UINT8 Device, + IN OUT EFI_IDENTIFY_DATA *Buffer, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_IDENTIFY_DRIVE; + AtaCommandBlock.AtaDeviceHead = (UINT8)(Device << 0x4); + + Status = AtaPioDataInOut ( + Instance->PciIo, + &Instance->IdeRegisters[Channel], + Buffer, + sizeof (EFI_IDENTIFY_DATA), + TRUE, + &AtaCommandBlock, + AtaStatusBlock, + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + +/** + This function is called by DiscoverIdeDevice() during its device + identification. + Its main purpose is to get enough information for the device media + to fill in the Media data structure of the Block I/O Protocol interface. + + There are 5 steps to reach such objective: + 1. Sends out the ATAPI Identify Command to the specified device. + Only ATAPI device responses to this command. If the command succeeds, + it returns the Identify data structure which filled with information + about the device. Since the ATAPI device contains removable media, + the only meaningful information is the device module name. + 2. Sends out ATAPI Inquiry Packet Command to the specified device. + This command will return inquiry data of the device, which contains + the device type information. + 3. Allocate sense data space for future use. We don't detect the media + presence here to improvement boot performance, especially when CD + media is present. The media detection will be performed just before + each BLK_IO read/write + + @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param Channel The channel number of device. + @param Device The device number of device. + @param Buffer A pointer to data buffer which is used to contain IDENTIFY data. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + + @retval EFI_SUCCESS Identify ATAPI device successfully. + @retval EFI_DEVICE_ERROR ATA Identify Packet Device Command failed or device type + is not supported by this IDE driver. + @retval EFI_OUT_OF_RESOURCES Allocate memory failed. + +**/ +EFI_STATUS +EFIAPI +AtaIdentifyPacket ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT8 Channel, + IN UINT8 Device, + IN OUT EFI_IDENTIFY_DATA *Buffer, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock + ) +{ + EFI_STATUS Status; + EFI_ATA_COMMAND_BLOCK AtaCommandBlock; + + ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK)); + + AtaCommandBlock.AtaCommand = ATA_CMD_IDENTIFY_DEVICE; + AtaCommandBlock.AtaDeviceHead = (UINT8)(Device << 0x4); + + // + // Send ATAPI Identify Command to get IDENTIFY data. + // + Status = AtaPioDataInOut ( + Instance->PciIo, + &Instance->IdeRegisters[Channel], + (VOID *) Buffer, + sizeof (EFI_IDENTIFY_DATA), + TRUE, + &AtaCommandBlock, + AtaStatusBlock, + ATA_ATAPI_TIMEOUT + ); + + return Status; +} + + +/** + This function is used for detect whether the IDE device exists in the + specified Channel as the specified Device Number. + + There is two IDE channels: one is Primary Channel, the other is + Secondary Channel.(Channel is the logical name for the physical "Cable".) + Different channel has different register group. + + On each IDE channel, at most two IDE devices attach, + one is called Device 0 (Master device), the other is called Device 1 + (Slave device). The devices on the same channel co-use the same register + group, so before sending out a command for a specified device via command + register, it is a must to select the current device to accept the command + by set the device number in the Head/Device Register. + + @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeChannel The channel number of device. + + @retval EFI_SUCCESS successfully detects device. + @retval other any failure during detection process will return this value. + +**/ +EFI_STATUS +EFIAPI +DetectAndConfigIdeDevice ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance, + IN UINT8 IdeChannel + ) +{ + EFI_STATUS Status; + UINT8 SectorCountReg; + UINT8 LBALowReg; + UINT8 LBAMidReg; + UINT8 LBAHighReg; + EFI_ATA_DEVICE_TYPE DeviceType; + EFI_IDE_DEVICE IdeDevice; + EFI_IDE_REGISTERS *IdeRegisters; + EFI_IDENTIFY_DATA Buffer; + + EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit; + EFI_PCI_IO_PROTOCOL *PciIo; + + EFI_ATA_COLLECTIVE_MODE *SupportedModes; + EFI_ATA_TRANSFER_MODE TransferMode; + EFI_ATA_DRIVE_PARMS DriveParameters; + + IdeRegisters = &Instance->IdeRegisters[IdeChannel]; + IdeInit = Instance->IdeControllerInit; + PciIo = Instance->PciIo; + + for (IdeDevice = 0; IdeDevice < EfiIdeMaxDevice; IdeDevice++) { + // + // Send ATA Device Execut Diagnostic command. + // This command should work no matter DRDY is ready or not + // + IdeWritePortB (PciIo, IdeRegisters->CmdOrStatus, ATA_CMD_EXEC_DRIVE_DIAG); + + Status = WaitForBSYClear (PciIo, IdeRegisters, 350000000); + if (EFI_ERROR (Status)) { + DEBUG((EFI_D_ERROR, "New detecting method: Send Execute Diagnostic Command: WaitForBSYClear: Status: %d\n", Status)); + continue; + } + + // + // Select Master or Slave device to get the return signature for ATA DEVICE DIAGNOSTIC cmd. + // + IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)((IdeDevice << 4) | 0xe0)); + // + // Stall for 1 milliseconds. + // + MicroSecondDelay (1000); + + SectorCountReg = IdeReadPortB (PciIo, IdeRegisters->SectorCount); + LBALowReg = IdeReadPortB (PciIo, IdeRegisters->SectorNumber); + LBAMidReg = IdeReadPortB (PciIo, IdeRegisters->CylinderLsb); + LBAHighReg = IdeReadPortB (PciIo, IdeRegisters->CylinderMsb); + + // + // Refer to ATA/ATAPI 4 Spec, section 9.1 + // + if ((SectorCountReg == 0x1) && (LBALowReg == 0x1) && (LBAMidReg == 0x0) && (LBAHighReg == 0x0)) { + DeviceType = EfiIdeHarddisk; + } else if ((LBAMidReg == 0x14) && (LBAHighReg == 0xeb)) { + DeviceType = EfiIdeCdrom; + } else { + continue; + } + + // + // Send IDENTIFY cmd to the device to test if it is really attached. + // + if (DeviceType == EfiIdeHarddisk) { + Status = AtaIdentify (Instance, IdeChannel, IdeDevice, &Buffer, NULL); + // + // if identifying ata device is failure, then try to send identify packet cmd. + // + if (EFI_ERROR (Status)) { + DeviceType = EfiIdeCdrom; + Status = AtaIdentifyPacket (Instance, IdeChannel, IdeDevice, &Buffer, NULL); + } + } else { + Status = AtaIdentifyPacket (Instance, IdeChannel, IdeDevice, &Buffer, NULL); + // + // if identifying atapi device is failure, then try to send identify cmd. + // + if (EFI_ERROR (Status)) { + DeviceType = EfiIdeHarddisk; + Status = AtaIdentify (Instance, IdeChannel, IdeDevice, &Buffer, NULL); + } + } + + if (EFI_ERROR (Status)) { + // + // No device is found at this port + // + continue; + } + + DEBUG ((EFI_D_INFO, "[%a] channel [%a] [%a] device\n", + (IdeChannel == 1) ? "secondary" : "primary ", (IdeDevice == 1) ? "slave " : "master", + DeviceType == EfiIdeCdrom ? "cdrom " : "harddisk")); + + // + // Submit identify data to IDE controller init driver + // + IdeInit->SubmitData (IdeInit, IdeChannel, IdeDevice, &Buffer); + + // + // Now start to config ide device parameter and transfer mode. + // + Status = IdeInit->CalculateMode ( + IdeInit, + IdeChannel, + IdeDevice, + &SupportedModes + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Calculate Mode Fail, Status = %r\n", Status)); + continue; + } + + // + // Set best supported PIO mode on this IDE device + // + if (SupportedModes->PioMode.Mode <= EfiAtaPioMode2) { + TransferMode.ModeCategory = EFI_ATA_MODE_DEFAULT_PIO; + } else { + TransferMode.ModeCategory = EFI_ATA_MODE_FLOW_PIO; + } + + TransferMode.ModeNumber = (UINT8) (SupportedModes->PioMode.Mode); + + if (SupportedModes->ExtModeCount == 0){ + Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Set transfer Mode Fail, Status = %r\n", Status)); + continue; + } + } + + // + // Set supported DMA mode on this IDE device. Note that UDMA & MDMA cann't + // be set together. Only one DMA mode can be set to a device. If setting + // DMA mode operation fails, we can continue moving on because we only use + // PIO mode at boot time. DMA modes are used by certain kind of OS booting + // + if (SupportedModes->UdmaMode.Valid) { + TransferMode.ModeCategory = EFI_ATA_MODE_UDMA; + TransferMode.ModeNumber = (UINT8) (SupportedModes->UdmaMode.Mode); + Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Set transfer Mode Fail, Status = %r\n", Status)); + continue; + } + } else if (SupportedModes->MultiWordDmaMode.Valid) { + TransferMode.ModeCategory = EFI_ATA_MODE_MDMA; + TransferMode.ModeNumber = (UINT8) SupportedModes->MultiWordDmaMode.Mode; + Status = SetDeviceTransferMode (Instance, IdeChannel, IdeDevice, &TransferMode, NULL); + + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Set transfer Mode Fail, Status = %r\n", Status)); + continue; + } + } + + // + // Set Parameters for the device: + // 1) Init + // 2) Establish the block count for READ/WRITE MULTIPLE (EXT) command + // + if (DeviceType == EfiIdeHarddisk) { + // + // Init driver parameters + // + DriveParameters.Sector = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->sectors_per_track; + DriveParameters.Heads = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->heads - 1; + DriveParameters.MultipleSector = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->multi_sector_cmd_max_sct_cnt; + + Status = SetDriveParameters (Instance, IdeChannel, IdeDevice, &DriveParameters, NULL); + } + + // + // Set IDE controller Timing Blocks in the PCI Configuration Space + // + IdeInit->SetTiming (IdeInit, IdeChannel, IdeDevice, SupportedModes); + + // + // IDE controller and IDE device timing is configured successfully. + // Now insert the device into device list. + // + Status = CreateNewDeviceInfo (Instance, IdeChannel, IdeDevice, DeviceType, &Buffer); + if (EFI_ERROR (Status)) { + continue; + } + } + return EFI_SUCCESS; +} + + +/** + Initialize ATA host controller at IDE mode. + + The function is designed to initialize ATA host controller. + + @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance. + +**/ +EFI_STATUS +EFIAPI +IdeModeInitialization ( + IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance + ) +{ + BOOLEAN EnumAll; + EFI_STATUS Status; + EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit; + EFI_PCI_IO_PROTOCOL *PciIo; + UINT8 Channel; + UINT8 IdeChannel; + BOOLEAN ChannelEnabled; + UINT8 MaxDevices; + + IdeInit = Instance->IdeControllerInit; + PciIo = Instance->PciIo; + EnumAll = IdeInit->EnumAll; + Channel = IdeInit->ChannelCount; + + // + // Obtain IDE IO port registers' base addresses + // + Status = GetIdeRegisterIoAddr (PciIo, Instance->IdeRegisters); + if (EFI_ERROR (Status)) { + goto ErrorExit; + } + + for (IdeChannel = 0; IdeChannel < Channel; IdeChannel++) { + IdeInit->NotifyPhase (IdeInit, EfiIdeBeforeChannelEnumeration, IdeChannel); + + // + // now obtain channel information fron IdeControllerInit protocol. + // + Status = IdeInit->GetChannelInfo ( + IdeInit, + IdeChannel, + &ChannelEnabled, + &MaxDevices + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "[GetChannel, Status=%x]", Status)); + continue; + } + + if (!ChannelEnabled) { + continue; + } + + ASSERT (MaxDevices <= 2); + // + // Now inform the IDE Controller Init Module. + // + IdeInit->NotifyPhase (IdeInit, EfiIdeBeforeChannelReset, IdeChannel); + + // + // No reset channel function implemented. + // + IdeInit->NotifyPhase (IdeInit, EfiIdeAfterChannelReset, IdeChannel); + + // + // Now inform the IDE Controller Init Module. + // + IdeInit->NotifyPhase (IdeInit, EfiIdeBusBeforeDevicePresenceDetection, IdeChannel); + + // + // Detect all attached ATA devices and set the transfer mode for each device. + // + DetectAndConfigIdeDevice (Instance, IdeChannel); + } + + // + // All configurations done! Notify IdeController to do post initialization + // work such as saving IDE controller PCI settings for S3 resume + // + IdeInit->NotifyPhase (IdeInit, EfiIdeBusPhaseMaximum, 0); + +ErrorExit: + return Status; +} + diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h new file mode 100644 index 0000000000..b9c58c6341 --- /dev/null +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h @@ -0,0 +1,293 @@ +/** @file + Header file for IDE mode of ATA host controller. + + Copyright (c) 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ +#ifndef __ATA_HC_IDE_MODE_H__ +#define __ATA_HC_IDE_MODE_H__ + +typedef enum { + EfiIdePrimary = 0, + EfiIdeSecondary = 1, + EfiIdeMaxChannel = 2 +} EFI_IDE_CHANNEL; + +typedef enum { + EfiIdeMaster = 0, + EfiIdeSlave = 1, + EfiIdeMaxDevice = 2 +} EFI_IDE_DEVICE; + +/// +/// PIO mode definition +/// +typedef enum { + EfiAtaPioModeBelow2, + EfiAtaPioMode2, + EfiAtaPioMode3, + EfiAtaPioMode4 +} EFI_ATA_PIO_MODE; + +// +// Multi word DMA definition +// +typedef enum { + EfiAtaMdmaMode0, + EfiAtaMdmaMode1, + EfiAtaMdmaMode2 +} EFI_ATA_MDMA_MODE; + +// +// UDMA mode definition +// +typedef enum { + EfiAtaUdmaMode0, + EfiAtaUdmaMode1, + EfiAtaUdmaMode2, + EfiAtaUdmaMode3, + EfiAtaUdmaMode4, + EfiAtaUdmaMode5 +} EFI_ATA_UDMA_MODE; + +// +// Bus Master Reg +// +#define BMIC_NREAD BIT3 +#define BMIC_START BIT0 +#define BMIS_INTERRUPT BIT2 +#define BMIS_ERROR BIT1 + +#define BMIC_OFFSET 0x00 +#define BMIS_OFFSET 0x02 +#define BMID_OFFSET 0x04 + +// +// IDE transfer mode +// +#define EFI_ATA_MODE_DEFAULT_PIO 0x00 +#define EFI_ATA_MODE_FLOW_PIO 0x01 +#define EFI_ATA_MODE_MDMA 0x04 +#define EFI_ATA_MODE_UDMA 0x08 + +typedef struct { + UINT32 RegionBaseAddr; + UINT16 ByteCount; + UINT16 EndOfTable; +} EFI_ATA_DMA_PRD; + +typedef struct { + UINT8 ModeNumber : 3; + UINT8 ModeCategory : 5; +} EFI_ATA_TRANSFER_MODE; + +typedef struct { + UINT8 Sector; + UINT8 Heads; + UINT8 MultipleSector; +} EFI_ATA_DRIVE_PARMS; + +// +// IDE registers set +// +typedef struct { + UINT16 Data; + UINT16 ErrOrFeature; + UINT16 SectorCount; + UINT16 SectorNumber; + UINT16 CylinderLsb; + UINT16 CylinderMsb; + UINT16 Head; + UINT16 CmdOrStatus; + UINT16 AltOrDev; + + UINT16 BusMasterBaseAddr; +} EFI_IDE_REGISTERS; + +// +// Bit definitions in Programming Interface byte of the Class Code field +// in PCI IDE controller's Configuration Space +// +#define IDE_PRIMARY_OPERATING_MODE BIT0 +#define IDE_PRIMARY_PROGRAMMABLE_INDICATOR BIT1 +#define IDE_SECONDARY_OPERATING_MODE BIT2 +#define IDE_SECONDARY_PROGRAMMABLE_INDICATOR BIT3 + +/** + Get IDE i/o port registers' base addresses by mode. + + In 'Compatibility' mode, use fixed addresses. + In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's + Configuration Space. + + The steps to get IDE i/o port registers' base addresses for each channel + as follows: + + 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE + controller's Configuration Space to determine the operating mode. + + 2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below. + ___________________________________________ + | | Command Block | Control Block | + | Channel | Registers | Registers | + |___________|_______________|_______________| + | Primary | 1F0h - 1F7h | 3F6h - 3F7h | + |___________|_______________|_______________| + | Secondary | 170h - 177h | 376h - 377h | + |___________|_______________|_______________| + + Table 1. Compatibility resource mappings + + b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs + in IDE controller's PCI Configuration Space, shown in the Table 2 below. + ___________________________________________________ + | | Command Block | Control Block | + | Channel | Registers | Registers | + |___________|___________________|___________________| + | Primary | BAR at offset 0x10| BAR at offset 0x14| + |___________|___________________|___________________| + | Secondary | BAR at offset 0x18| BAR at offset 0x1C| + |___________|___________________|___________________| + + Table 2. BARs for Register Mapping + + @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance + @param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to + store the IDE i/o port registers' base addresses + + @retval EFI_UNSUPPORTED Return this value when the BARs is not IO type + @retval EFI_SUCCESS Get the Base address successfully + @retval Other Read the pci configureation data error + +**/ +EFI_STATUS +EFIAPI +GetIdeRegisterIoAddr ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN OUT EFI_IDE_REGISTERS *IdeRegisters + ); + +/** + This function is used to send out ATAPI commands conforms to the Packet Command + with PIO Data In Protocol. + + @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance + @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to + store the IDE i/o port registers' base addresses + @param[in] Channel The channel number of device. + @param[in] Device The device number of device. + @param[in] Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET data structure. + + @retval EFI_SUCCESS send out the ATAPI packet command successfully + and device sends data successfully. + @retval EFI_DEVICE_ERROR the device failed to send data. + +**/ +EFI_STATUS +EFIAPI +AtaPacketCommandExecute ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN UINT8 Channel, + IN UINT8 Device, + IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet + ); + +/** + Send ATA command into device with NON_DATA protocol + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS Reading succeed + @retval EFI_ABORTED Command failed + @retval EFI_DEVICE_ERROR Device status error. + +**/ +EFI_STATUS +EFIAPI +AtaNonDataCommandIn ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ); + +/** + Perform an ATA Udma operation (Read, ReadExt, Write, WriteExt). + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Read Flag used to determine the data transfer direction. + Read equals 1, means data transferred from device to host; + Read equals 0, means data transferred from host to device. + @param DataBuffer A pointer to the source buffer for the data. + @param DataLength The length of the data. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS the operation is successful. + @retval EFI_OUT_OF_RESOURCES Build PRD table failed + @retval EFI_UNSUPPORTED Unknown channel or operations command + @retval EFI_DEVICE_ERROR Ata command execute failed + +**/ +EFI_STATUS +EFIAPI +AtaUdmaInOut ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN BOOLEAN Read, + IN VOID *DataBuffer, + IN UINT64 DataLength, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ); + +/** + This function is used to send out ATA commands conforms to the PIO Data In Protocol. + + @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure. + @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. + @param Buffer A pointer to the source buffer for the data. + @param ByteCount The length of the data. + @param Read Flag used to determine the data transfer direction. + Read equals 1, means data transferred from device to host; + Read equals 0, means data transferred from host to device. + @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure. + @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure. + @param Timeout The time to complete the command. + + @retval EFI_SUCCESS send out the ATA command and device send required data successfully. + @retval EFI_DEVICE_ERROR command sent failed. + +**/ +EFI_STATUS +EFIAPI +AtaPioDataInOut ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN EFI_IDE_REGISTERS *IdeRegisters, + IN OUT VOID *Buffer, + IN UINT64 ByteCount, + IN BOOLEAN Read, + IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock, + IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock, + IN UINT64 Timeout + ); + + +#endif + -- 2.39.2