From d0778dd754318f7220d923b67af25898df87ed9a Mon Sep 17 00:00:00 2001 From: rsun3 Date: Wed, 2 Sep 2009 06:36:06 +0000 Subject: [PATCH] Add into MdePkg definitions for the EFI SMM CPU Protocol as defined in the PI 1.2 specification. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9224 6f19259b-4bc3-4df7-8a09-765794883524 --- MdePkg/Include/Protocol/SmmCpu.h | 250 +++++++++++++++++++++++++++++++ MdePkg/MdePkg.dec | 17 ++- 2 files changed, 260 insertions(+), 7 deletions(-) create mode 100644 MdePkg/Include/Protocol/SmmCpu.h diff --git a/MdePkg/Include/Protocol/SmmCpu.h b/MdePkg/Include/Protocol/SmmCpu.h new file mode 100644 index 0000000000..4ca762cd6b --- /dev/null +++ b/MdePkg/Include/Protocol/SmmCpu.h @@ -0,0 +1,250 @@ +/** @file + EFI SMM CPU Protocol as defined in the PI 1.2 specification. + + This protocol allows SMM drivers to access architecture-standard registers from any of the CPU + save state areas. In some cases, difference processors provide the same information in the save state, + but not in the same format. These so-called pseudo-registers provide this information in a standard + format. + + Copyright (c) 2009, Intel Corporation + All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _SMM_CPU_H_ +#define _SMM_CPU_H_ + +#include + +#define EFI_SMM_CPU_PROTOCOL_GUID \ + { \ + 0xeb346b97, 0x975f, 0x4a9f, { 0x8b, 0x22, 0xf8, 0xe9, 0x2b, 0xb3, 0xd5, 0x69 } \ + } + +/// +/// Save State register index +/// +typedef enum { + /// + /// x86/X64 standard registers + /// + EFI_SMM_SAVE_STATE_REGISTER_GDTBASE = 4, + EFI_SMM_SAVE_STATE_REGISTER_IDTBASE = 5, + EFI_SMM_SAVE_STATE_REGISTER_LDTBASE = 6, + EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT = 7, + EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT = 8, + EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT = 9, + EFI_SMM_SAVE_STATE_REGISTER_LDTINFO = 10, + EFI_SMM_SAVE_STATE_REGISTER_ES = 20, + EFI_SMM_SAVE_STATE_REGISTER_CS = 21, + EFI_SMM_SAVE_STATE_REGISTER_SS = 22, + EFI_SMM_SAVE_STATE_REGISTER_DS = 23, + EFI_SMM_SAVE_STATE_REGISTER_FS = 24, + EFI_SMM_SAVE_STATE_REGISTER_GS = 25, + EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL = 26, + EFI_SMM_SAVE_STATE_REGISTER_TR_SEL = 27, + EFI_SMM_SAVE_STATE_REGISTER_DR7 = 28, + EFI_SMM_SAVE_STATE_REGISTER_DR6 = 29, + EFI_SMM_SAVE_STATE_REGISTER_R8 = 30, + EFI_SMM_SAVE_STATE_REGISTER_R9 = 31, + EFI_SMM_SAVE_STATE_REGISTER_R10 = 32, + EFI_SMM_SAVE_STATE_REGISTER_R11 = 33, + EFI_SMM_SAVE_STATE_REGISTER_R12 = 34, + EFI_SMM_SAVE_STATE_REGISTER_R13 = 35, + EFI_SMM_SAVE_STATE_REGISTER_R14 = 36, + EFI_SMM_SAVE_STATE_REGISTER_R15 = 37, + EFI_SMM_SAVE_STATE_REGISTER_RAX = 38, + EFI_SMM_SAVE_STATE_REGISTER_RBX = 39, + EFI_SMM_SAVE_STATE_REGISTER_RCX = 40, + EFI_SMM_SAVE_STATE_REGISTER_RDX = 41, + EFI_SMM_SAVE_STATE_REGISTER_RSP = 42, + EFI_SMM_SAVE_STATE_REGISTER_RBP = 43, + EFI_SMM_SAVE_STATE_REGISTER_RSI = 44, + EFI_SMM_SAVE_STATE_REGISTER_RDI = 45, + EFI_SMM_SAVE_STATE_REGISTER_RIP = 46, + EFI_SMM_SAVE_STATE_REGISTER_RFLAGS = 51, + EFI_SMM_SAVE_STATE_REGISTER_CR0 = 52, + EFI_SMM_SAVE_STATE_REGISTER_CR3 = 53, + EFI_SMM_SAVE_STATE_REGISTER_CR4 = 54, + EFI_SMM_SAVE_STATE_REGISTER_FCW = 256, + EFI_SMM_SAVE_STATE_REGISTER_FSW = 257, + EFI_SMM_SAVE_STATE_REGISTER_FTW = 258, + EFI_SMM_SAVE_STATE_REGISTER_OPCODE = 259, + EFI_SMM_SAVE_STATE_REGISTER_FP_EIP = 260, + EFI_SMM_SAVE_STATE_REGISTER_FP_CS = 261, + EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET = 262, + EFI_SMM_SAVE_STATE_REGISTER_FP_DS = 263, + EFI_SMM_SAVE_STATE_REGISTER_MM0 = 264, + EFI_SMM_SAVE_STATE_REGISTER_MM1 = 265, + EFI_SMM_SAVE_STATE_REGISTER_MM2 = 266, + EFI_SMM_SAVE_STATE_REGISTER_MM3 = 267, + EFI_SMM_SAVE_STATE_REGISTER_MM4 = 268, + EFI_SMM_SAVE_STATE_REGISTER_MM5 = 269, + EFI_SMM_SAVE_STATE_REGISTER_MM6 = 270, + EFI_SMM_SAVE_STATE_REGISTER_MM7 = 271, + EFI_SMM_SAVE_STATE_REGISTER_XMM0 = 272, + EFI_SMM_SAVE_STATE_REGISTER_XMM1 = 273, + EFI_SMM_SAVE_STATE_REGISTER_XMM2 = 274, + EFI_SMM_SAVE_STATE_REGISTER_XMM3 = 275, + EFI_SMM_SAVE_STATE_REGISTER_XMM4 = 276, + EFI_SMM_SAVE_STATE_REGISTER_XMM5 = 277, + EFI_SMM_SAVE_STATE_REGISTER_XMM6 = 278, + EFI_SMM_SAVE_STATE_REGISTER_XMM7 = 279, + EFI_SMM_SAVE_STATE_REGISTER_XMM8 = 280, + EFI_SMM_SAVE_STATE_REGISTER_XMM9 = 281, + EFI_SMM_SAVE_STATE_REGISTER_XMM10 = 282, + EFI_SMM_SAVE_STATE_REGISTER_XMM11 = 283, + EFI_SMM_SAVE_STATE_REGISTER_XMM12 = 284, + EFI_SMM_SAVE_STATE_REGISTER_XMM13 = 285, + EFI_SMM_SAVE_STATE_REGISTER_XMM14 = 286, + EFI_SMM_SAVE_STATE_REGISTER_XMM15 = 287, + /// + /// Pseudo-Registers + /// + EFI_SMM_SAVE_STATE_REGISTER_IO = 512, + EFI_SMM_SAVE_STATE_REGISTER_LMA = 513 +} EFI_SMM_SAVE_STATE_REGISTER; + +/// +/// The EFI_SMM_SAVE_STATE_REGISTER_LMA pseudo-register values +/// If the processor acts in 32-bit mode at the time the SMI occurred, the pseudo register value +/// EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT is returned in Buffer. Otherwise, +/// EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT is returned in Buffer. +/// +#define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT 32 +#define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT 64 + +/// +/// Size width of I/O instruction +/// +typedef enum { + EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8 = 0, + EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16 = 1, + EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32 = 2, + EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64 = 3 +} EFI_SMM_SAVE_STATE_IO_WIDTH; + +/// +/// Types of I/O instruction +/// +typedef enum { + EFI_SMM_SAVE_STATE_IO_TYPE_INPUT = 1, + EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT = 2, + EFI_SMM_SAVE_STATE_IO_TYPE_STRING = 4, + EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX = 8 +} EFI_SMM_SAVE_STATE_IO_TYPE; + +/// +/// Structure of the data which is returned when ReadSaveState() is called with +/// EFI_SMM_SAVE_STATE_REGISTER_IO. If there was no I/O then ReadSaveState() will +/// return EFI_NOT_FOUND. +/// +/// This structure describes the I/O operation which was in process when the SMI was generated. +/// +typedef struct _EFI_SMM_SAVE_STATE_IO_INFO { + /// + /// For input instruction (IN, INS), this is data read before the SMI occurred. For output + /// instructions (OUT, OUTS) this is data that was written before the SMI occurred. The + /// width of the data is specified by IoWidth. + /// + /// Note: inconsistency with PI 1.2 spec here. wait for spec update. + /// + UINTN IoData; + /// + /// The I/O port that was being accessed when the SMI was triggered. + /// + UINT16 IoPort; + /// + /// Defines the size width (UINT8, UINT16, UINT32, UINT64) for IoData. + /// + EFI_SMM_SAVE_STATE_IO_WIDTH IoWidth; + /// + /// Defines type of I/O instruction. + /// + EFI_SMM_SAVE_STATE_IO_TYPE IoType; +} EFI_SMM_SAVE_STATE_IO_INFO; + +typedef struct _EFI_SMM_CPU_PROTOCOL EFI_SMM_CPU_PROTOCOL; + +/** + Read data from the CPU save state. + + This function is used to read the specified number of bytes of the specified register from the CPU + save state of the specified CPU and place the value into the buffer. If the CPU does not support the + specified register Register, then EFI_NOT_FOUND should be returned. If the CPU does not + support the specified register width Width, then EFI_INVALID_PARAMETER is returned. + + @param[in] This The EFI_SMM_CPU_PROTOCOL instance. + @param[in] Width The number of bytes to read from the CPU save state. + @param[in] Register Specifies the CPU register to read form the save state. + @param[in] CpuIndex Specifies the zero-based index of the CPU save state. + @param[out] Buffer Upon return, this holds the CPU register value read from the save state. + + @retval EFI_SUCCESS The register was read from Save State. + @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor. + @retval EFI_INVALID_PARAMETER Input parameters are not valid, for example, Processor No or register width + is not correct.This or Buffer is NULL. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SMM_READ_SAVE_STATE)( + IN CONST EFI_SMM_CPU_PROTOCOL *This, + IN UINTN Width, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN CpuIndex, + OUT VOID *Buffer + ); + + +/** + Write data to the CPU save state. + + This function is used to write the specified number of bytes of the specified register to the CPU save + state of the specified CPU and place the value into the buffer. If the CPU does not support the + specified register Register, then EFI_UNSUPPORTED should be returned. If the CPU does not + support the specified register width Width, then EFI_INVALID_PARAMETER is returned. + + @param[in] This The EFI_SMM_CPU_PROTOCOL instance. + @param[in] Width The number of bytes to write to the CPU save state. + @param[in] Register Specifies the CPU register to write to the save state. + @param[in] CpuIndex Specifies the zero-based index of the CPU save state. + @param[in] Buffer Upon entry, this holds the new CPU register value. + + @retval EFI_SUCCESS The register was written to Save State. + @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor. + @retval EFI_INVALID_PARAMETER Input parameters are not valid. For example: + ProcessorIndex or Width is not correct. +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_SMM_WRITE_SAVE_STATE)( + IN CONST EFI_SMM_CPU_PROTOCOL *This, + IN UINTN Width, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN CpuIndex, + IN CONST VOID *Buffer + ); + +/// +/// EFI SMM CPU Protocol provides access to CPU-related information while in SMM. +/// +/// This protocol allows SMM drivers to access architecture-standard registers from any of the CPU +/// save state areas. In some cases, difference processors provide the same information in the save state, +/// but not in the same format. These so-called pseudo-registers provide this information in a standard +/// format. +/// +struct _EFI_SMM_CPU_PROTOCOL { + EFI_SMM_READ_SAVE_STATE ReadSaveState; + EFI_SMM_WRITE_SAVE_STATE WriteSaveState; +}; + +extern EFI_GUID gEfiSmmCpuProtocolGuid; + +#endif + diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 70305b629d..7f386b1869 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -555,10 +555,10 @@ gEfiDiskInfoProtocolGuid = { 0xD432A67F, 0x14DC, 0x484B, { 0xB3, 0xBB, 0x3F, 0x02, 0x91, 0x84, 0x93, 0x27 }} ## Include/Protocol/Smbios.h - gEfiSmbiosProtocolGuid = {0x3583ff6, 0xcb36, 0x4940, {0x94, 0x7e, 0xb9, 0xb3, 0x9f, 0x4a, 0xfa, 0xf7}} + gEfiSmbiosProtocolGuid = {0x3583ff6, 0xcb36, 0x4940, { 0x94, 0x7e, 0xb9, 0xb3, 0x9f, 0x4a, 0xfa, 0xf7}} ## Include/Protocol/S3SaveState.h - gEfiS3SaveStateProtocolGuid = {0xe857caf6, 0xc046, 0x45dc, {0xbe, 0x3f, 0xee, 0x7, 0x65, 0xfb, 0xa8, 0x87}} + gEfiS3SaveStateProtocolGuid = {0xe857caf6, 0xc046, 0x45dc, { 0xbe, 0x3f, 0xee, 0x7, 0x65, 0xfb, 0xa8, 0x87}} ## Include/Protocol/S3SmmSaveState.h gEfiS3SmmSaveStateProtocolGuid = {0x320afe62, 0xe593, 0x49cb, { 0xa9, 0xf1, 0xd4, 0xc2, 0xf4, 0xaf, 0x1, 0x4c}} @@ -579,16 +579,16 @@ gEfiSmmCpuIoProtocolGuid = { 0x3242a9d8, 0xce70, 0x4aa0, { 0x95, 0x5d, 0x5e, 0x7b, 0x14, 0x0d, 0xe4, 0xd2 }} ## Include/Protocol/SmmBase2.h - gEfiSmmBase2ProtocolGuid = { 0xf4ccbfb7, 0xf6e0, 0x47fd, {0x9d, 0xd4, 0x10, 0xa8, 0xf1, 0x50, 0xc1, 0x91 }} + gEfiSmmBase2ProtocolGuid = { 0xf4ccbfb7, 0xf6e0, 0x47fd, { 0x9d, 0xd4, 0x10, 0xa8, 0xf1, 0x50, 0xc1, 0x91 }} ## Include/Protocol/SmmAccess2.h - gEfiSmmAccess2ProtocolGuid = { 0xc2702b74, 0x800c, 0x4131, {0x87, 0x46, 0x8f, 0xb5, 0xb8, 0x9c, 0xe4, 0xac }} + gEfiSmmAccess2ProtocolGuid = { 0xc2702b74, 0x800c, 0x4131, { 0x87, 0x46, 0x8f, 0xb5, 0xb8, 0x9c, 0xe4, 0xac }} ## Include/Protocol/SmmControl2.h - gEfiSmmControl2ProtocolGuid = { 0x843dc720, 0xab1e, 0x42cb, {0x93, 0x57, 0x8a, 0x0, 0x78, 0xf3, 0x56, 0x1b}} + gEfiSmmControl2ProtocolGuid = { 0x843dc720, 0xab1e, 0x42cb, { 0x93, 0x57, 0x8a, 0x0, 0x78, 0xf3, 0x56, 0x1b}} ## Include/Protocol/SmmConfiguration.h - gEfiSmmConfigurationProtocolGuid= { 0x26eeb3de, 0xb689, 0x492e, {0x80, 0xf0, 0xbe, 0x8b, 0xd7, 0xda, 0x4b, 0xa7 }} + gEfiSmmConfigurationProtocolGuid= { 0x26eeb3de, 0xb689, 0x492e, { 0x80, 0xf0, 0xbe, 0x8b, 0xd7, 0xda, 0x4b, 0xa7 }} ## Include/Protocol/SmmReadyToLock.h gEfiSmmReadyToLockProtocolGuid = { 0x47b7fa8c, 0xf4bd, 0x4af6, { 0x82, 0x00, 0x33, 0x30, 0x86, 0xf0, 0xd2, 0xc8 }} @@ -600,7 +600,10 @@ gEfiSmmCommunicationProtocolGuid = { 0xc68ed8e2, 0x9dc6, 0x4cbd, { 0x9d, 0x94, 0xdb, 0x65, 0xac, 0xc5, 0xc3, 0x32 }} ## Include/Protocol/SmmStatusCode.h - gEfiSmmStatusCodeProtocolGuid = { 0x6afd2b77, 0x98c1, 0x4acd, {0xa6, 0xf9, 0x8a, 0x94, 0x39, 0xde, 0xf, 0xb1}} + gEfiSmmStatusCodeProtocolGuid = { 0x6afd2b77, 0x98c1, 0x4acd, { 0xa6, 0xf9, 0x8a, 0x94, 0x39, 0xde, 0xf, 0xb1}} + + ## Include/Protocol/SmmCpu.h + gEfiSmmCpuProtocolGuid = { 0xeb346b97, 0x975f, 0x4a9f, { 0x8b, 0x22, 0xf8, 0xe9, 0x2b, 0xb3, 0xd5, 0x69 }} # # Protocols defined in UEFI2.1/UEFI2.0/EFI1.1 -- 2.39.2