From 67484aed694e7d9dff4ae91df0afeff28898c68a Mon Sep 17 00:00:00 2001 From: Brijesh Singh Date: Thu, 9 Dec 2021 11:27:59 +0800 Subject: [PATCH] OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 Now that both the secrets and cpuid pages are reserved in the HOB, extract the location details through fixed PCD and make it available to the guest OS through the configuration table. Cc: Michael Roth Cc: James Bottomley Cc: Min Xu Cc: Jiewen Yao Cc: Tom Lendacky Cc: Jordan Justen Cc: Ard Biesheuvel Cc: Erdem Aktas Cc: Gerd Hoffmann Acked-by: Gerd Hoffmann Signed-off-by: Brijesh Singh --- OvmfPkg/AmdSevDxe/AmdSevDxe.c | 23 +++++++++++++ OvmfPkg/AmdSevDxe/AmdSevDxe.inf | 7 ++++ .../Guid/ConfidentialComputingSevSnpBlob.h | 33 +++++++++++++++++++ OvmfPkg/OvmfPkg.dec | 1 + 4 files changed, 64 insertions(+) create mode 100644 OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h diff --git a/OvmfPkg/AmdSevDxe/AmdSevDxe.c b/OvmfPkg/AmdSevDxe/AmdSevDxe.c index be26dde71f..662d3c4ccb 100644 --- a/OvmfPkg/AmdSevDxe/AmdSevDxe.c +++ b/OvmfPkg/AmdSevDxe/AmdSevDxe.c @@ -17,8 +17,20 @@ #include #include #include +#include +#include #include +STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION mSnpBootDxeTable = { + SIGNATURE_32 ('A', 'M', 'D', 'E'), + 1, + 0, + (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase), + FixedPcdGet32 (PcdOvmfSnpSecretsSize), + (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase), + FixedPcdGet32 (PcdOvmfCpuidSize), +}; + EFI_STATUS EFIAPI AmdSevDxeEntryPoint ( @@ -135,5 +147,16 @@ AmdSevDxeEntryPoint ( } } + // + // If its SEV-SNP active guest then install the CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB. + // It contains the location for both the Secrets and CPUID page. + // + if (MemEncryptSevSnpIsEnabled ()) { + return gBS->InstallConfigurationTable ( + &gConfidentialComputingSevSnpBlobGuid, + &mSnpBootDxeTable + ); + } + return EFI_SUCCESS; } diff --git a/OvmfPkg/AmdSevDxe/AmdSevDxe.inf b/OvmfPkg/AmdSevDxe/AmdSevDxe.inf index 0676fcc5b6..9acf860cf2 100644 --- a/OvmfPkg/AmdSevDxe/AmdSevDxe.inf +++ b/OvmfPkg/AmdSevDxe/AmdSevDxe.inf @@ -42,6 +42,13 @@ [FixedPcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize + +[Guids] + gConfidentialComputingSevSnpBlobGuid [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId diff --git a/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h b/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h new file mode 100644 index 0000000000..b328310fd0 --- /dev/null +++ b/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h @@ -0,0 +1,33 @@ +/** @file + UEFI Configuration Table for exposing the SEV-SNP launch blob. + + Copyright (c) 2021, Advanced Micro Devices Inc. All right reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + **/ + +#ifndef CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB_H_ +#define CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB_H_ + +#include + +#define CONFIDENTIAL_COMPUTING_SNP_BLOB_GUID \ + { 0x067b1f5f, \ + 0xcf26, \ + 0x44c5, \ + { 0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42 }, \ + } + +typedef struct { + UINT32 Header; + UINT16 Version; + UINT16 Reserved1; + UINT64 SecretsPhysicalAddress; + UINT32 SecretsSize; + UINT64 CpuidPhysicalAddress; + UINT32 CpuidLSize; +} CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION; + +extern EFI_GUID gConfidentialComputingSevSnpBlobGuid; + +#endif diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index c22b846cd6..769bef0ffa 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -124,6 +124,7 @@ gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}} gGrubFileGuid = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}} gConfidentialComputingSecretGuid = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}} + gConfidentialComputingSevSnpBlobGuid = {0x067b1f5f, 0xcf26, 0x44c5, {0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42}} [Ppis] # PPI whose presence in the PPI database signals that the TPM base address -- 2.39.2