From 01c2fb0d2260d4de898e4e91e48770ffa5510153 Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@gmail.com>
Date: Fri, 16 Dec 2022 16:58:05 +0800
Subject: [PATCH] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV

PSID matching relies on comparing the PSIV against the PortSpeed
value. This patch stops edk2 from checking for a PSIV of 0, as it
is not valid; this reduces the number of register access by
approximately 6 per second.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 44 ++++++++++++++++-------------
 1 file changed, 25 insertions(+), 19 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 15fb49f28f..8dd7a8fbb7 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -371,6 +371,7 @@ XhcGetRootHubPortStatus (
   UINT32             TotalPort;
   UINTN              Index;
   UINTN              MapSize;
+  UINT8              PortSpeed;
   EFI_STATUS         Status;
   USB_DEV_ROUTE      ParentRouteChart;
   EFI_TPL            OldTpl;
@@ -397,32 +398,37 @@ XhcGetRootHubPortStatus (
 
   State = XhcReadOpReg (Xhc, Offset);
 
+  PortSpeed = (State & XHC_PORTSC_PS) >> 10;
+
   //
   // According to XHCI 1.1 spec November 2017,
   // Section 7.2 xHCI Support Protocol Capability
   //
-  PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & XHC_PORTSC_PS) >> 10));
-  if (PortStatus->PortStatus == 0) {
-    //
-    // According to XHCI 1.1 spec November 2017,
-    // bit 10~13 of the root port status register identifies the speed of the attached device.
-    //
-    switch ((State & XHC_PORTSC_PS) >> 10) {
-      case 2:
-        PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
-        break;
+  if (PortSpeed > 0) {
+    PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, PortSpeed);
+    // If no match found in ext cap reg, fall back to PORTSC
+    if (PortStatus->PortStatus == 0) {
+      //
+      // According to XHCI 1.1 spec November 2017,
+      // bit 10~13 of the root port status register identifies the speed of the attached device.
+      //
+      switch (PortSpeed) {
+        case 2:
+          PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
+          break;
 
-      case 3:
-        PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
-        break;
+        case 3:
+          PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
+          break;
 
-      case 4:
-      case 5:
-        PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
-        break;
+        case 4:
+        case 5:
+          PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
+          break;
 
-      default:
-        break;
+        default:
+          break;
+      }
     }
   }
 
-- 
2.39.2