From 047c0cbb1e0c34e1a81c36f687c74f695d673ce4 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Mon, 19 Aug 2013 17:33:31 +0000 Subject: [PATCH] ArmPkg/CpuDxe: Fixed AArch64 MMU/GCD synchronization - Fix the length used to set the GCD Memory Space attribute - Print a warning message if the given length of a memory space region is not 4KB-aligned Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14562 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 18 ++++++++++-------- ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 7 +++++++ 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c index da6e6225be..40a4c1b0aa 100644 --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c @@ -89,7 +89,7 @@ GetNextEntryAttribute ( // Update GCD with the last region SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *StartGcdRegion, - (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)) - 1) - *StartGcdRegion, + (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion, PageAttributeToGcdAttribute (EntryAttribute)); } @@ -113,8 +113,8 @@ GetNextEntryAttribute ( // Update GCD with the last region SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *StartGcdRegion, - (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)) - 1) - *StartGcdRegion, - PageAttributeToGcdAttribute (EntryAttribute)); + (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion, + PageAttributeToGcdAttribute (*PrevEntryAttribute)); // Start of the new region *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)); @@ -182,11 +182,13 @@ SyncCacheConfig ( BaseAddressGcdRegion, &PageAttribute, &BaseAddressGcdRegion); - // Update GCD with the last region - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, - BaseAddressGcdRegion, - EndAddressGcdRegion - BaseAddressGcdRegion, - PageAttributeToGcdAttribute (PageAttribute)); + // Update GCD with the last region if valid + if (PageAttribute != TT_ATTR_INDX_INVALID) { + SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, + BaseAddressGcdRegion, + EndAddressGcdRegion - BaseAddressGcdRegion, + PageAttributeToGcdAttribute (PageAttribute)); + } FreePool (MemorySpaceMap); diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c index b1364820a4..e0ee9fc287 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c @@ -96,6 +96,13 @@ SetGcdMemorySpaceAttributes ( DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n", BaseAddress, BaseAddress + Length, Attributes)); + // We do not support a smaller granularity than 4KB on ARM Architecture + if ((Length & EFI_PAGE_MASK) != 0) { + DEBUG ((DEBUG_WARN, + "Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n", + Length)); + } + // // Get all memory descriptors covered by the memory range // -- 2.39.2