From 0b9c0c65400262ee41eb8f4f4d9079fab4777437 Mon Sep 17 00:00:00 2001 From: Star Zeng Date: Thu, 24 Aug 2017 17:42:49 +0800 Subject: [PATCH] MdeModulePkg XhciDxe: Fix Map and Unmap inconsistency We found there are loops of *2* Maps and only *1* Unmap and the DMA buffer address is decreasing. It is caused by the below code flow. XhcAsyncInterruptTransfer -> XhcCreateUrb -> XhcCreateTransferTrb -> Map Urb->DataMap (1) Timer: loops of *2* Maps and only *1* Unmap XhcMonitorAsyncRequests -> XhcFlushAsyncIntMap -> Unmap and Map Urb->DataMap (2) XhcUpdateAsyncRequest -> XhcCreateTransferTrb -> Map Urb->DataMap (3) This patch is to eliminate (3). Cc: Ruiyu Ni Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng Reviewed-by: Ruiyu Ni --- MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c index 6013d7620f..21fdcf130a 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c @@ -259,8 +259,11 @@ XhcCreateTransferTrb ( } else { EPType = (UINT8) ((DEVICE_CONTEXT_64 *)OutputContext)->EP[Dci-1].EPType; } - - if (Urb->Data != NULL) { + + // + // No need to remap. + // + if ((Urb->Data != NULL) && (Urb->DataMap == NULL)) { if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) { MapOp = EfiPciIoOperationBusMasterWrite; } else { -- 2.39.2