From 3da829657e67d01e39eb6cf8ef9754043271e2e7 Mon Sep 17 00:00:00 2001 From: Laszlo Ersek Date: Tue, 1 Mar 2016 11:04:59 +0100 Subject: [PATCH] MdeModulePkg: PciHostBridgeDxe: insert horizontal whitespace ... in preparation for the next patch. Cc: Ruiyu Ni Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek Reviewed-by: Michael Kinney Reviewed-by: Jordan Justen --- .../Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 18 ++++----- .../Include/Library/PciHostBridgeLib.h | 40 +++++++++---------- 2 files changed, 29 insertions(+), 29 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c index 332860eb38..932aefd5d6 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c @@ -78,18 +78,18 @@ CreateRootBridge ( DEBUG ((EFI_D_INFO, "RootBridge: ")); DEBUG ((EFI_D_INFO, "%s\n", DevicePathStr = ConvertDevicePathToText (Bridge->DevicePath, FALSE, FALSE))); - DEBUG ((EFI_D_INFO, "Support/Attr: %lx / %lx\n", Bridge->Supports, Bridge->Attributes)); - DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" : L"No")); - DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n", Bridge->AllocationAttributes, + DEBUG ((EFI_D_INFO, " Support/Attr: %lx / %lx\n", Bridge->Supports, Bridge->Attributes)); + DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" : L"No")); + DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n", Bridge->AllocationAttributes, (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0 ? L"CombineMemPMem " : L"", (Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) != 0 ? L"Mem64Decode" : L"" )); - DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base, Bridge->Bus.Limit)); - DEBUG ((EFI_D_INFO, " Io: %lx - %lx\n", Bridge->Io.Base, Bridge->Io.Limit)); - DEBUG ((EFI_D_INFO, " Mem: %lx - %lx\n", Bridge->Mem.Base, Bridge->Mem.Limit)); - DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base, Bridge->MemAbove4G.Limit)); - DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base, Bridge->PMem.Limit)); - DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base, Bridge->PMemAbove4G.Limit)); + DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base, Bridge->Bus.Limit)); + DEBUG ((EFI_D_INFO, " Io: %lx - %lx\n", Bridge->Io.Base, Bridge->Io.Limit)); + DEBUG ((EFI_D_INFO, " Mem: %lx - %lx\n", Bridge->Mem.Base, Bridge->Mem.Limit)); + DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base, Bridge->MemAbove4G.Limit)); + DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base, Bridge->PMem.Limit)); + DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base, Bridge->PMemAbove4G.Limit)); // // Make sure Mem and MemAbove4G apertures are valid diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h index b1dba0f754..16ad104a93 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -25,26 +25,26 @@ typedef struct { } PCI_ROOT_BRIDGE_APERTURE; typedef struct { - UINT32 Segment; ///< Segment number. - UINT64 Supports; ///< Supported attributes. - ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() - ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - UINT64 Attributes; ///< Initial attributes. - ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() - ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - BOOLEAN DmaAbove4G; ///< DMA above 4GB memory. - ///< Set to TRUE when root bridge supports DMA above 4GB memory. - UINT64 AllocationAttributes; ///< Allocation attributes. - ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and - ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes() - ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL. - PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge. - PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge. - EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path. + UINT32 Segment; ///< Segment number. + UINT64 Supports; ///< Supported attributes. + ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() + ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + UINT64 Attributes; ///< Initial attributes. + ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes() + ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. + BOOLEAN DmaAbove4G; ///< DMA above 4GB memory. + ///< Set to TRUE when root bridge supports DMA above 4GB memory. + UINT64 AllocationAttributes; ///< Allocation attributes. + ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and + ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes() + ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL. + PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge. + PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge. + EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path. } PCI_ROOT_BRIDGE; /** -- 2.39.2