From 49188b2aa481e76190883e73147af72128c878db Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@arm.com>
Date: Tue, 31 Mar 2020 19:24:57 +0200
Subject: [PATCH] ArmPkg/CpuDxe: move PageAttributeToGcdAttribute() out of
 ArmMmuLib

The routine PageAttributeToGcdAttribute() is exported by ArmMmuLib
but only ever used in the implementation of CpuDxe. So let's move
the function there and make it STATIC.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---
 ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c           | 46 +++++++++++++++++++
 ArmPkg/Include/Chipset/AArch64.h              |  5 --
 .../Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 45 ------------------
 3 files changed, 46 insertions(+), 50 deletions(-)

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 24eb1c4221..29fa08f9e0 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -30,6 +30,52 @@ GetRootTranslationTableInfo (
   *RootTableEntryCount  = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
 }
 
+STATIC
+UINT64
+PageAttributeToGcdAttribute (
+  IN UINT64 PageAttributes
+  )
+{
+  UINT64  GcdAttributes;
+
+  switch (PageAttributes & TT_ATTR_INDX_MASK) {
+  case TT_ATTR_INDX_DEVICE_MEMORY:
+    GcdAttributes = EFI_MEMORY_UC;
+    break;
+  case TT_ATTR_INDX_MEMORY_NON_CACHEABLE:
+    GcdAttributes = EFI_MEMORY_WC;
+    break;
+  case TT_ATTR_INDX_MEMORY_WRITE_THROUGH:
+    GcdAttributes = EFI_MEMORY_WT;
+    break;
+  case TT_ATTR_INDX_MEMORY_WRITE_BACK:
+    GcdAttributes = EFI_MEMORY_WB;
+    break;
+  default:
+    DEBUG ((DEBUG_ERROR,
+      "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
+      PageAttributes));
+    ASSERT (0);
+    // The Global Coherency Domain (GCD) value is defined as a bit set.
+    // Returning 0 means no attribute has been set.
+    GcdAttributes = 0;
+  }
+
+  // Determine protection attributes
+  if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
+      ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
+    // Read only cases map to write-protect
+    GcdAttributes |= EFI_MEMORY_RO;
+  }
+
+  // Process eXecute Never attribute
+  if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {
+    GcdAttributes |= EFI_MEMORY_XP;
+  }
+
+  return GcdAttributes;
+}
+
 STATIC
 UINT64
 GetFirstPageAttribute (
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index e3d877207b..0ade5cce91 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -219,11 +219,6 @@ ArmReadCurrentEL (
   VOID
   );
 
-UINT64
-PageAttributeToGcdAttribute (
-  IN UINT64 PageAttributes
-  );
-
 UINTN
 ArmWriteCptr (
   IN  UINT64 Cptr
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
index 3b10ef58f0..d16e847218 100644
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
@@ -57,51 +57,6 @@ ArmMemoryAttributeToPageAttribute (
   }
 }
 
-UINT64
-PageAttributeToGcdAttribute (
-  IN UINT64 PageAttributes
-  )
-{
-  UINT64  GcdAttributes;
-
-  switch (PageAttributes & TT_ATTR_INDX_MASK) {
-  case TT_ATTR_INDX_DEVICE_MEMORY:
-    GcdAttributes = EFI_MEMORY_UC;
-    break;
-  case TT_ATTR_INDX_MEMORY_NON_CACHEABLE:
-    GcdAttributes = EFI_MEMORY_WC;
-    break;
-  case TT_ATTR_INDX_MEMORY_WRITE_THROUGH:
-    GcdAttributes = EFI_MEMORY_WT;
-    break;
-  case TT_ATTR_INDX_MEMORY_WRITE_BACK:
-    GcdAttributes = EFI_MEMORY_WB;
-    break;
-  default:
-    DEBUG ((DEBUG_ERROR,
-      "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
-      PageAttributes));
-    ASSERT (0);
-    // The Global Coherency Domain (GCD) value is defined as a bit set.
-    // Returning 0 means no attribute has been set.
-    GcdAttributes = 0;
-  }
-
-  // Determine protection attributes
-  if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
-      ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
-    // Read only cases map to write-protect
-    GcdAttributes |= EFI_MEMORY_RO;
-  }
-
-  // Process eXecute Never attribute
-  if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {
-    GcdAttributes |= EFI_MEMORY_XP;
-  }
-
-  return GcdAttributes;
-}
-
 #define MIN_T0SZ        16
 #define BITS_PER_LEVEL  9
 
-- 
2.39.2