From 7a55c43b072ec2192d35df5e44cf37eb8be06555 Mon Sep 17 00:00:00 2001
From: jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>
Date: Wed, 16 Dec 2009 23:29:15 +0000
Subject: [PATCH] OVMF ResetVector: Modify interface with SEC module

Previously it was:
  ESI/RSI - SEC Core entry point
  EDI/RDI - PEI Core entry point
  EBP/RBP - Start of BFV

Now it is:
  RAX/EAX  Initial value of the EAX register
           (BIST: Built-in Self Test)
  DI       'BP': boot-strap processor, or
           'AP': application processor
  RBP/EBP  Address of Boot Firmware Volume (BFV)

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9571 6f19259b-4bc3-4df7-8a09-765794883524
---
 .../Bin/ResetVector.ia32.port80.raw           | Bin 0 -> 548 bytes
 OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw  | Bin 884 -> 532 bytes
 .../Bin/ResetVector.ia32.serial.raw           | Bin 0 -> 932 bytes
 .../Bin/ResetVector.x64.port80.raw            | Bin 0 -> 28676 bytes
 OvmfPkg/ResetVector/Bin/ResetVector.x64.raw   | Bin 28676 -> 28676 bytes
 .../Bin/ResetVector.x64.serial.raw            | Bin 0 -> 28676 bytes
 OvmfPkg/ResetVector/Build.py                  |  53 +++++++
 OvmfPkg/ResetVector/CommonMacros.inc          |  16 +-
 ...etVectorOldTools.asm => DebugDisabled.asm} |  47 ++----
 OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm   | 137 ++++++++----------
 OvmfPkg/ResetVector/Ia16/Init16.asm           |  48 ++++++
 OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm  |  43 +++---
 OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm   |  19 +--
 OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm |  50 +++----
 ...ndPeiEntries.asm => SearchForSecEntry.asm} |  94 +++++-------
 OvmfPkg/ResetVector/JumpToSec.asm             |  63 --------
 OvmfPkg/ResetVector/Main.asm                  | 106 ++++++++++++++
 OvmfPkg/ResetVector/Port80Debug.asm           |  28 ++++
 OvmfPkg/ResetVector/PostCodes.inc             |  25 ++++
 OvmfPkg/ResetVector/ResetVectorCode.asm       |  35 +++--
 OvmfPkg/ResetVector/SerialDebug.asm           |  46 ++++--
 21 files changed, 478 insertions(+), 332 deletions(-)
 create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw
 create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw
 create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw
 create mode 100644 OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw
 create mode 100644 OvmfPkg/ResetVector/Build.py
 rename OvmfPkg/ResetVector/{Ia16/ResetVectorOldTools.asm => DebugDisabled.asm} (51%)
 create mode 100644 OvmfPkg/ResetVector/Ia16/Init16.asm
 rename OvmfPkg/ResetVector/Ia32/{SearchForSecAndPeiEntries.asm => SearchForSecEntry.asm} (69%)
 delete mode 100644 OvmfPkg/ResetVector/JumpToSec.asm
 create mode 100644 OvmfPkg/ResetVector/Main.asm
 create mode 100644 OvmfPkg/ResetVector/Port80Debug.asm
 create mode 100644 OvmfPkg/ResetVector/PostCodes.inc

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..b136e69af9ff755c44e7c37a456671f1645bd0eb
GIT binary patch
literal 548
zcmZ8e&r1|h9RE(^OuKZLr8JlDAnP9VAh?N;nPr;dp>Pi&i<J<?h&P$$!5rru_V8R8
zhHlj#(R6Y^VMkZZP6`riY{*tL>}xJ|vC#1Ooz{c+h4=mOzMt>s^M1Il>*j)9NC6B3
zfG`HBm9l;=Es=;?t;35QQ{+3f(r*UXbMl2+9mPuT9@(W<7QsM1vWi^jBmu{9@VwCW
z%V=zq9}6MaruQMVIg<c#HMY+hdg)o8R5d2JjOY>LZZR-#E0-}h`m=u*3+;!MPP0*(
zY^C3D8j_#PnzUwKGCteZRhcAt29d>pB-u7!M?fxMTg5}7dIzCxo_N1estcu%bWTYl
zba4CCtZm6D^F}F6f5eQa{ZNUujq&V1{uQ^B7OYrBr?(!>5LH_)+>x*tnw}xo<gtX(
zja_Z|iP}@;ZJ5%b{5W1ZA&+%)1#2G{@Ok9%u7~!~3LH4Km6t--q;}o!!YgW-K>zgs
z`zi28ROHIky_=z}`w4KWPT<s?hO^6GAd7ns77&M@ffm!ohDQc?z0-_u&*H`U-TVL8
z^R7IakFJ#O=Oa~T8~E7#kKj)QZ#xl!8|YYFgiWQUkM^1|=9qpw0a`LzJ>NeC(NXH!

literal 0
HcmV?d00001

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw
index 76286b9fa3c49e96543042703f424cc2004062d4..f772255004a366fef2b693f0e54a4c2d2c93ccb8 100644
GIT binary patch
delta 319
zcmeyuHid<M0uUG;&}9%{V6bIiV3??7QO^UUckBm(&Z94X|Ns9VNHsDtFc{wMyw~|6
ztvl9$@kWu`OJ<-dha$Vy10`0h>_B#rvC5CG2=Q-+6-r)odx$hX1nOkqJXvy^@n8v4
z(ba|uA?8xfmr_8Ltp`duJ5Rhk1XN&npz~Pkw^F8(e=n7RRsao4XPx|xG28!TAyD?$
zZiWwiw|B?<Pvd74Purmkw2)uvK-wz@pqv214hJ>{27aXnX*)O=`fl_c=zGxjqVK}X
zY@iJj>=_DxYCwL2fJw|Q0sEZ-UUTnv40z3!)_DZz{FmSVzl{0+QuW{e|1Yb6MCXJ5
a&tU37^y|wI9?(37un;!}e$Ll>kmUi<@R?5l

literal 884
zcmaiyL1+^}6ozLz-84OAsg;CMVOt}_L%}GDB^HYzMM1HkgivWAmldz;F6_ZW_7G*0
zvMk<I#G80Cw}uVkO3>C*3nD}!wN{jj)xlGZrtSKsso0&113UA+H}n2^^WHj+<G3AM
zxkKGwxPqwL#ub4wPah=-ob<+!gwO;+1z#OE4axXCKd*0?#^6M0__Drk8nJsPt-Suu
zG=_`yu{ZjPX~Yo>ebK7poUD6f07!AS@wX?k_ETZ{BQ)t*FN3~wG{{pNXE~N>|95SN
zJQNU0Hmz0bgVj>Xv&V#ndV^rNaZ=3}J#AL(16$3;+ofD|vo33`^7%pYqwo8u|FzZ>
zUT8h)+fr_z(CO8N3LUH;aUXB{K3Rq+2#;E?2)rJ-HRg1?&K_&gS|X1?qqwO{!K_EP
zEU$2!;W*8)OpE^iG^e>3Uh@LCFH>@>oB4Gy2FCc(&AEbsC2go2Ge5CXK+!IWtY~T`
zzD3@HOY8-*>WX>#(u^L8Eac7z0IBSZegLP#Vghy}3)ezN8{{CEW@<VE9S`Glf{4IX
z_>jL&p0ldW?SS5wz5cgZ`;&A(oeGdlf7j3tyIH&KD-j{8R1ZTdBcq=3H3c#fs!oRB
z>e01e*-vm!KF+aBm1-E-4coKV?3TSk@*s8=IWWWT@33^)fKniIce%UX-&=Wp@O1a=
b{)s%>B8PUBnA$%*b|!mu3T>=*{eR~_^5&>m

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..7b17db95e390c7cba54e464a7e4cf933fa5eda41
GIT binary patch
literal 932
zcmbO*VZwx6znM3*zuWbbc>}|{T|byNFuntcu)llh%4~Q*mqCDm!Ipu6;eU~3V}(G)
z)1IEv*Nqh-wp}v*rH>jbBxag+CYIi8tdMCvtb4iiLSuyrP%%U4@y^4{5elUTUitue
zX}kV1zgeMB@;wb?e$qQsz5yDa7md&LZpVHg=sf!J_y7O@JCCC3MmNn6O*f`#FDscC
z7z}TB-s^mk)*WlWc%#VeB{R^K4n=mY2TH71*@5gLW0fCW5#rwtE0nzG_7G`&2(+1j
z^JK|w#)BnHMOPatgqTY?U(N!mY&}rQ*?HpSA)o@o1D(fOzm+<nIxr2*L4>_q@(;fW
zM0jyFBgkbX>8uh!Ct98;j%%o37ATSGmS}to@(Iw-KCB==7rCnZd3gsY#L5EXbskP@
zwD658W#iu-VZ#XIScgTG3Nt%%uxbEh`L{>2Y2J7#3S>4~2e<+wnS<F`<0UJQzXOOF
zUVi-d|35UQe}E#|@EtPG428#w!sB}PYd6D(zT3Ow{-^OXil^;R21W<J(t)&B%s{sZ
zFzj$(1KO|j05x2U(L&Y;jgJ}iX*)O=`fl_c=zGxjqVK}XY@n;{847?_0J8xcfcydi
zz;I$<m~<XO&w|qE{MqZlYLSWkP64m^_B#f==1l86@^Zl+VB&iD<^Rhk|6Z>B^Z)<L
groX^M{NVpHxP7lLLzo~l!b02__&HziflC4z06k8~9{>OV

literal 0
HcmV?d00001

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.port80.raw
new file mode 100644
index 0000000000000000000000000000000000000000..307fc666a529c7d0765005b5bb88d7d937cd10b8
GIT binary patch
literal 28676
zcmeI*_qU~IRlxBbLPBDjs3@qYA);bIDK-RjD}qr`v4Du}vBlnEM#sKKjXHoaVh77(
zZ>VD>g387Kf)xuI#j<TNLo6tYsK9uVd~~V*fJ@hT*1Gp|&b{yVoO7T1-u<q*^TWOV
z`s=TMN!+ns5|`h8<0X+?EN(W3alvgj4n32L#m(k0?xbgOvAEeB#)Wz&7mJ(CVcc2I
z<YIBNIgE?+OfD8To5Q$R&*WlpvpI~r=$TwBZZ?N;iJr;D;%0Lgm+F~ZEN(W3@hW;I
z7mJ(CVZ5rI$;IMka~Q9tXL7N)*&N2J>zQ0EZZ?PU8hR!di<`}1oX|75Slnz5<1#&y
zi^a|6FkVy7<YIBNIgHoRGr3sYY!2hK^-L}nH=Dz_tDecl;%0LgucK#jvAEeB#_Q^t
zTr6%jhjBMOlZ(a8<}mKAXL7N)*&N2}>6u(CZZ?PU`g$f8i<`}1yn&v{#o}gj828XK
zxmet64&x2=OfD8To5Oe`J(G*Y&E_!PSkL5QakDv$%k@ky7B`#2xMv*J;rh?yVsW!M
zj4Sj^E*3YN!*~-tlZ(a8<}mK1XL7N)*&N23>X}?DZZ?PUW_l(Ui<`}1yt$sq#o}gj
z828pQxmet64&yEKOfD8To5OfZJ(G*Y&E_!PO3&nCakDv$x7IVcSlnz5<34&O7mJ(C
zVZ4o=$;IMka~N-{XL7N)*&N1w^-L}nH=Dz_pPtFZ;%0Lg_t!JISlnz5;{kdm7mJ(C
zVZ5E5$;IMka~N;0XL7N)*&N0@=$TwBZZ?PUj(R2+i<`}1ypx{E#o}gj7!TAlxmet6
z4&$BmOfD8To5OgJp2@}HW^))1)-$<S+-wfxA$leki<`}1yo;X6#o}gj81JfQa<RDC
z97gJyTr6%jhw*N4ScmIBlZ(a8<}lt}&*WlpvpI~1>X}?DZZ?PU9(pDhi<`}1JWS8z
zVsW!MjEC!)Tr6%jhw+|zCKrpF&0$=rXL7N)*&N1u>6u(CZZ?PU-g+h%i<`}1ypNvA
z#o}gj7?031xmet64&#0GOfD8To5OfNJ(G*Y&E_!PU(e)XakDv$N9vheEN(W3@d0`!
z7mJ(CVSJ#T$;IMka~L0_XL7N)*&N0P>zQ0EZZ?PUC_R&l#m(k09<66`vAEeB#)s&c
zTr6%jhw&IalZ(a8<}f}~&*WlpvpI~%>X}?DZZ?PUVR|MPi<`}1e7K&;#o}gj7$2c$
za<RDC9L7iLnOrPxHiz+1dL|c(o6TV?J(G*Y&E_yZIu7e_{bzEqxY-=W$LN_{EN(W3
z@v(X)7mJ(CVSJpP$;IMka~L15XL7N)*&N1IdL|c(o6TW-f}Y96;%0LgpQvYYvAEeB
z#wY2STr6%jhw;gJCKrpF&0&0sp2@}HW^)*ys%LVsxY-=Wr|FqoEN(W3@#%Ud7mJ(C
zVSI+3$;IMka~PkgXL7N)*&N1a>6u(CZZ?N;wVuhv;%0LgpRH$dvAEeB#x;5-7mJ(C
zVVu-6xmet64&!t5OfD8To5T2AJ(G*Y&E_yp>6u(CZZ?PUd3q)ni<`}1e7>H^#o}gj
z7+;`ga<RDC9L5*wnOrPxHiz*=dL|c(o6TW-v7X7r;%0LgU!rGnvAEeBM(LScEN(W3
zaXJp`aQ$a;vAEeB#+T}uTr6%jhw){4CKrpF&0&1Gp2@}HW^)+V>X}?DZZ?PU6?!HY
zi<`}1e5Ibr#o}gj7+<Ala<RDC9L5<vlZ(a8<}e<oXL7N)*&N2>^-L}nH=DzFf}Y96
z;%0LgU#(|yvAEeB#&voo7mJ(CVSJ6A$;IMka~Rj_nOrPxHiz-GdL|c(o6TW7QP1RJ
zakDv$uhTQRSlnz5<LmWIE*3YN!}tb0lZ(a8<}kid&*WlpvpI}!(lfbO+-wfxoApdC
z7B`#2_!d2ri^a|6FrK7ma<RDC9LAINOfD8To5T24J(G*Y&E_z^P0!?FakDv$Z`U)q
zSlnz5<2&?BE*3YN!`ONz7mJ(CVSHyC*5Ufk<YIBNIgIbpGr3sYY!2hQ^-L}nH=D!w
z9zBzb#m(k0zE{uWVsW!MjPKJkxmet64&(dvOfD8To5T14J(G*Y&E_zEP|xIIakDv$
zAJQ|qSlnz5<A?Q3E*3YN!+46G$;IMka~MCOXL7N)*&N1?>X}?DZZ?PUV|peRi<`}1
zoYgbASlnz5<Hz+(E*3YN!}tk3lZ(a8<}iLz&*WlpvpI~P(lfbO+-wfxr}a!O7B`#2
z_!&Kui^a|6FrKPsa<RDC9L5cLCKrpF&0+kkp2@}HW^))%(=)kP+-wfx>3Sv?i<`}1
z{G6W2#o}gj7(cIPa<RDC9L6u`nOrPxHiz*HJ(G*Y&E_y#&*WlpvpI}s#$g?<|4c3x
zH=D!wMLm;?#m(k0ZqzfmSlnz5<5_wp7mJ(CVLV&U<YIBNIgID%nOrPxHiz*`dL|c(
zo6TW7SI^{PakDv$=joYTEN(W3@ymK97mJ(CVf>1o$;IMka~Qv>XL7N)*&N2N>6u(C
zZZ?PU>v|>^i<`}1{Dz*%#o}gj7|+);xmet64&yiVOfD8To5T1mJ(G*Y&E_zEThHWT
zakDv$-_bL<Slnz5;{|#q7mJ(CVf?P1$;IMka~Qv;XL7N)*&N1AdL|c(o6TYTzMjd&
z;%0Lgf1qb_vAEeB#tZdKE*3YN!}vozlZ(a8<}m(9&*WlpvpI}E)-$<S+-wfxPxMSK
z7B`#27(J7V#m(k0{xlBjaQ$a;vAEeB#-Hh#Tr6%jhw<lnCKrpF&0+k7p2@}HW^)*S
zsb_MrxY-=W&3Yymi<`}1{FR=`#o}gj7`Nz|Tr6%jhjC8N<YIBNIgA(SnOrPxHivPm
zp2@}HW^)*St!HwvxY-=W-{_fKEN(W3@wa*=7mJ(CVf>w*$;IMka~LnyGr3sYY!2h^
z^-L}nH=D!w2R)OE#m(mMFnSK_Fn^d_EN(W3@sD~Y7mJ(CVf>Sx$;IMka~LnxGr3sY
zY!2g}^-L}nH=DzFnV!kT;%0Lg|DtDdvAEeB#=q*BTr6%jhw*QECKrpF&0)M;&*Wlp
zvpI}c=$TwBZZ?PUN<EW{#m(k0&g+?6EN(XEb{}y4`8(V^%RYMBzCPf%4|kj&$9*{N
z!|~_gI1i3<;5Y}4bKp1!j&tBR2aa>#I0ue%;Q#g<c)ow<AHC!Ic-)8MKHPR)JDvx}
z^Wb<M9DfdubKp1!j&tBR2aa>#I0ue%;5Y~VpUr{8p8z<n;|?5m;J5?F9XRg5aR-h&
zaNL384jgyjxC6%>_+Qw8`yKu~#AOi=IsB^O{M8RUed@APfBA$boV@k)sk=Vparb!t
zlYe&l)ZM@3?azGl$=^SH>K@nLc%R=s`TWzT?sYggPX5xF8!vp!<tO{xA&;|XZ>}4j
zaad=beeU1RpFe-**=K+J<~sMh3nK3K!ZUw-=9a4-{}K1S;HIk|e(u7<(RuZ|T-(>Y
z^F?<#+`jq&_j=jm9&@*s-gx;nw><vJyPp2jLmihs@0u50@XTxOboC4B)N5UM^3rox
z9FDxUPhNWFx#xcIaKQcg%yX`N>B)=FzWC<4=9Opv{_s>Edw8nDgMPwAcRw8Zz~_GU
zN7kteFT3XTAAk4Le}3B|9-jLV7v1*US3m4tFF*H(hYwwJ=fk}-H(qu6o!<AcCoewn
z)W<ydg2SB$J^HaHU;Dy`UUJdB51&2p)DOG(Ep9sZI)|I5AN0tF9lq#GE_~>{&s}u5
zf5YJ|&VAD1ac+n?fBwW3H=VeAPCV_Fi%wiIKU)!f;{Jzwmz=ooiOc(N<Bd;T(J#8w
z;pltE*^fKC+NT}rv#)z|{p-`?#n-*?>5n*n)rkx4cGV4Ua@d>0kypLwK8HguiyQLd
z!;83L&ffp#y6T2Y;<}rz>+9yaTdsTlxlcYkz`Mpe9QNN&n!|^0U$_4+`xAd7Zud$2
zpZA~qWB+mZfBKAff8?#N`iysb<gFK9b>>-zZ`QegK7Z~}=g+<173a^NyZ<W>?_T}z
zlvmzxcz64+=dQfxbFRGSv#-48v#vZd=Wjl|lv{7S<MrJ3fRFy*hsTLaZ+*&teTDxH
DPAIBP

literal 0
HcmV?d00001

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw
index adf44b10286bc4ec4ab35ffbd2d325889a19096c..aff1447b99c73418742563240532a6161f0bfbd4 100644
GIT binary patch
delta 348
zcmZp9z}WJDaf3+CW`%?WjNFC?bQuH~7;G6B7$#fgSk&_X89Vj^LFdtzzyJUL52Q9S
zGB6n4?!4FeBCR{tfbm9=+e>DkDu*Jw)&nJ0tn5H`k+I5;t_bmOhZRa*bbE+2J_PDy
z;5=D!oAF=?Q_<Ci3L)lF&X-a^m8}O#IXh3hJOor=c%buG>$g&-l7BCQfmQ$wOJ|+@
zFE^X@Wg$>@a!J0Hmk^Ml!SHe&P~)%N3?KS#?+*B%#?L68wnG`{0Dh$dX|GIyN(2~o
zIIuA=@GCt?+rh!mccbq>--EsveHUJ)0X5n)B!G<5%J)jx?-cNwd%t7AYqqq`BS25Q
z{Qm!C;{TUl|Nj5~((50PkOivr*a0N|12r;uC?4}rJnEr%#G~`U|7Q~>On7}5NB{vy
RGAzW6fuHmB8i)vl1ORN6rKJD>

delta 730
zcmZp9z}WJDaf3*X+OFTs8`|IP`pLY3;oYtu%o`ZrfkfEfy<E#|ctDpyfPul5fuUjY
z{#=WCAqED9v|WFh->gt5`JM(+toY9GK<80ZF{gK^d^a?H7#d&U9p~GUe=p}UGB6n4
z?!4D|zw<>}cdP;9jiSt#%s?9*iV|B7l*F>KvjRCqVUzXqWb3;kgc^Rclt?xFW-e9T
zrS|v#|Ci^1vOsm>oyT4R-ORAd8YH+2BFNNvyz|7%`Tzg_Z~ay(fa*L&H0K1P@m<mQ
z&Om-Dau_JQYyD5i&;T?;&<*uOlUI26vW8)DeqK@i|3@$PgM1SA4@mq1ddFi2&>R1O
z3<eLyV;+jfJrs}re+G?|AD}ofe22_4L*XgB`?Z_lL*MP)a{tr#8O76fC<DWnU+F;F
ztII(11sHZXurV<3D?NY*krOzYjnSNEgvM8Rm$rk0q3=fDfxZWQFZwRL^aMK5p1}Y}
zPM9z`D&K4JvplV|1wgI_S^_ddGsy&v4-ANfAfH?OdAZ@=1P}oE90tNd+!$Uz1`ERp
E0KB_{od5s;

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.serial.raw
new file mode 100644
index 0000000000000000000000000000000000000000..3224e3f3b4d925d28cd6423ee2e4a8bfa78694bc
GIT binary patch
literal 28676
zcmeI*d$i`)S<vw(9nvO+GO-j}utFLt6ctGtsFYH8XladFq(H5;P}qPBf(jTiGT!hR
zHNvzdM!W#U%NFG-O1xl03iN@rrQn4sw_v$EfM8C816VA9UdDHt&ssKvOZ^wtyVsiY
zdH0$3`<~x#zrVA8>&*Od?!5EPJKr1+jW@^j?|ks)NG=vPo5Q&3@`FRq<YIBNIgCf>
znOrPxHivOa&*WlpvpI}+(=)kP+-wfxYCV&S#m(k09;s(?vAEeB#-sF1E*3YN!?;Gz
z<YIBNIgD%dOfD8To5Ogtp2@}HW^)+tu4i(wxY-=Wd+3>5EN(W3@fbami^a|6Fy2$o
z<YIBNIgHbKCKrpF&0$=pXL7N)*&N1i(=)kP+-wfxv3e#Ki<`}1yqBKI#o}gj7?0C4
zxmet64&%M`OfD8To5T3+dL|c(o6TW7UeDxWakDv$C+L}6EN(W3@jiMc7mJ(CVZ5)N
z$;IMka~Quv&*WlpvpI|>>X}?DZZ?PUJM~O17B`#2ct1Upi^a|6Fy3F!<YIBNIgIP|
zOfD8To5Ofg9LC}P&*WlpvpI|#^h_=mH=D!w06mk7#m(k0o~&nbvAEeB#_!TIxmet6
z4&wv$OfD8To5T1ZJ(G*Y&E_zkqGxikxY-=W2kV(!EN(W3@w@d*E*3YN!}vXVCKrpF
z&0+jrJ(G*Y&E_yZM9<`6akDv$-=}ACvAEeB#)s;eTr6%jhjF8x$;IMka~L=2nOrPx
zHiz+4J(G*Y&E_y})-$<S+-wfx!}Lrp7B`#2_;5Xwi^a|6FrKDoa<RDC9LDe0Gr3sY
zY!2fi^h_=mH=DzFx}M3!;%0LgAE{?@vAEeB#xwLxE*3YN!}usYlZ(a8<}jYAXL7N)
z*&N14>zQ0EZZ?PUF?uE!i<`}1q@Kye;%0Lg9~*~pxc@V`Slnz5<5_wp7mJ(CVLV&U
z<YIBNIgF3fGr3sYY!2f&dL|c(o6TW7SI^{PakDv$KcHuFvAEeB#w~g#7mJ(CVf;Zo
zlZ(a8<}m({p2@}HW^)*SSkL5QakDv$=joYTEN(W3@$q^l7mJ(CVf+z2lZ(a8<}f}%
z&*WlpvpJ0C>zQ0EZZ?PUiFzg%i<`}1e3G8Y#o}gj7@w?Xa<RDC9L5XuOfD8To5T2{
zdL|c(o6TXoP|xIIakDv$Kc;7LvAEeB#*6e!E*3YN!}#NRCKrpF&0)M)&*WlpvpI}U
z(KESN+-wfxQ}s+P7B`#2c!{3L#o}gj7@wwRa<RDC9LA^XnOrPxHixnFOfD8To5T2w
zIE=&npUK7IW^)*ysb_MrxY-=WXX%+-EN(W3@h9|5E*3YN!}x4HlZ(a8<}l9anOrPx
zHiz*!dL|c(o6TYTNj;N`#m(k0K3C7=VsW!MjL*|Exmet64&zVhnOrPxHiz-2^-L}n
zH=D!wGkPW$i<`}1e7>H^#o}gj7+;`ga<RDC9L5*wnOrPxHiz+N^-L}nH=Dz_RnO#N
zakDv$FVZu)Slnz5<2F5$i^a|6FwW|kTr6%jhw<n1OfD8To5T2GJ(G*Y&E_!9>6u(C
zZZ?PU=k-i37B`#2_zQX_7mJ(CVf;lslZ(a8<}m(}p2@}HW^)*SS<mERakDv$FVQo(
zSlnz5<FDwMTr6%jhf#Va7mJ(CVVsY{INbl4Tr6%jhw)eSOfD8To5T2PdL|c(o6TYT
zbv=`d#m(k0Zr3xpSlnz5<8SDhTr6%jhw-I)CKrpF&0&0*p2@}HW^))9^h_=mH=DzF
zsh-Kj;%0LgFVi!*Slnz5<K=oL7mJ(CVSKrs$;IMka~OB%nOrPxHiz*y^-L}nH=Dz_
zQ_tjLakDv$zoln#vAEeB##iW>Tr6%jhw-=dOfD8To5T1!dL|c(o6TYTT|JYF#m(k0
z{+^!6#o}gj7+<Mpa<RDC9L87anOrPxHiz-mdL|c(o6TXoLeJ!4akDv$uhBEPSlnz5
z<L~R4Tr6%jhw%^eOfD8To5T2rdL|c(o6TYTBR!Lg#m(k0ww}qw;%0Lg|2PigaQ|m=
zvAEeB#@FhZTr6%jhw)GJOfD8To5T30dL|c(o6TW-ou0|X;%0LgU$19!vAEeB#y9Ah
zTr6%jhw+ViCKrpF&0&0#p2@}HW^)+dtY>nuxY-=WKhrb0Slnz5<6HDhE*3YN!}#ZV
zCKrpF&0+itJ(G*Y&E_z^RnO#NakDv$yYx&h7B`#2_?LPn7mJ(CVf-sSlZ(a8<}m)X
zp2@}HW^)+-M$hD8akDv$Z__imSlnz5<KOC;Tr6%jhw(~1lZ(a8<}mKoGr3sYY!2hw
z^-L}nH=Dz_N6+M9akDv$SLvBtEN(W3@f~_57mJ(CVSJ~a$;IMka~R*HXL7N)*&N2J
z^-L}nH=Dy~J(G*Y&E_z^I}YP;|7UWsxY-=W_vo2iEN(W3aj%}q#o}gj7_ZSYxmet6
z4&$|YCKrpF&0)Mw&*WlpvpJ0K)ib$R+-wfx^?D{3i<`}1e4n1l#o}gj7~ijFa<RDC
z9LB%XGr3sYY!2h!>zQ0EZZ?PUAM{Kv7B`#2_>X!f7mJ(CVf=ue$;IMka~N;XGr3sY
zY!2f;>6u(CZZ?PUpY=>G7B`#2_(46Bi^a|6Fn&nS<YIBNIgB6HGr3sYY!2f`^h_=m
zH=D!wQ9YB3#m(k0?$a~5Slnz5<Hz(&E*3YN!}u?HCKrpF&0)Mz&*WlpvpI|(*E6|T
z+-wfxC-h7%7B`#2_(?sJi^a|6Fn&tU<YIBNIgHUWxmet64&$feFb?;BCKrpF&0+kE
zp2@}HW^))nt7metxY-=Wf7LU&Slnz5<LC5DE*3YN!}xhUlZ(a8<}m)7p2@}HW^)+#
z>zQ0EZZ?N;qGxikxY-=WoAgXB7B`#2ctFqOVsW!Mj9<_*xmet64&%S;nOrPxHivOh
z&*WlpvpI}k)HAtQ+-wfxm-I|77B`#2_+>qli^a|6F#d<0$;IMkb9mT#4&$)@Fu7RV
zY!2gB^h_=mH=D!wpL!-2i<`}1yhYFCVsW!Mj9=9=xmet64&y;RlZ(a8<}iLu&*Wlp
zvpI}k*E6|T+-wfxt$HRGi<`}1yiL#KVsW!MjJNBVTr6%jhw%<QlZ(a8<}fblnOrPx
zHs_t*eCMTy+`Nl@^zypid|Zczu8-q79M|Fa{czk5j{CrIA2{v<$9>?q4;=S_<34cQ
z2afx|Z|;5I4Svo)`q2A$T!-U2T)wXzuY==taJ&wV-v`Hi;J6PQ_krU+aNGxu`@nG@
zIPL?##rA>2uK+lX;|d&C;J5<E6*#WIaRrVma9n}o3LID9x5x_I^VU;$ed)z}e(ls<
zaq*r9Pu+FZ#mk?0)Wwr;J9X3HHxXPH@yx?dwU=&v`uTI$o%^|$zx?b2=g&RvnJ<0f
zC!GD6^XH!M)gON0GtU0l`EyUa{oW7x!Lx5Tf9}bLC&$_Ey>RcT7hQk0Po8&}ow?`j
zr+(oZufOeA&s=`}&%F5X`Hff1A9Kb0(HHN2^<i9i?a5m&UAlDPwGXeae6^ddsDI<D
zot!)(;-)uV_{j_RpLy9!ZoKNgTc3M!>Tr~K>qp<-w|(T*k2*ZQ_2wr(_|g|W{w?=j
zf7|^pyXA4`fBNv1<J#}L?TuG`_ic~3^@r=+V^5vE_T&|ZXWrgtuf6d4lkYh^;ikUu
zy4&A!_E`@<z%y4I(Es~%Z+pl8{T2Q{PVwCjr+7G-&$;>uheLe&>%ZvJ>fEX8ZhPOC
zJ>mS%UOtn<IX~~}%jbOSbDsRRlOI2P>gsnp%r4w}=KM!|{EN>%^7JcT^ifwGCeL``
zi_gB-sb^nv^-~Uid-|21^2iUq@8rD?56?g2`Oi7L$=95E_ES!-KFsev{E3rae#fOt
zcgI}1boz$-PG3K#@45f#(>KhwS45wF>S1=x=^Ia9--ie9fBJ@g(@PG|e##Y>#?!7?
zs}H+k{(pEgKk%vum)C=rudbUezU%C151T#aVY5eH{PkDGFWvFRSH0lUnbTK2{><GU
zaJU8zM|S2-4;~Kfy0|+Zc{u4C=HYL~%~u@KQ?Ho+#zQ=F_cd|HeRuR7bI1L6yy4``
zVX5x?m{^BJe`o`_ymptzJO7vcD}LZ1U%@NqU-PXGJ^5WezWQ0uf8ae|{jtw~;My}6
zUUPEe+YT4=$*){GIeEv)Gv9XU(#d1re)#a&hcmk6?!%XS=fBY1@}$?@@}$?^@}$??
ca$zq0`~&y?@8fvk3!WRNuYKTK-gRsHUkatJ;{X5v

literal 0
HcmV?d00001

diff --git a/OvmfPkg/ResetVector/Build.py b/OvmfPkg/ResetVector/Build.py
new file mode 100644
index 0000000000..ff723c8fd0
--- /dev/null
+++ b/OvmfPkg/ResetVector/Build.py
@@ -0,0 +1,53 @@
+## @file
+#  Automate the process of building the various reset vector types
+#
+#  Copyright (c) 2009, Intel Corporation
+#
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+import glob
+import os
+import subprocess
+import sys
+
+def RunCommand(commandLine):
+    #print ' '.join(commandLine)
+    return subprocess.call(commandLine)
+
+for filename in glob.glob(os.path.join('Bin', '*.raw')):
+    os.remove(filename)
+
+for arch in ('ia32', 'x64'):
+    for debugType in (None, 'port80', 'serial'):
+        output = os.path.join('Bin', 'ResetVector')
+        output += '.' + arch
+        if debugType is not None:
+            output += '.' + debugType
+        output += '.raw'
+        commandLine = (
+            'nasm',
+            '-D', 'ARCH_%s' % arch.upper(),
+            '-D', 'DEBUG_%s' % str(debugType).upper(),
+            '-o', output,
+            'ResetVectorCode.asm',
+            )
+        ret = RunCommand(commandLine)
+        print '\tASM\t' + output
+        if ret != 0: sys.exit(ret)
+
+        commandLine = (
+            'python',
+            'Tools/FixupForRawSection.py',
+            output,
+            )
+        print '\tFIXUP\t' + output
+        ret = RunCommand(commandLine)
+        if ret != 0: sys.exit(ret)
+
diff --git a/OvmfPkg/ResetVector/CommonMacros.inc b/OvmfPkg/ResetVector/CommonMacros.inc
index 19c6d07a3f..c25c8663ed 100644
--- a/OvmfPkg/ResetVector/CommonMacros.inc
+++ b/OvmfPkg/ResetVector/CommonMacros.inc
@@ -1,4 +1,6 @@
 ;------------------------------------------------------------------------------
+; @file
+; Common macros used in the ResetVector VTF module.
 ;
 ; Copyright (c) 2008, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
@@ -9,25 +11,11 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   CommonMacros.inc
-;
-; Abstract:
-;
-;   Common macros used in the ResetVector VTF module.
-;
 ;------------------------------------------------------------------------------
 
 %define ADDR16_OF(x) (0x10000 - fourGigabytes + x)
 %define ADDR_OF(x) (0x100000000 - fourGigabytes + x)
 
-%macro  callEdx 1
-    mov     edx, ADDR_OF(%%returnLabel)
-    jmp     %1
-%%returnLabel:
-%endmacro
-
 %macro  OneTimeCall 1
     jmp     %1
 %1 %+ OneTimerCallReturn:
diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm b/OvmfPkg/ResetVector/DebugDisabled.asm
similarity index 51%
rename from OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm
rename to OvmfPkg/ResetVector/DebugDisabled.asm
index 75e259b0b6..78389f4e45 100644
--- a/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm
+++ b/OvmfPkg/ResetVector/DebugDisabled.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; Debug disabled
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,43 +11,16 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   Reset-16Bit-old-tools.asm
-;
-; Abstract:
-;
-;   First code exectuted by processor after resetting.
-;
 ;------------------------------------------------------------------------------
 
-BITS	16
-
-earlyInit_Real16:
+BITS    16
 
-	jmp	real16InitSerialPort
-real16SerialPortInitReturn:
-
-	jmp	to32BitFlat
-
-ALIGN	16
-
-;
-; Junk data.  Old GenFv tool will modify data here.
-;
-	DQ	0, 0
-
-;
-; Reset Vector
-;
-; This is where the processor will begin execution
-;
-	jmp	short earlyInit_Real16
-
-;
-; Junk data.  Old GenFv tool will modify data here.
-;
-ALIGN	16
+%macro  debugInitialize 0
+    ;
+    ; No initialization is required
+    ;
+%endmacro
 
-fourGigabytes:
+%macro  debugShowPostCode 1
+%endmacro
 
diff --git a/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm b/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm
index d030c0b52b..47e3c6d929 100644
--- a/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm
+++ b/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; Transition from 16 bit real mode into 32 bit flat protected mode
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,14 +11,6 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   16RealTo32Flat.asm
-;
-; Abstract:
-;
-;   Transition from 16 bit real mode into 32 bit flat protected mode
-;
 ;------------------------------------------------------------------------------
 
 %define SEC_DEFAULT_CR0  0x40000023
@@ -24,11 +18,12 @@
 
 BITS    16
 
-to32BitFlat:
+;
+; Modified:  EAX, EBX
+;
+TransitionFromReal16To32BitFlat:
 
-    writeToSerialPort '1'
-    writeToSerialPort '6'
-    writeToSerialPort ' '
+    debugShowPostCode POSTCODE_16BIT_MODE
 
     cli
 
@@ -42,10 +37,6 @@ o32 lgdt    [bx]
     mov     eax, SEC_DEFAULT_CR0
     mov     cr0, eax
 
-;    mov     eax, cr0
-;    or      al, 1
-;    mov     cr0, eax
-
     jmp     LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
 BITS    32
 jumpTo32BitAndLandHere:
@@ -53,18 +44,16 @@ jumpTo32BitAndLandHere:
     mov     eax, SEC_DEFAULT_CR4
     mov     cr4, eax
 
-    writeToSerialPort '3'
-    writeToSerialPort '2'
-    writeToSerialPort ' '
+    debugShowPostCode POSTCODE_32BIT_MODE
 
-    mov ax, LINEAR_SEL
-    mov ds, ax
-    mov es, ax
-    mov fs, ax
-    mov gs, ax
-    mov ss, ax
+    mov     ax, LINEAR_SEL
+    mov     ds, ax
+    mov     es, ax
+    mov     fs, ax
+    mov     gs, ax
+    mov     ss, ax
 
-    jmp     TransitionFrom16RealTo32FlatComplete
+    OneTimeCallRet TransitionFromReal16To32BitFlat
 
 ALIGN   2
 
@@ -77,75 +66,75 @@ ALIGN   16
 GDT_BASE:
 ; null descriptor
 NULL_SEL            equ $-GDT_BASE
-        dw 0            ; limit 15:0
-        dw 0            ; base 15:0
-        db 0            ; base 23:16
-        db 0            ; type
-        db 0            ; limit 19:16, flags
-        db 0            ; base 31:24
+    dw      0            ; limit 15:0
+    dw      0            ; base 15:0
+    db      0            ; base 23:16
+    db      0            ; type
+    db      0            ; limit 19:16, flags
+    db      0            ; base 31:24
 
 ; linear data segment descriptor
 LINEAR_SEL      equ $-GDT_BASE
-        dw 0FFFFh       ; limit 0xFFFFF
-        dw 0            ; base 0
-        db 0
-        db 092h         ; present, ring 0, data, expand-up, writable
-        db 0CFh                 ; page-granular, 32-bit
-        db 0
+    dw      0FFFFh       ; limit 0xFFFFF
+    dw      0            ; base 0
+    db      0
+    db      092h         ; present, ring 0, data, expand-up, writable
+    db      0CFh         ; page-granular, 32-bit
+    db      0
 
 ; linear code segment descriptor
 LINEAR_CODE_SEL equ $-GDT_BASE
-        dw 0FFFFh       ; limit 0xFFFFF
-        dw 0            ; base 0
-        db 0
-        db 09Ah         ; present, ring 0, data, expand-up, writable
-        db 0CFh                 ; page-granular, 32-bit
-        db 0
+    dw      0FFFFh       ; limit 0xFFFFF
+    dw      0            ; base 0
+    db      0
+    db      09Ah         ; present, ring 0, data, expand-up, writable
+    db      0CFh         ; page-granular, 32-bit
+    db      0
 
 ; system data segment descriptor
 SYS_DATA_SEL    equ $-GDT_BASE
-        dw 0FFFFh       ; limit 0xFFFFF
-        dw 0            ; base 0
-        db 0
-        db 092h         ; present, ring 0, data, expand-up, writable
-        db 0CFh                 ; page-granular, 32-bit
-        db 0
+    dw      0FFFFh       ; limit 0xFFFFF
+    dw      0            ; base 0
+    db      0
+    db      092h         ; present, ring 0, data, expand-up, writable
+    db      0CFh         ; page-granular, 32-bit
+    db      0
 
 ; system code segment descriptor
 SYS_CODE_SEL    equ $-GDT_BASE
-        dw 0FFFFh       ; limit 0xFFFFF
-        dw 0            ; base 0
-        db 0
-        db 09Ah         ; present, ring 0, data, expand-up, writable
-        db 0CFh                 ; page-granular, 32-bit
-        db 0
+    dw      0FFFFh       ; limit 0xFFFFF
+    dw      0            ; base 0
+    db      0
+    db      09Ah         ; present, ring 0, data, expand-up, writable
+    db      0CFh         ; page-granular, 32-bit
+    db      0
 
 ; spare segment descriptor
 LINEAR_CODE64_SEL  equ $-GDT_BASE
-    DW      -1                  ; LimitLow
-    DW      0                   ; BaseLow
-    DB      0                   ; BaseMid
+    DW      -1           ; LimitLow
+    DW      0            ; BaseLow
+    DB      0            ; BaseMid
     DB      9bh
-    DB      0afh                ; LimitHigh   (CS.L=1, CS.D=0)
-    DB      0                   ; BaseHigh
+    DB      0afh         ; LimitHigh   (CS.L=1, CS.D=0)
+    DB      0            ; BaseHigh
 
 ; spare segment descriptor
 SPARE4_SEL  equ $-GDT_BASE
-        dw 0            ; limit 0xFFFFF
-        dw 0            ; base 0
-        db 0
-        db 0            ; present, ring 0, data, expand-up, writable
-        db 0            ; page-granular, 32-bit
-        db 0
+    dw      0            ; limit 0xFFFFF
+    dw      0            ; base 0
+    db      0
+    db      0            ; present, ring 0, data, expand-up, writable
+    db      0            ; page-granular, 32-bit
+    db      0
 
 ; spare segment descriptor
 SPARE5_SEL  equ $-GDT_BASE
-        dw 0            ; limit 0xFFFFF
-        dw 0            ; base 0
-        db 0
-        db 0            ; present, ring 0, data, expand-up, writable
-        db 0            ; page-granular, 32-bit
-        db 0
+    dw      0            ; limit 0xFFFFF
+    dw      0            ; base 0
+    db      0
+    db      0            ; present, ring 0, data, expand-up, writable
+    db      0            ; page-granular, 32-bit
+    db      0
 
 GDT_END:
 
diff --git a/OvmfPkg/ResetVector/Ia16/Init16.asm b/OvmfPkg/ResetVector/Ia16/Init16.asm
new file mode 100644
index 0000000000..3d3d8b0267
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia16/Init16.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------
+; @file
+; 16-bit initialization code
+;
+; Copyright (c) 2008 - 2009, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+
+BITS    16
+
+;
+; @param[out] DI    'BP' to indicate boot-strap processor
+;
+EarlyBspInitReal16:
+    mov     di, 'BP'
+    jmp     short Main16
+
+;
+; @param[out] DI    'AP' to indicate application processor
+;
+EarlyApInitReal16:
+    mov     di, 'AP'
+    jmp     short Main16
+
+;
+; Modified:  EAX
+;
+; @param[in]  EAX   Initial value of the EAX register (BIST: Built-in Self Test)
+; @param[out] ESP   Initial value of the EAX register (BIST: Built-in Self Test)
+;
+EarlyInit16:
+    ;
+    ; ESP -  Initial value of the EAX register (BIST: Built-in Self Test)
+    ;
+    mov     esp, eax
+
+    debugInitialize
+
+    OneTimeCallRet EarlyInit16
+
diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
index 63aeaf6b24..0eff743183 100644
--- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; First code exectuted by processor after resetting.
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,28 +11,25 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   Reset-16Bit-vft0.asm
-;
-; Abstract:
-;
-;   First code exectuted by processor after resetting.
-;
 ;------------------------------------------------------------------------------
 
-BITS	16
-
-earlyInit_Real16:
+BITS    16
 
-	jmp	real16InitSerialPort
-real16SerialPortInitReturn:
+ALIGN   16
 
-	jmp	to32BitFlat
+applicationProcessorEntryPoint:
+;
+; Application Processors entry point
+;
+; GenFv generates code aligned on a 4k boundary which will jump to this
+; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be
+; used to wake up the application processors.
+;
+    jmp     short EarlyApInitReal16
 
-ALIGN	16
+ALIGN   8
 
-	DD	0, 0, 0
+    DD      0
 
 ;
 ; The VTF signature
@@ -39,16 +38,20 @@ ALIGN	16
 ; any fixups.
 ;
 vtfSignature:
-	DB	'V', 'T', 'F', 0
+    DB      'V', 'T', 'F', 0
+
+ALIGN   16
 
+resetVector:
 ;
 ; Reset Vector
 ;
 ; This is where the processor will begin execution
 ;
-	jmp	short earlyInit_Real16
+    wbinvd
+    jmp     short EarlyBspInitReal16
 
-ALIGN	16
+ALIGN   16
 
 fourGigabytes:
 
diff --git a/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm b/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm
index f0528d4460..a97f9cc707 100644
--- a/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm
+++ b/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; Transition from 32 bit flat protected mode into 64 bit flat protected mode
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,18 +11,13 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   32FlatTo64Flat.asm
-;
-; Abstract:
-;
-;   Transition from 32 bit flat protected mode into 64 bit flat protected mode
-;
 ;------------------------------------------------------------------------------
 
 BITS    32
 
+;
+; Modified:  EAX
+;
 Transition32FlatTo64Flat:
 
     mov     eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)
@@ -43,9 +40,7 @@ Transition32FlatTo64Flat:
 BITS    64
 jumpTo64BitAndLandHere:
 
-    writeToSerialPort '6'
-    writeToSerialPort '4'
-    writeToSerialPort ' '
+    debugShowPostCode POSTCODE_64BIT_MODE
 
     OneTimeCallRet Transition32FlatTo64Flat
 
diff --git a/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm b/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm
index e6ca6e6ffb..21b64f46e3 100644
--- a/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm
+++ b/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; Search for the Boot Firmware Volume (BFV) base address
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,14 +11,6 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   SearchForBfvBase.asm
-;
-; Abstract:
-;
-;   Search for the Boot FV Base Address
-;
 ;------------------------------------------------------------------------------
 
 ;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \
@@ -29,21 +23,21 @@
 BITS    32
 
 ;
-; Input:
-;   None
+; Modified:  EAX, EBX
+; Preserved: EDI, ESP
 ;
-; Output:
-;   EBP - BFV Base Address
-;
-; Modified:
-;   EAX, EBX
+; @param[out]  EBP  Address of Boot Firmware Volume (BFV)
 ;
 Flat32SearchForBfvBase:
 
     xor     eax, eax
 searchingForBfvHeaderLoop:
+    ;
+    ; We check for a firmware volume at every 4KB address in the top 16MB
+    ; just below 4GB.  (Addresses at 0xffHHH000 where H is any hex digit.)
+    ;
     sub     eax, 0x1000
-    cmp     eax, 0xff800000
+    cmp     eax, 0xff000000
     jb      searchedForBfvHeaderButNotFound
 
     ;
@@ -70,19 +64,23 @@ searchingForBfvHeaderLoop:
     jmp     searchedForBfvHeaderAndItWasFound
 
 searchedForBfvHeaderButNotFound:
-    writeToSerialPort '!'
-    xor     eax, eax
+    ;
+    ; Hang if the SEC entry point was not found
+    ;
+    debugShowPostCode POSTCODE_BFV_NOT_FOUND
 
-searchedForBfvHeaderAndItWasFound:
+    ;
+    ; 0xbfbfbfbf in the EAX & EBP registers helps signal what failed
+    ; for debugging purposes.
+    ;
+    mov     eax, 0xBFBFBFBF
     mov     ebp, eax
+    jmp     $
 
-    writeToSerialPort 'B'
-    writeToSerialPort 'F'
-    writeToSerialPort 'V'
-    writeToSerialPort ' '
+searchedForBfvHeaderAndItWasFound:
+    mov     ebp, eax
 
-    or      ebp, ebp
-    jz      $
+    debugShowPostCode POSTCODE_BFV_FOUND
 
     OneTimeCallRet Flat32SearchForBfvBase
 
diff --git a/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm b/OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm
similarity index 69%
rename from OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm
rename to OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm
index 9bb0cd1fa6..01d051918c 100644
--- a/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm
+++ b/OvmfPkg/ResetVector/Ia32/SearchForSecEntry.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; Search for the SEC Core entry point
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,40 +11,26 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   SearchForSecAndPeiEntry.asm
-;
-; Abstract:
-;
-;   Search for the SEC Core and PEI Core entry points
-;
 ;------------------------------------------------------------------------------
 
 BITS    32
 
 %define EFI_FV_FILETYPE_SECURITY_CORE         0x03
-%define EFI_FV_FILETYPE_PEI_CORE              0x04
 
 ;
-; Input:
-;   EBP - BFV Base Address
+; Modified:  EAX, EBX, ECX, EDX
+; Preserved: EDI, EBP, ESP
 ;
-; Output:
-;   ESI - SEC Core Entry Point Address (or 0 if not found)
-;   EDI - PEI Core Entry Point Address (or 0 if not found)
+; @param[in]   EBP  Address of Boot Firmware Volume (BFV)
+; @param[out]  ESI  SEC Core Entry Point Address
 ;
-; Modified:
-;   EAX, EBX, ECX
-;
-Flat32SearchForSecAndPeiEntries:
+Flat32SearchForSecEntryPoint:
 
     ;
     ; Initialize EBP and ESI to 0
     ;
     xor     ebx, ebx
     mov     esi, ebx
-    mov     edi, ebx
 
     ;
     ; Pass over the BFV header
@@ -50,7 +38,7 @@ Flat32SearchForSecAndPeiEntries:
     mov     eax, ebp
     mov     bx, [ebp + 0x30]
     add     eax, ebx
-    jc      doneSeachingForSecAndPeiEntries
+    jc      secEntryPointWasNotFound
 
     jmp     searchingForFfsFileHeaderLoop
 
@@ -59,17 +47,17 @@ moveForwardWhileSearchingForFfsFileHeaderLoop:
     ; Make forward progress in the search
     ;
     inc     eax
-    jc      doneSeachingForSecAndPeiEntries
+    jc      secEntryPointWasNotFound
 
 searchingForFfsFileHeaderLoop:
     test    eax, eax
-    jz      doneSeachingForSecAndPeiEntries
+    jz      secEntryPointWasNotFound
 
     ;
     ; Ensure 8 byte alignment
     ;
     add     eax, 7
-    jc      doneSeachingForSecAndPeiEntries
+    jc      secEntryPointWasNotFound
     and     al, 0xf8
 
     ;
@@ -82,7 +70,6 @@ searchingForFfsFileHeaderLoop:
     and     ecx, 0x00ffffff
     or      ecx, ecx
     jz      moveForwardWhileSearchingForFfsFileHeaderLoop
-;    jmp     $
     add     ecx, eax
     jz      jumpSinceWeFoundTheLastFfsFile
     jc      moveForwardWhileSearchingForFfsFileHeaderLoop
@@ -91,53 +78,41 @@ jumpSinceWeFoundTheLastFfsFile:
     ;
     ; There seems to be a valid file at eax
     ;
-    mov     bl, [eax + 0x12] ; BL - File Type
-    cmp     bl, EFI_FV_FILETYPE_PEI_CORE
-    je      fileTypeIsPeiCore
-    cmp     bl, EFI_FV_FILETYPE_SECURITY_CORE
+    cmp     byte [eax + 0x12], EFI_FV_FILETYPE_SECURITY_CORE ; Check File Type
     jne     readyToTryFfsFileAtEcx
 
 fileTypeIsSecCore:
-    callEdx GetEntryPointOfFfsFileReturnEdx
-    test    eax, eax
-    jz      readyToTryFfsFileAtEcx
-
-    mov     esi, eax
-    jmp     readyToTryFfsFileAtEcx
-
-fileTypeIsPeiCore:
-    callEdx GetEntryPointOfFfsFileReturnEdx
+    OneTimeCall GetEntryPointOfFfsFile
     test    eax, eax
-    jz      readyToTryFfsFileAtEcx
-
-    mov     edi, eax
+    jnz     doneSeachingForSecEntryPoint
 
 readyToTryFfsFileAtEcx:
+    ;
+    ; Try the next FFS file at ECX
+    ;
     mov     eax, ecx
     jmp     searchingForFfsFileHeaderLoop
 
-doneSeachingForSecAndPeiEntries:
+secEntryPointWasNotFound:
+    xor     eax, eax
+
+doneSeachingForSecEntryPoint:
+    mov     esi, eax
 
     test    esi, esi
     jnz     secCoreEntryPointWasFound
-    writeToSerialPort '!'
-secCoreEntryPointWasFound:
-    writeToSerialPort 'S'
-    writeToSerialPort 'E'
-    writeToSerialPort 'C'
-    writeToSerialPort ' '
 
-    test    edi, edi
-    jnz     peiCoreEntryPointWasFound
-    writeToSerialPort '!'
-peiCoreEntryPointWasFound:
-    writeToSerialPort 'P'
-    writeToSerialPort 'E'
-    writeToSerialPort 'I'
-    writeToSerialPort ' '
+secCoreEntryPointWasNotFound:
+    ;
+    ; Hang if the SEC entry point was not found
+    ;
+    debugShowPostCode POSTCODE_SEC_NOT_FOUND
+    jz      $
 
-    OneTimeCallRet Flat32SearchForSecAndPeiEntries
+secCoreEntryPointWasFound:
+    debugShowPostCode POSTCODE_SEC_FOUND
 
+    OneTimeCallRet Flat32SearchForSecEntryPoint
 
 %define EFI_SECTION_PE32                  0x10
 
@@ -152,7 +127,7 @@ peiCoreEntryPointWasFound:
 ; Modified:
 ;   EBX
 ;
-GetEntryPointOfFfsFileReturnEdx:
+GetEntryPointOfFfsFile:
     test    eax, eax
     jz      getEntryPointOfFfsFileErrorReturn
     add     eax, 0x18       ; EAX = Start of section
@@ -217,6 +192,5 @@ getEntryPointOfFfsFileErrorReturn:
     mov     eax, 0
 
 getEntryPointOfFfsFileReturn:
-    jmp     edx
-
+    OneTimeCallRet GetEntryPointOfFfsFile
 
diff --git a/OvmfPkg/ResetVector/JumpToSec.asm b/OvmfPkg/ResetVector/JumpToSec.asm
deleted file mode 100644
index d7442f0e9d..0000000000
--- a/OvmfPkg/ResetVector/JumpToSec.asm
+++ /dev/null
@@ -1,63 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2008, Intel Corporation
-; All rights reserved. This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   JumpToSec.asm
-;
-; Abstract:
-;
-;   Jump from the reset vector binary to SEC
-;
-;------------------------------------------------------------------------------
-
-BITS    32
-
-TransitionFrom16RealTo32FlatComplete:
-
-    OneTimeCall Flat32SearchForBfvBase
-
-    OneTimeCall Flat32SearchForSecAndPeiEntries
-
-    ;
-    ; ESI - SEC Core entry point
-    ; EDI - PEI Core entry point
-    ; EBP - Start of BFV
-    ;
-    ; Jump to SEC Core entry point
-    ;
-
-%ifdef ARCH_IA32
-
-    jmp     esi
-
-%else
-
-    OneTimeCall Transition32FlatTo64Flat
-BITS    64
-
-    mov     rax, 0x00000000ffffffff
-    and     rsi, rax
-    and     rdi, rax
-    and     rbp, rax
-    ;
-    ; RSI - SEC Core entry point
-    ; RDI - PEI Core entry point
-    ; RBP - Start of BFV
-    ;
-    ; Jump to SEC Core entry point
-    ;
-
-    jmp     rsi
-
-%endif
-
-
diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm
new file mode 100644
index 0000000000..bc2a3b168a
--- /dev/null
+++ b/OvmfPkg/ResetVector/Main.asm
@@ -0,0 +1,106 @@
+;------------------------------------------------------------------------------
+; @file
+; Main routine of the pre-SEC code up through the jump into SEC
+;
+; Copyright (c) 2008 - 2009, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+
+BITS    16
+
+;
+; Modified:  EBX, ECX, EDX, EBP
+;
+; @param[in,out]  RAX/EAX  Initial value of the EAX register
+;                          (BIST: Built-in Self Test)
+; @param[in,out]  DI       'BP': boot-strap processor, or
+;                          'AP': application processor
+; @param[out]     RBP/EBP  Address of Boot Firmware Volume (BFV)
+;
+; @return         None  This routine jumps to SEC and does not return
+;
+Main16:
+    OneTimeCall EarlyInit16
+
+    ;
+    ; Transition the processor from 16-bit real mode to 32-bit flat mode
+    ;
+    OneTimeCall TransitionFromReal16To32BitFlat
+
+BITS    32
+
+    ;
+    ; Search for the Boot Firmware Volume (BFV)
+    ;
+    OneTimeCall Flat32SearchForBfvBase
+
+    ;
+    ; EBP - Start of BFV
+    ;
+
+    ;
+    ; Search for the SEC entry point
+    ;
+    OneTimeCall Flat32SearchForSecEntryPoint
+
+    ;
+    ; ESI - SEC Core entry point
+    ; EBP - Start of BFV
+    ;
+
+%ifdef ARCH_IA32
+
+    ;
+    ; Restore initial EAX value into the EAX register
+    ;
+    mov     eax, esp
+
+    ;
+    ; Jump to the 32-bit SEC entry point
+    ;
+    jmp     esi
+
+%else
+
+    ;
+    ; Transition the processor from 32-bit flat mode to 64-bit flat mode
+    ;
+    OneTimeCall Transition32FlatTo64Flat
+
+BITS    64
+
+    ;
+    ; Some values were calculated in 32-bit mode.  Make sure the upper
+    ; 32-bits of 64-bit registers are zero for these values.
+    ;
+    mov     rax, 0x00000000ffffffff
+    and     rsi, rax
+    and     rbp, rax
+    and     rsp, rax
+
+    ;
+    ; RSI - SEC Core entry point
+    ; RBP - Start of BFV
+    ;
+
+    ;
+    ; Restore initial EAX value into the RAX register
+    ;
+    mov     rax, rsp
+
+    ;
+    ; Jump to the 64-bit SEC entry point
+    ;
+    jmp     rsi
+
+%endif
+
+
diff --git a/OvmfPkg/ResetVector/Port80Debug.asm b/OvmfPkg/ResetVector/Port80Debug.asm
new file mode 100644
index 0000000000..2f9d0862e8
--- /dev/null
+++ b/OvmfPkg/ResetVector/Port80Debug.asm
@@ -0,0 +1,28 @@
+;------------------------------------------------------------------------------
+; @file
+; Port 0x80 debug support macros
+;
+; Copyright (c) 2009, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+BITS    16
+
+%macro  debugInitialize 0
+    ;
+    ; No initialization is required
+    ;
+%endmacro
+
+%macro  debugShowPostCode 1
+    mov     al, %1
+    out     0x80, al
+%endmacro
+
diff --git a/OvmfPkg/ResetVector/PostCodes.inc b/OvmfPkg/ResetVector/PostCodes.inc
new file mode 100644
index 0000000000..2556aed873
--- /dev/null
+++ b/OvmfPkg/ResetVector/PostCodes.inc
@@ -0,0 +1,25 @@
+;------------------------------------------------------------------------------
+; @file
+; Definitions of POST CODES for the reset vector module
+;
+; Copyright (c) 2009, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+%define POSTCODE_16BIT_MODE     0x16
+%define POSTCODE_32BIT_MODE     0x32
+%define POSTCODE_64BIT_MODE     0x64
+
+%define POSTCODE_BFV_NOT_FOUND  0xb0
+%define POSTCODE_BFV_FOUND      0xb1
+
+%define POSTCODE_SEC_NOT_FOUND  0xf0
+%define POSTCODE_SEC_FOUND      0xf1
+
diff --git a/OvmfPkg/ResetVector/ResetVectorCode.asm b/OvmfPkg/ResetVector/ResetVectorCode.asm
index 4339505635..8b13942304 100644
--- a/OvmfPkg/ResetVector/ResetVectorCode.asm
+++ b/OvmfPkg/ResetVector/ResetVectorCode.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; This file includes all other code files to assemble the reset vector code
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,14 +11,6 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   ResetVectorCode.asm
-;
-; Abstract:
-;
-;   Create code for VTF raw section.
-;
 ;------------------------------------------------------------------------------
 
 %ifdef ARCH_IA32
@@ -29,15 +23,30 @@
 %endif
 
 %include "CommonMacros.inc"
-%include "SerialDebug.asm"
+
+%include "PostCodes.inc"
+
+%ifdef DEBUG_NONE
+  %include "DebugDisabled.asm"
+%elifdef DEBUG_PORT80
+  %include "Port80Debug.asm"
+%elifdef DEBUG_SERIAL
+  %include "SerialDebug.asm"
+%else
+  %error "No debug type was specified."
+%endif
+
 %include "Ia32/SearchForBfvBase.asm"
-%include "Ia32/SearchForSecAndPeiEntries.asm"
-%include "JumpToSec.asm"
-%include "Ia16/16RealTo32Flat.asm"
+%include "Ia32/SearchForSecEntry.asm"
 
 %ifdef ARCH_X64
 %include "Ia32/32FlatTo64Flat.asm"
 %endif
 
+%include "Ia16/16RealTo32Flat.asm"
+%include "Ia16/Init16.asm"
+
+%include "Main.asm"
+
 %include "Ia16/ResetVectorVtf0.asm"
 
diff --git a/OvmfPkg/ResetVector/SerialDebug.asm b/OvmfPkg/ResetVector/SerialDebug.asm
index 2959fa5450..8c2ffc66d3 100644
--- a/OvmfPkg/ResetVector/SerialDebug.asm
+++ b/OvmfPkg/ResetVector/SerialDebug.asm
@@ -1,6 +1,8 @@
 ;------------------------------------------------------------------------------
+; @file
+; Serial port debug support macros
 ;
-; Copyright (c) 2008, Intel Corporation
+; Copyright (c) 2008 - 2009, Intel Corporation
 ; All rights reserved. This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -9,18 +11,8 @@
 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 ;
-; Module Name:
-;
-;   SerialDebug.asm
-;
-; Abstract:
-;
-;   Serial port support macros
-;
 ;------------------------------------------------------------------------------
 
-BITS    16
-
 ;//---------------------------------------------
 ;// UART Register Offsets
 ;//---------------------------------------------
@@ -88,12 +80,38 @@ BITS    16
     out     dx, al
 %endmacro
 
-%macro  writeToSerialPort 1
+%macro  debugShowCharacter 1
     waitForSerialTxReady
     outToSerialPort 0, %1
 %endmacro
 
-real16InitSerialPort:
+%macro  debugShowHexDigit 1
+  %if (%1 < 0xa)
+    debugShowCharacter BYTE ('0' + (%1))
+  %else
+    debugShowCharacter BYTE ('a' + ((%1) - 0xa))
+  %endif
+%endmacro
+
+%macro  debugNewline 0
+    debugShowCharacter `\r`
+    debugShowCharacter `\n`
+%endmacro
+
+%macro  debugShowPostCode 1
+    debugShowHexDigit (((%1) >> 4) & 0xf)
+    debugShowHexDigit ((%1) & 0xf)
+    debugNewline
+%endmacro
+
+BITS    16
+
+%macro  debugInitialize 0
+	jmp	real16InitDebug
+real16InitDebugReturn:
+%endmacro
+
+real16InitDebug:
     ;
     ; Set communications format
     ;
@@ -110,5 +128,5 @@ real16InitSerialPort:
     ;
     outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR
 
-    jmp     real16SerialPortInitReturn
+    jmp     real16InitDebugReturn
 
-- 
2.39.2