From 89bbce116a4dabb83c1be5953b030928f2d2f378 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Tue, 4 Oct 2011 13:58:28 +0000 Subject: [PATCH] Arm Packages: Fix builds for XCODE32 toolchain git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12509 6f19259b-4bc3-4df7-8a09-765794883524 --- .../ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S | 4 ++-- .../ArmCortexA15Lib/ArmCortexA15Helper.S | 4 ++-- .../ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 6 +++--- ArmPkg/Include/AsmMacroIoLib.h | 15 +++++++++++++++ ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c | 2 +- .../ArmVExpressPkg/ArmVExpress-CTA9x4.dsc | 2 +- .../ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc | 2 +- ArmPlatformPkg/PrePi/ModuleEntryPoint.S | 2 +- ArmPlatformPkg/Sec/SecEntryPoint.S | 2 +- 9 files changed, 27 insertions(+), 12 deletions(-) diff --git a/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S b/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S index 96acde19e8..ad28d10ce2 100644 --- a/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S +++ b/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S @@ -27,7 +27,7 @@ ASM_PFX(ArmCpuSynchronizeWait): cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT // The SCU enabled is the event to tell us the Init Boot Memory is initialized bx lr - b CArmCpuSynchronizeWait + b ASM_PFX(CArmCpuSynchronizeWait) #if 0 @@ -43,7 +43,7 @@ ASM_PFX(ArmCpuSynchronizeWait): cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT // The SCU enabled is the event to tell us the Init Boot Memory is initialized beq ArmWaitScuEnabled - b CArmCpuSynchronizeWait + b ASM_PFX(CArmCpuSynchronizeWait) // IN None // OUT r0 = SCU Base Address diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S index 6b3020a93c..b3e0597ddd 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S @@ -34,11 +34,11 @@ ASM_PFX(ArmCpuSynchronizeWait): cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT // The SCU enabled is the event to tell us the Init Boot Memory is initialized beq ArmWaitGicDistributorEnabled - b CArmCpuSynchronizeWait + bx ASM_PFX(CArmCpuSynchronizeWait) // IN None ArmWaitGicDistributorEnabled: - LoadConstantToReg (_gPcd_FixedAtBuild_PcdGicDistributorBase, r0) + LoadConstantToReg (ASM_PFX(_gPcd_FixedAtBuild_PcdGicDistributorBase), r0) ldr r0, [r0] _WaitGicDistributor: ldr r1, [r0, #ARM_GIC_ICDDCR] diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S index 0d6a62b740..a66e8e7856 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S @@ -28,8 +28,8 @@ GCC_ASM_IMPORT(CArmCpuSynchronizeWait) ASM_PFX(ArmCpuSynchronizeWait): cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT // The SCU enabled is the event to tell us the Init Boot Memory is initialized - beq ArmWaitScuEnabled - b CArmCpuSynchronizeWait + beq ASM_PFX(ArmWaitScuEnabled) + b ASM_PFX(CArmCpuSynchronizeWait) // IN None // OUT r0 = SCU Base Address @@ -48,5 +48,5 @@ ASM_PFX(ArmWaitScuEnabled): add r0, r0, #A9_SCU_CONTROL_OFFSET ldr r0, [r0] cmp r0, #1 - bne ArmWaitScuEnabled + bne ASM_PFX(ArmWaitScuEnabled) bx lr diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h index 9ef3430aaa..644c654665 100644 --- a/ArmPkg/Include/AsmMacroIoLib.h +++ b/ArmPkg/Include/AsmMacroIoLib.h @@ -119,6 +119,21 @@ .long (_Data) ; \ 1: +// Convert the (ClusterId,CoreId) into a Core Position +// We assume there are 4 cores per cluster +#define GetCorePositionInStack(Pos, MpId, Tmp) \ + lsr Pos, MpId, #6 ; \ + and Tmp, MpId, #3 ; \ + add Pos, Pos, Tmp + +// Reserve a region at the top of the Primary Core stack +// for Global variables for the XIP phase +#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \ + and Tmp, GlobalSize, #7 ; \ + rsbne Tmp, Tmp, #8 ; \ + add GlobalSize, GlobalSize, Tmp ; \ + sub sp, StackTop, GlobalSize + #elif defined (__GNUC__) diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c index d6f3f1b709..61295a6580 100644 --- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c +++ b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c @@ -184,7 +184,7 @@ GetPerformanceCounterProperties ( if (EndValue != NULL) { // Timer counts down to 0x0 - *EndValue = 0xFFFFFFFFFFFFFFFF;; + *EndValue = 0xFFFFFFFFFFFFFFFFUL; } return (UINT64)ArmArchTimerGetTimerFreq (); diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc index d2c13a9ff7..73aff703b3 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc @@ -68,7 +68,7 @@ GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 - XCODE:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 + XCODE:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4 ################################################################################ # diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc index f2a96cb968..c4da8a1f18 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc @@ -56,7 +56,7 @@ GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM - XCODE:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM + XCODE:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM ################################################################################ # diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S index e19102e72f..bb1d99449f 100755 --- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S +++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S @@ -77,7 +77,7 @@ _SetupStack: _GetStackBase: // Compute Base of Normal stacks for CPU Cores // Is it MpCore system - bl ArmIsMpCore + bl ASM_PFX(ArmIsMpCore) cmp r0, #0 // Case it is not an MP Core system. Just setup the primary core beq _SetupUnicoreStack diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S index f92a2dffba..87de96e916 100644 --- a/ArmPlatformPkg/Sec/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/SecEntryPoint.S @@ -42,7 +42,7 @@ ASM_PFX(_ModuleEntryPoint): blx ASM_PFX(ArmPlatformSecBootAction) // Set VBAR to the start of the exception vectors in Secure Mode - ldr r0, =SecVectorTable + LoadConstantToReg (ASM_PFX(SecVectorTable), r0) bl ASM_PFX(ArmWriteVBar) _IdentifyCpu: -- 2.39.2