From 9d6b024ded89621f1a643d0ddea6904375c4cc67 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Fri, 28 Sep 2012 09:52:11 +0000 Subject: [PATCH] ArmPlatformPkg/Sec: Moved Exception Vector Table to ArmPkg/DebugAgentBaseLib In case a DebugAgent library is supported for a specific debugger, we would expect the exception be caught by DebugAgentLib. The DebugAgentBaseLib exposes the cause of the exception to the user in the Serial Terminal. Signed-off-by: Olivier Martin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13765 6f19259b-4bc3-4df7-8a09-765794883524 --- .../DebugAgentException.S | 276 ++++++++++++++++++ .../DebugAgentException.asm | 273 +++++++++++++++++ .../DebugAgentSymbolsBaseLib.c} | 16 +- .../DebugAgentSymbolsBaseLib.inf} | 12 +- ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc | 2 +- ArmPlatformPkg/ArmPlatformPkg.dsc | 4 +- .../ArmRealViewEbPkg/ArmRealViewEb.dsc.inc | 2 +- .../ArmVExpressPkg/ArmVExpress.dsc.inc | 2 +- ArmPlatformPkg/Sec/Exception.S | 98 ------- ArmPlatformPkg/Sec/Exception.asm | 91 ------ ArmPlatformPkg/Sec/Sec.c | 45 --- ArmPlatformPkg/Sec/Sec.inf | 2 - ArmPlatformPkg/Sec/SecEntryPoint.S | 6 - ArmPlatformPkg/Sec/SecEntryPoint.asm | 6 - ArmPlatformPkg/Sec/SecInternal.h | 6 - 15 files changed, 577 insertions(+), 264 deletions(-) create mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.S create mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.asm rename ArmPkg/Library/{DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.c => DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c} (93%) mode change 100755 => 100644 rename ArmPkg/Library/{DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf => DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf} (77%) mode change 100755 => 100644 delete mode 100644 ArmPlatformPkg/Sec/Exception.S delete mode 100644 ArmPlatformPkg/Sec/Exception.asm diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.S new file mode 100644 index 0000000000..3c17386766 --- /dev/null +++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.S @@ -0,0 +1,276 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+# Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#------------------------------------------------------------------------------ + +#include + +/* + +This is the stack constructed by the exception handler (low address to high address) + # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM + Reg Offset + === ====== + R0 0x00 # stmfd SP!,{R0-R12} + R1 0x04 + R2 0x08 + R3 0x0c + R4 0x10 + R5 0x14 + R6 0x18 + R7 0x1c + R8 0x20 + R9 0x24 + R10 0x28 + R11 0x2c + R12 0x30 + SP 0x34 # reserved via adding 0x20 (32) to the SP + LR 0x38 + PC 0x3c + CPSR 0x40 + DFSR 0x44 + DFAR 0x48 + IFSR 0x4c + IFAR 0x50 + + LR 0x54 # SVC Link register (we need to restore it) + + LR 0x58 # pushed by srsfd + CPSR 0x5c + + */ + +GCC_ASM_EXPORT(DebugAgentVectorTable) +GCC_ASM_IMPORT(DefaultExceptionHandler) + +.text +#if !defined(__APPLE__) +.fpu neon @ makes vpush/vpop assemble +#endif +.align 5 + + +// +// This code gets copied to the ARM vector table +// ExceptionHandlersStart - ExceptionHandlersEnd gets copied +// +ASM_PFX(DebugAgentVectorTable): + b ASM_PFX(ResetEntry) + b ASM_PFX(UndefinedInstructionEntry) + b ASM_PFX(SoftwareInterruptEntry) + b ASM_PFX(PrefetchAbortEntry) + b ASM_PFX(DataAbortEntry) + b ASM_PFX(ReservedExceptionEntry) + b ASM_PFX(IrqEntry) + b ASM_PFX(FiqEntry) + +ASM_PFX(ResetEntry): + srsdb #0x13! @ Store return state on SVC stack + @ We are already in SVC mode + + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#0 @ ExceptionType + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(UndefinedInstructionEntry): + sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry + srsdb #0x13! @ Store return state on SVC stack + cps #0x13 @ Switch to SVC for common stack + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#1 @ ExceptionType + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(SoftwareInterruptEntry): + sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry + srsdb #0x13! @ Store return state on SVC stack + @ We are already in SVC mode + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#2 @ ExceptionType + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(PrefetchAbortEntry): + sub LR,LR,#4 + srsdb #0x13! @ Store return state on SVC stack + cps #0x13 @ Switch to SVC for common stack + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#3 @ ExceptionType + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(DataAbortEntry): + sub LR,LR,#8 + srsdb #0x13! @ Store return state on SVC stack + cps #0x13 @ Switch to SVC for common stack + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#4 + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(ReservedExceptionEntry): + srsdb #0x13! @ Store return state on SVC stack + cps #0x13 @ Switch to SVC for common stack + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#5 + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(IrqEntry): + sub LR,LR,#4 + srsdb #0x13! @ Store return state on SVC stack + cps #0x13 @ Switch to SVC for common stack + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + + mov R0,#6 @ ExceptionType + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +ASM_PFX(FiqEntry): + sub LR,LR,#4 + srsdb #0x13! @ Store return state on SVC stack + cps #0x13 @ Switch to SVC for common stack + stmfd SP!,{LR} @ Store the link register for the current mode + sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} @ Store the register state + @ Since we have already switch to SVC R8_fiq - R12_fiq + @ never get used or saved + mov R0,#7 @ ExceptionType + ldr R1,ASM_PFX(CommonExceptionEntry) + bx R1 + +// +// This gets patched by the C code that patches in the vector table +// +ASM_PFX(CommonExceptionEntry): + .word ASM_PFX(AsmCommonExceptionEntry) + +ASM_PFX(ExceptionHandlersEnd): + +// +// This code runs from CpuDxe driver loaded address. It is patched into +// CommonExceptionEntry. +// +ASM_PFX(AsmCommonExceptionEntry): + mrc p15, 0, R1, c6, c0, 2 @ Read IFAR + str R1, [SP, #0x50] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR + + mrc p15, 0, R1, c5, c0, 1 @ Read IFSR + str R1, [SP, #0x4c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR + + mrc p15, 0, R1, c6, c0, 0 @ Read DFAR + str R1, [SP, #0x48] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR + + mrc p15, 0, R1, c5, c0, 0 @ Read DFSR + str R1, [SP, #0x44] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR + + ldr R1, [SP, #0x5c] @ srsdb saved pre-exception CPSR on the stack + str R1, [SP, #0x40] @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR + + add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR + and R3, R1, #0x1f @ Check CPSR to see if User or System Mode + cmp R3, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1df)) + cmpne R3, #0x10 @ + stmeqed R2, {lr}^ @ save unbanked lr + @ else + stmneed R2, {lr} @ save SVC lr + + + ldr R5, [SP, #0x58] @ PC is the LR pushed by srsfd + @ Check to see if we have to adjust for Thumb entry + sub r4, r0, #1 @ if (ExceptionType == 1 || ExceptionType ==2)) { + cmp r4, #1 @ // UND & SVC have differnt LR adjust for Thumb + bhi NoAdjustNeeded + + tst r1, #0x20 @ if ((CPSR & T)) == T) { // Thumb Mode on entry + addne R5, R5, #2 @ PC += 2@ + str R5,[SP,#0x58] @ Update LR value pused by srsfd + +NoAdjustNeeded: + + str R5, [SP, #0x3c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC + + sub R1, SP, #0x60 @ We pused 0x60 bytes on the stack + str R1, [SP, #0x34] @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP + + @ R0 is ExceptionType + mov R1,SP @ R1 is SystemContext + +#if (FixedPcdGet32(PcdVFPEnabled)) + vpush {d0-d15} @ save vstm registers in case they are used in optimizations +#endif + +/* +VOID +EFIAPI +DefaultExceptionHandler ( + IN EFI_EXCEPTION_TYPE ExceptionType, R0 + IN OUT EFI_SYSTEM_CONTEXT SystemContext R1 + ) + +*/ + blx ASM_PFX(DefaultExceptionHandler) @ Call exception handler + +#if (FixedPcdGet32(PcdVFPEnabled)) + vpop {d0-d15} +#endif + + ldr R1, [SP, #0x4c] @ Restore EFI_SYSTEM_CONTEXT_ARM.IFSR + mcr p15, 0, R1, c5, c0, 1 @ Write IFSR + + ldr R1, [SP, #0x44] @ sRestore EFI_SYSTEM_CONTEXT_ARM.DFSR + mcr p15, 0, R1, c5, c0, 0 @ Write DFSR + + ldr R1,[SP,#0x3c] @ EFI_SYSTEM_CONTEXT_ARM.PC + str R1,[SP,#0x58] @ Store it back to srsfd stack slot so it can be restored + + ldr R1,[SP,#0x40] @ EFI_SYSTEM_CONTEXT_ARM.CPSR + str R1,[SP,#0x5c] @ Store it back to srsfd stack slot so it can be restored + + add R3, SP, #0x54 @ Make R3 point to SVC LR saved on entry + add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR + and R1, R1, #0x1f @ Check to see if User or System Mode + cmp R1, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f)) + cmpne R1, #0x10 @ + ldmeqed R2, {lr}^ @ restore unbanked lr + @ else + ldmneed R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR} + + ldmfd SP!,{R0-R12} @ Restore general purpose registers + @ Exception handler can not change SP + + add SP,SP,#0x20 @ Clear out the remaining stack space + ldmfd SP!,{LR} @ restore the link register for this context + rfefd SP! @ return from exception via srsfd stack slot + diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.asm b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.asm new file mode 100644 index 0000000000..f281c0603f --- /dev/null +++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentException.asm @@ -0,0 +1,273 @@ +//------------------------------------------------------------------------------ +// +// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+// Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
+// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +//------------------------------------------------------------------------------ + +#include + +/* + +This is the stack constructed by the exception handler (low address to high address) + # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM + Reg Offset + === ====== + R0 0x00 # stmfd SP!,{R0-R12} + R1 0x04 + R2 0x08 + R3 0x0c + R4 0x10 + R5 0x14 + R6 0x18 + R7 0x1c + R8 0x20 + R9 0x24 + R10 0x28 + R11 0x2c + R12 0x30 + SP 0x34 # reserved via adding 0x20 (32) to the SP + LR 0x38 + PC 0x3c + CPSR 0x40 + DFSR 0x44 + DFAR 0x48 + IFSR 0x4c + IFAR 0x50 + + LR 0x54 # SVC Link register (we need to restore it) + + LR 0x58 # pushed by srsfd + CPSR 0x5c + + */ + + EXPORT DebugAgentVectorTable + IMPORT DefaultExceptionHandler + + PRESERVE8 + AREA DebugAgentException, CODE, READONLY, CODEALIGN, ALIGN=5 + +// +// This code gets copied to the ARM vector table +// ExceptionHandlersStart - ExceptionHandlersEnd gets copied +// +DebugAgentVectorTable FUNCTION + b ResetEntry + b UndefinedInstructionEntry + b SoftwareInterruptEntry + b PrefetchAbortEntry + b DataAbortEntry + b ReservedExceptionEntry + b IrqEntry + b FiqEntry + ENDFUNC + +ResetEntry + srsfd #0x13! ; Store return state on SVC stack + ; We are already in SVC mode + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#0 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +UndefinedInstructionEntry + sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry + srsfd #0x13! ; Store return state on SVC stack + cps #0x13 ; Switch to SVC for common stack + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#1 ; ExceptionType + ldr R1,CommonExceptionEntry; + bx R1 + +SoftwareInterruptEntry + sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry + srsfd #0x13! ; Store return state on SVC stack + ; We are already in SVC mode + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#2 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +PrefetchAbortEntry + sub LR,LR,#4 + srsfd #0x13! ; Store return state on SVC stack + cps #0x13 ; Switch to SVC for common stack + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#3 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +DataAbortEntry + sub LR,LR,#8 + srsfd #0x13! ; Store return state on SVC stack + cps #0x13 ; Switch to SVC for common stack + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#4 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +ReservedExceptionEntry + srsfd #0x13! ; Store return state on SVC stack + cps #0x13 ; Switch to SVC for common stack + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#5 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +IrqEntry + sub LR,LR,#4 + srsfd #0x13! ; Store return state on SVC stack + cps #0x13 ; Switch to SVC for common stack + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + + mov R0,#6 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +FiqEntry + sub LR,LR,#4 + srsfd #0x13! ; Store return state on SVC stack + cps #0x13 ; Switch to SVC for common stack + stmfd SP!,{LR} ; Store the link register for the current mode + sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR + stmfd SP!,{R0-R12} ; Store the register state + ; Since we have already switch to SVC R8_fiq - R12_fiq + ; never get used or saved + mov R0,#7 ; ExceptionType + ldr R1,CommonExceptionEntry + bx R1 + +// +// This gets patched by the C code that patches in the vector table +// +CommonExceptionEntry + dcd AsmCommonExceptionEntry + +ExceptionHandlersEnd + +// +// This code runs from CpuDxe driver loaded address. It is patched into +// CommonExceptionEntry. +// +AsmCommonExceptionEntry + mrc p15, 0, R1, c6, c0, 2 ; Read IFAR + str R1, [SP, #0x50] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR + + mrc p15, 0, R1, c5, c0, 1 ; Read IFSR + str R1, [SP, #0x4c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR + + mrc p15, 0, R1, c6, c0, 0 ; Read DFAR + str R1, [SP, #0x48] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR + + mrc p15, 0, R1, c5, c0, 0 ; Read DFSR + str R1, [SP, #0x44] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR + + ldr R1, [SP, #0x5c] ; srsfd saved pre-exception CPSR on the stack + str R1, [SP, #0x40] ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR + + add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR + and R3, R1, #0x1f ; Check CPSR to see if User or System Mode + cmp R3, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1df)) + cmpne R3, #0x10 ; + stmeqed R2, {lr}^ ; save unbanked lr + ; else + stmneed R2, {lr} ; save SVC lr + + + ldr R5, [SP, #0x58] ; PC is the LR pushed by srsfd + ; Check to see if we have to adjust for Thumb entry + sub r4, r0, #1 ; if (ExceptionType == 1 || ExceptionType ==2)) { + cmp r4, #1 ; // UND & SVC have differnt LR adjust for Thumb + bhi NoAdjustNeeded + + tst r1, #0x20 ; if ((CPSR & T)) == T) { // Thumb Mode on entry + addne R5, R5, #2 ; PC += 2; + str R5,[SP,#0x58] ; Update LR value pused by srsfd + +NoAdjustNeeded + + str R5, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC + + sub R1, SP, #0x60 ; We pused 0x60 bytes on the stack + str R1, [SP, #0x34] ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP + + ; R0 is ExceptionType + mov R1,SP ; R1 is SystemContext + +#if (FixedPcdGet32(PcdVFPEnabled)) + vpush {d0-d15} ; save vstm registers in case they are used in optimizations +#endif + +/* +VOID +EFIAPI +DefaultExceptionHandler ( + IN EFI_EXCEPTION_TYPE ExceptionType, R0 + IN OUT EFI_SYSTEM_CONTEXT SystemContext R1 + ) + +*/ + blx DefaultExceptionHandler ; Call exception handler + +#if (FixedPcdGet32(PcdVFPEnabled)) + vpop {d0-d15} +#endif + + ldr R1, [SP, #0x4c] ; Restore EFI_SYSTEM_CONTEXT_ARM.IFSR + mcr p15, 0, R1, c5, c0, 1 ; Write IFSR + + ldr R1, [SP, #0x44] ; sRestore EFI_SYSTEM_CONTEXT_ARM.DFSR + mcr p15, 0, R1, c5, c0, 0 ; Write DFSR + + ldr R1,[SP,#0x3c] ; EFI_SYSTEM_CONTEXT_ARM.PC + str R1,[SP,#0x58] ; Store it back to srsfd stack slot so it can be restored + + ldr R1,[SP,#0x40] ; EFI_SYSTEM_CONTEXT_ARM.CPSR + str R1,[SP,#0x5c] ; Store it back to srsfd stack slot so it can be restored + + add R3, SP, #0x54 ; Make R3 point to SVC LR saved on entry + add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR + and R1, R1, #0x1f ; Check to see if User or System Mode + cmp R1, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f)) + cmpne R1, #0x10 ; + ldmeqed R2, {lr}^ ; restore unbanked lr + ; else + ldmneed R3, {lr} ; restore SVC lr, via ldmfd SP!, {LR} + + ldmfd SP!,{R0-R12} ; Restore general purpose registers + ; Exception handler can not change SP + + add SP,SP,#0x20 ; Clear out the remaining stack space + ldmfd SP!,{LR} ; restore the link register for this context + rfefd SP! ; return from exception via srsfd stack slot + + END diff --git a/ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.c b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c old mode 100755 new mode 100644 similarity index 93% rename from ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.c rename to ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c index 5faac3339c..5d986779ee --- a/ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.c +++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c @@ -1,7 +1,7 @@ /** @file * Main file supporting the SEC Phase for Versatile Express * -* Copyright (c) 2011, ARM Limited. All rights reserved. +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -14,6 +14,7 @@ **/ #include +#include #include #include #include @@ -28,6 +29,13 @@ #define GET_OCCUPIED_SIZE(ActualSize, Alignment) \ (ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)) + +// Vector Table for Sec Phase +VOID +DebugAgentVectorTable ( + VOID + ); + /** Returns the highest bit set of the State field @@ -275,6 +283,12 @@ InitializeDebugAgent ( EFI_FFS_FILE_HEADER *FfsHeader; PE_COFF_LOADER_IMAGE_CONTEXT ImageContext; + // Now we've got UART, make the check: + // - The Vector table must be 32-byte aligned + //TODO: Define a macro for the ARM Exception Table + ASSERT(((UINT32)DebugAgentVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); + ArmWriteVBar (DebugAgentVectorTable); + // We use InitFlag to know if DebugAgent has been intialized from // Sec (DEBUG_AGENT_INIT_PREMEM_SEC) or PrePi (DEBUG_AGENT_INIT_POSTMEM_SEC) // modules diff --git a/ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf old mode 100755 new mode 100644 similarity index 77% rename from ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf rename to ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf index e2c7240827..1cf0b33524 --- a/ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf +++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2011, ARM Limited. All rights reserved. +# Copyright (c) 2011-2012, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -13,22 +13,26 @@ [Defines] INF_VERSION = 0x00010005 - BASE_NAME = DebugAgentSymbolsOnlyLib + BASE_NAME = DebugAgentSymbolsBaseLib FILE_GUID = 9055e2e0-9b33-11e0-a7d7-0002a5d5c51b MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = DebugAgentLib [Sources.common] - DebugAgentSymbolsOnlyLib.c - + DebugAgentSymbolsBaseLib.c + DebugAgentException.asm | RVCT + DebugAgentException.S | GCC + [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec ArmPkg/ArmPkg.dec [LibraryClasses] + ArmLib DebugLib + DefaultExceptionHandlerLib PcdLib PeCoffExtraActionLib PeCoffLib diff --git a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc index 10959930ea..02778a807f 100644 --- a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc +++ b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc @@ -115,7 +115,7 @@ ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf - DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf + DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf diff --git a/ArmPlatformPkg/ArmPlatformPkg.dsc b/ArmPlatformPkg/ArmPlatformPkg.dsc index 5b107c4b37..c9ef38510f 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dsc +++ b/ArmPlatformPkg/ArmPlatformPkg.dsc @@ -120,7 +120,7 @@ ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf + DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf [LibraryClasses.common.PEI_CORE] HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf @@ -413,4 +413,4 @@ # MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf ArmPlatformPkg/Bds/Bds.inf - + diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc index 486992f5eb..9d35b6fc6a 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc +++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc @@ -105,7 +105,7 @@ ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf - DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf + DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf # Uncomment to turn on GDB stub in SEC. #DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc index 97f21d92c8..59c821a2f0 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc @@ -106,7 +106,7 @@ ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsOnlyLib/DebugAgentSymbolsOnlyLib.inf + DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf !ifdef $(EDK2_SKIP_PEICORE) PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf diff --git a/ArmPlatformPkg/Sec/Exception.S b/ArmPlatformPkg/Sec/Exception.S deleted file mode 100644 index 14e1fa8c1d..0000000000 --- a/ArmPlatformPkg/Sec/Exception.S +++ /dev/null @@ -1,98 +0,0 @@ -// -// Copyright (c) 2011, ARM Limited. All rights reserved. -// -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include -#include -#include "SecInternal.h" - -.text -.align 5 - -GCC_ASM_IMPORT(SecCommonExceptionEntry) -GCC_ASM_EXPORT(SecVectorTable) - -//============================================================ -// Default Exception Handlers -//============================================================ - - -ASM_PFX(SecVectorTable): - b _DefaultResetHandler - b _DefaultUndefined - b _DefaultSWI - b _DefaultPrefetchAbort - b _DefaultDataAbort - b _DefaultReserved - b _DefaultIrq - b _DefaultFiq - -// -// Default Exception handlers: There is no plan to return from any of these exceptions. -// No context saving at all. -// -_DefaultResetHandler: - mov r1, lr - # Switch to SVC for common stack - cps #0x13 - mov r0, #0 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultUndefined: - sub r1, LR, #4 - # Switch to SVC for common stack - cps #0x13 - mov r0, #1 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultSWI: - sub r1, LR, #4 - # Switch to SVC for common stack - cps #0x13 - mov r0, #2 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultPrefetchAbort: - sub r1, LR, #4 - # Switch to SVC for common stack - cps #0x13 - mov r0, #3 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultDataAbort: - sub r1, LR, #8 - # Switch to SVC for common stack - cps #0x13 - mov r0, #4 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultReserved: - mov r1, lr - # Switch to SVC for common stack - cps #0x13 - mov r0, #5 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultIrq: - sub r1, LR, #4 - # Switch to SVC for common stack - cps #0x13 - mov r0, #6 - blx ASM_PFX(SecCommonExceptionEntry) - -_DefaultFiq: - sub r1, LR, #4 - # Switch to SVC for common stack - cps #0x13 - mov r0, #7 - blx ASM_PFX(SecCommonExceptionEntry) - diff --git a/ArmPlatformPkg/Sec/Exception.asm b/ArmPlatformPkg/Sec/Exception.asm deleted file mode 100644 index cf3825bc6a..0000000000 --- a/ArmPlatformPkg/Sec/Exception.asm +++ /dev/null @@ -1,91 +0,0 @@ -// -// Copyright (c) 2011, ARM Limited. All rights reserved. -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// - -#include -#include -#include - - IMPORT SecCommonExceptionEntry - EXPORT SecVectorTable - - PRESERVE8 - AREA SecException, CODE, READONLY, CODEALIGN, ALIGN=5 - -//============================================================ -//Default Exception Handlers -//============================================================ - - -SecVectorTable - b _DefaultResetHandler - b _DefaultUndefined - b _DefaultSWI - b _DefaultPrefetchAbort - b _DefaultDataAbort - b _DefaultReserved - b _DefaultIrq - b _DefaultFiq - -// -// Default Exception handlers: There is no plan to return from any of these exceptions. -// No context saving at all. -// -_DefaultResetHandler - mov r1, lr - cps #0x13 ; Switch to SVC for common stack - mov r0, #0 - blx SecCommonExceptionEntry - -_DefaultUndefined - sub r1, LR - cps #0x13 ; Switch to SVC for common stack - mov r0, #1 - blx SecCommonExceptionEntry - -_DefaultSWI - sub r1, LR, #4 - cps #0x13 ; Switch to SVC for common stack - mov r0, #2 - blx SecCommonExceptionEntry - -_DefaultPrefetchAbort - sub r1, LR, #4 - cps #0x13 ; Switch to SVC for common stack - mov r0, #3 - blx SecCommonExceptionEntry - -_DefaultDataAbort - sub r1, LR, #8 - cps #0x13 ; Switch to SVC for common stack - mov r0, #4 - blx SecCommonExceptionEntry - -_DefaultReserved - mov r1, lr - cps #0x13 ; Switch to SVC for common stack - mov r0, #5 - blx SecCommonExceptionEntry - -_DefaultIrq - sub r1, LR, #4 - cps #0x13 ; Switch to SVC for common stack - mov r0, #6 - blx SecCommonExceptionEntry - -_DefaultFiq - sub r1, LR, #4 - cps #0x13 ; Switch to SVC for common stack - mov r0, #7 - blx SecCommonExceptionEntry - - END diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c index b8cc4973d8..55807ec9d9 100644 --- a/ArmPlatformPkg/Sec/Sec.c +++ b/ArmPlatformPkg/Sec/Sec.c @@ -80,10 +80,6 @@ CEntryPoint ( InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL); SaveAndSetDebugTimerInterrupt (TRUE); - // Now we've got UART, make the check: - // - The Vector table must be 32-byte aligned - ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0); - // Enable the GIC distributor and CPU Interface // - no other Interrupts are enabled, doesn't have to worry about the priority. // - all the cores are in secure state, use secure SGI's @@ -197,44 +193,3 @@ NonTrustedWorldTransition ( ASSERT (FALSE); } -VOID -SecCommonExceptionEntry ( - IN UINT32 Entry, - IN UINT32 LR - ) -{ - CHAR8 Buffer[100]; - UINTN CharCount; - - switch (Entry) { - case 0: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR); - break; - case 1: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR); - break; - case 2: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR); - break; - case 3: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR); - break; - case 4: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR); - break; - case 5: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR); - break; - case 6: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR); - break; - case 7: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR); - break; - default: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR); - break; - } - SerialPortWrite ((UINT8 *) Buffer, CharCount); - while(1); -} diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf index 0b7a9c04e8..55ad00744c 100644 --- a/ArmPlatformPkg/Sec/Sec.inf +++ b/ArmPlatformPkg/Sec/Sec.inf @@ -26,8 +26,6 @@ Sec.c SecEntryPoint.S | GCC SecEntryPoint.asm | RVCT - Exception.asm | RVCT - Exception.S | GCC [Packages] MdePkg/MdePkg.dec diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S index 5095c41697..92035a1ffe 100644 --- a/ArmPlatformPkg/Sec/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/SecEntryPoint.S @@ -23,9 +23,7 @@ GCC_ASM_IMPORT(ArmPlatformSecBootAction) GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit) GCC_ASM_IMPORT(ArmDisableInterrupts) GCC_ASM_IMPORT(ArmDisableCachesAndMmu) -GCC_ASM_IMPORT(ArmWriteVBar) GCC_ASM_IMPORT(ArmReadMpidr) -GCC_ASM_IMPORT(SecVectorTable) GCC_ASM_IMPORT(ArmCallWFE) GCC_ASM_EXPORT(_ModuleEntryPoint) @@ -44,10 +42,6 @@ ASM_PFX(_ModuleEntryPoint): // Jump to Platform Specific Boot Action function blx ASM_PFX(ArmPlatformSecBootAction) - // Set VBAR to the start of the exception vectors in Secure Mode - LoadConstantToReg (ASM_PFX(SecVectorTable), r0) - bl ASM_PFX(ArmWriteVBar) - _IdentifyCpu: // Identify CPU ID bl ASM_PFX(ArmReadMpidr) diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.asm b/ArmPlatformPkg/Sec/SecEntryPoint.asm index e0d5922f15..42d2b0268f 100644 --- a/ArmPlatformPkg/Sec/SecEntryPoint.asm +++ b/ArmPlatformPkg/Sec/SecEntryPoint.asm @@ -22,10 +22,8 @@ IMPORT ArmPlatformSecBootMemoryInit IMPORT ArmDisableInterrupts IMPORT ArmDisableCachesAndMmu - IMPORT ArmWriteVBar IMPORT ArmReadMpidr IMPORT ArmCallWFE - IMPORT SecVectorTable EXPORT _ModuleEntryPoint PRESERVE8 @@ -46,10 +44,6 @@ _ModuleEntryPoint FUNCTION // Jump to Platform Specific Boot Action function blx ArmPlatformSecBootAction - // Set VBAR to the start of the exception vectors in Secure Mode - ldr r0, =SecVectorTable - blx ArmWriteVBar - _IdentifyCpu // Identify CPU ID bl ArmReadMpidr diff --git a/ArmPlatformPkg/Sec/SecInternal.h b/ArmPlatformPkg/Sec/SecInternal.h index 34a6feab1e..8bc21389e7 100644 --- a/ArmPlatformPkg/Sec/SecInternal.h +++ b/ArmPlatformPkg/Sec/SecInternal.h @@ -44,12 +44,6 @@ ArmSetupGicNonSecure ( IN INTN GicInterruptInterfaceBase ); -// Vector Table for Sec Phase -VOID -SecVectorTable ( - VOID - ); - VOID enter_monitor_mode ( IN UINTN MonitorEntryPoint, -- 2.39.2