From 9d6cdba3b35212ff813e847420372582729b5991 Mon Sep 17 00:00:00 2001 From: David Wei Date: Fri, 13 Feb 2015 02:13:43 +0000 Subject: [PATCH 1/1] Add patch-able PCD to support binary modification of MRC module. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16847 6f19259b-4bc3-4df7-8a09-765794883524 --- Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec | 111 ++++++++++++++++++ 1 file changed, 111 insertions(+) diff --git a/Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec b/Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec index 38b975498c..b003354892 100644 --- a/Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec +++ b/Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec @@ -119,3 +119,114 @@ gVlvRefCodePkgTokenSpaceGuid.PcdCeAtaSupport|FALSE|BOOLEAN|0x12 gVlvRefCodePkgTokenSpaceGuid.PcdMmcSdMultiBlockSupport|TRUE|BOOLEAN|0x13 +[PcdsPatchableInModule] + + ## Memory Down or DIMM slot.

+ # 0 - DIMM
+ # 1 - Memory Down
+ # @Prompt Enable Memory Down + # @ValidList 0x80000001 | 0, 1 + gVlvRefCodePkgTokenSpaceGuid.PcdEnableMemoryDown|1|UINT8|0x20000000 + + ## Memory Parameter Patchable.

+ # 0 - Fixed Parameter for MinnowBoard Max
+ # 1 - Patchable Parameter for Customization
+ # @Prompt Memory Parameter Patchable. + # @ValidList 0x80000001 | 0, 1 + gVlvRefCodePkgTokenSpaceGuid.PcdMemoryParameterPatchable|FALSE|BOOLEAN|0x20000010 + + ## The speed of DRAM.

+ # 0 - 800 MHz
+ # 1 - 1066 MHz
+ # 2 - 1333 MHz
+ # 3 - 1600 MHz
+ # @Prompt DRAM Speed + # @ValidList 0x80000001 | 0, 1, 2, 3 + gVlvRefCodePkgTokenSpaceGuid.PcdDramSpeed|1|UINT8|0x20000001 + + ## DRAM Type.

+ # 0 - DDR3
+ # 1 - DDR3L
+ # 2 - DDR3U
+ # 3 - DDR3All
+ # 4 - LPDDR2
+ # 5 - LPDDR3
+ # 6 - DDR4
+ # @Prompt DRAM Type + # @ValidList 0x80000001 | 0, 1, 2, 3, 4, 5, 6 + gVlvRefCodePkgTokenSpaceGuid.PcdDramType|1|UINT8|0x20000002 + + ## Please populate DIMM slot 0 if only one DIMM is supported.

+ # 0 - Disable
+ # 1 - Enable
+ # @Prompt DIMM 0 Enable + # @ValidList 0x80000001 | 0, 1 + gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm0|1|UINT8|0x20000003 + + ## DIMM 1 has to be identical to DIMM 0.

+ # 0 - Disable
+ # 1 - Enable
+ # @Prompt DIMM 1 Enable Type + # @ValidList 0x80000001 | 0, 1 + gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm1|0|UINT8|0x20000004 + + ## DRAM device data width.

+ # 0 - x8
+ # 1 - x16
+ # 2 - x32
+ # @Prompt DIMM_DWIDTH + # @ValidList 0x80000001 | 0, 1, 2 + gVlvRefCodePkgTokenSpaceGuid.PcdDimmDataWidth|1|UINT8|0x20000005 + + ## DRAM device data density.

+ # 0 - 1 Gbit
+ # 1 - 2 Gbit
+ # 2 - 4 Gbit
+ # 3 - 8 Gbit
+ # @Prompt DIMM_Density + # @ValidList 0x80000001 | 0, 1, 2, 3 + gVlvRefCodePkgTokenSpaceGuid.PcdDimmDensity|2|UINT8|0x20000006 + + ## DRAM device data bus width.

+ # 0 - 8 bits
+ # 1 - 16 bits
+ # 2 - 32 bits
+ # 3 - 64 bits
+ # @Prompt DIMM_BusWidth + # @ValidList 0x80000001 | 0, 1, 2, 3 + gVlvRefCodePkgTokenSpaceGuid.PcdDimmBusWidth|3|UINT8|0x20000007 + + ## Ranks Per DIMM or Sides Per DIMM.

+ # 0 - 1 Rank
+ # 1 - 2 Ranks
+ # @Prompt DIMM_Sides + # @ValidList 0x80000001 | 0, 1 + gVlvRefCodePkgTokenSpaceGuid.PcdRankPerDimm|0|UINT8|0x20000008 + + ## tCL.

+ # @Prompt tCL + gVlvRefCodePkgTokenSpaceGuid.PcdTcl|11|UINT8|0x20000009 + + ## tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc.

+ # @Prompt tRP_tRCD + gVlvRefCodePkgTokenSpaceGuid.PcdTrpTrcd|11|UINT8|0x2000000A + + ## tWR in DRAM clk.

+ # @Prompt tWR + gVlvRefCodePkgTokenSpaceGuid.PcdTwr|12|UINT8|0x2000000B + + ## tWTR in DRAM clk.

+ # @Prompt tWTR + gVlvRefCodePkgTokenSpaceGuid.PcdTwtr|6|UINT8|0x2000000C + + ## tRRD in DRAM clk.

+ # @Prompt tRRD + gVlvRefCodePkgTokenSpaceGuid.PcdTrrd|6|UINT8|0x2000000D + + ## tRTP in DRAM clk.

+ # @Prompt tRTP + gVlvRefCodePkgTokenSpaceGuid.PcdTrtp|6|UINT8|0x2000000E + + ## tFAW in DRAM clk.

+ # @Prompt tFAW + gVlvRefCodePkgTokenSpaceGuid.PcdTfaw|32|UINT8|0x2000000F -- 2.39.2