From b30abe7df464d91b84a42763e61bb3c85bfd80c9 Mon Sep 17 00:00:00 2001
From: Eric Dong <eric.dong@intel.com>
Date: Wed, 13 Sep 2017 18:08:42 +0800
Subject: [PATCH] AppPkg/WebServer: Fix build failure.

Fix build failure caused by UefiCpuPkg/MtrrLib removes deprecated macros.
related bugz: https://bugzilla.tianocore.org/show_bug.cgi?id=691

Cc: Daryl McDaniel <edk2-lists@mc2research.org>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Daryl McDaniel <edk2-lists@mc2research.org>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
---
 AppPkg/Applications/Sockets/WebServer/Mtrr.c  | 31 +++++++++----------
 .../Sockets/WebServer/WebServer.h             |  1 +
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/AppPkg/Applications/Sockets/WebServer/Mtrr.c b/AppPkg/Applications/Sockets/WebServer/Mtrr.c
index 92f90b0ae0..54356bde64 100644
--- a/AppPkg/Applications/Sockets/WebServer/Mtrr.c
+++ b/AppPkg/Applications/Sockets/WebServer/Mtrr.c
@@ -146,12 +146,12 @@ MemoryTypeRegistersPage (
 {
   UINT64 Addr;
   BOOLEAN bValid;
-  UINT64 Capabilities;
+  MSR_IA32_MTRRCAP_REGISTER Capabilities;
   UINTN Count;
-  UINT64 DefType;
+  MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;
   UINTN Index;
   UINT64 Mask;
-  UINT64 MaxMtrrs;
+
   CONST UINT64 mFixedAddresses [( 8 * MTRR_NUMBER_OF_FIXED_MTRR ) + 1 ] = {
            0ULL,
      0x10000ULL,
@@ -302,8 +302,8 @@ MemoryTypeRegistersPage (
       //
       //  Get the capabilities
       //
-      Capabilities = AsmReadMsr64 ( MTRR_LIB_IA32_MTRR_CAP );
-      DefType =  AsmReadMsr64 ( MTRR_LIB_IA32_MTRR_DEF_TYPE );
+      Capabilities.Uint64 = AsmReadMsr64 ( MSR_IA32_MTRRCAP );
+      DefType.Uint64 =  AsmReadMsr64 ( MSR_IA32_MTRR_DEF_TYPE );
 
       //
       //  Display the capabilities
@@ -316,7 +316,7 @@ MemoryTypeRegistersPage (
       }
       Status = HttpSendHexValue ( SocketFD,
                                   pPort,
-                                  Capabilities );
+                                  Capabilities.Uint64 );
       if ( EFI_ERROR ( Status )) {
         break;
       }
@@ -338,7 +338,7 @@ MemoryTypeRegistersPage (
       }
       Status = HttpSendHexValue ( SocketFD,
                                   pPort,
-                                  DefType );
+                                  DefType.Uint64);
       if ( EFI_ERROR ( Status )) {
         break;
       }
@@ -350,7 +350,7 @@ MemoryTypeRegistersPage (
       }
       Status = HttpSendAnsiString ( SocketFD,
                                     pPort,
-                                    ( 0 != ( DefType & MTRR_LIB_CACHE_MTRR_ENABLED ))
+                                    ( 0 != DefType.Bits.E )
                                     ? "Enabled"
                                     : "Disabled" );
       if ( EFI_ERROR ( Status )) {
@@ -364,7 +364,7 @@ MemoryTypeRegistersPage (
       }
       Status = HttpSendAnsiString ( SocketFD,
                                     pPort,
-                                    ( 0 != ( DefType & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED ))
+                                    ( 0 != DefType.Bits.FE )
                                     ? "Enabled"
                                     : "Disabled" );
       if ( EFI_ERROR ( Status )) {
@@ -376,7 +376,7 @@ MemoryTypeRegistersPage (
       if ( EFI_ERROR ( Status )) {
         break;
       }
-      Type = DefType & 0xff;
+      Type = DefType.Uint64 & 0xff;
       Status = HttpSendAnsiString ( SocketFD,
                                     pPort,
                                     ( DIM ( mMemoryType ) > Type )
@@ -395,7 +395,7 @@ MemoryTypeRegistersPage (
       //
       //  Determine if MTRRs are enabled
       //
-      if ( 0 == ( DefType & MTRR_LIB_CACHE_MTRR_ENABLED )) {
+      if ( 0 == DefType.Bits.E ) {
         Status = HttpSendAnsiString ( SocketFD,
                                       pPort,
                                       "<p>All memory is uncached!</p>\r\n" );
@@ -412,8 +412,8 @@ MemoryTypeRegistersPage (
         //
         //  Determine if the fixed MTRRs are supported
         //
-        if (( 0 != ( Capabilities & 0x100 ))
-          && ( 0 != ( DefType & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED ))) {
+        if (( 0 != Capabilities.Bits.FIX )
+          && ( 0 != DefType.Bits.FE)) {
 
           //
           //  Beginning of table
@@ -615,8 +615,7 @@ MemoryTypeRegistersPage (
         //
         //  Determine if the variable MTRRs are supported
         //
-        MaxMtrrs = Capabilities & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK;
-        if ( 0 < MaxMtrrs ) {
+        if ( 0 < Capabilities.Bits.VCNT ) {
           //
           //  Beginning of table
           //
@@ -632,7 +631,7 @@ MemoryTypeRegistersPage (
           //
           //  Display the variable MTRRs
           //
-          for ( Count = 0; MaxMtrrs > Count; Count++ ) {
+          for ( Count = 0; Capabilities.Bits.VCNT > Count; Count++ ) {
             //
             //  Start the row
             //
diff --git a/AppPkg/Applications/Sockets/WebServer/WebServer.h b/AppPkg/Applications/Sockets/WebServer/WebServer.h
index 16c30c8d6d..21b07b63df 100644
--- a/AppPkg/Applications/Sockets/WebServer/WebServer.h
+++ b/AppPkg/Applications/Sockets/WebServer/WebServer.h
@@ -20,6 +20,7 @@
 
 #include <Guid/EventGroup.h>
 
+#include <Register/Msr.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
 #include <Library/MemoryAllocationLib.h>
-- 
2.39.2