From bac7f02365b1d24cc6ac93fe853a25ebb8df6efe Mon Sep 17 00:00:00 2001 From: Star Zeng Date: Wed, 17 Jan 2018 18:31:29 +0800 Subject: [PATCH] IntelSiliconPkg IntelVTdDxe: Fix flush cache issue The patch fixes flush cache issue in CreateSecondLevelPagingEntryTable(). We found some video cards still not work even they have been added to the exception list. In CreateSecondLevelPagingEntryTable(), the check "(BaseAddress >= MemoryLimit)" may be TRUE and "goto Done" will be executed, then the FlushPageTableMemory operations at the end of the function will be skipped. Instead of "goto Done", this patch uses "break" to break the for loops, then the FlushPageTableMemory operations at the end of the function could have opportunity to be executed. The patch also fixes a miscalculation for Lvl3End. Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng Reviewed-by: Jiewen Yao --- .../Feature/VTd/IntelVTdDxe/TranslationTable.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c index 7bdc4a5146..bce5a45105 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -226,7 +226,7 @@ CreateSecondLevelPagingEntryTable ( Lvl3Start = RShiftU64 (BaseAddress, 30) & 0x1FF; if (ALIGN_VALUE_LOW(BaseAddress + SIZE_1GB, SIZE_1GB) <= EndAddress) { - Lvl3End = SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); + Lvl3End = SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY) - 1; } else { Lvl3End = RShiftU64 (EndAddress - 1, 30) & 0x1FF; } @@ -252,16 +252,21 @@ CreateSecondLevelPagingEntryTable ( Lvl2PtEntry[Index2].Bits.PageSize = 1; BaseAddress += SIZE_2MB; if (BaseAddress >= MemoryLimit) { - goto Done; + break; } } FlushPageTableMemory (VtdIndex, (UINTN)Lvl2PtEntry, SIZE_4KB); + if (BaseAddress >= MemoryLimit) { + break; + } } FlushPageTableMemory (VtdIndex, (UINTN)&Lvl3PtEntry[Lvl3Start], (UINTN)&Lvl3PtEntry[Lvl3End + 1] - (UINTN)&Lvl3PtEntry[Lvl3Start]); + if (BaseAddress >= MemoryLimit) { + break; + } } FlushPageTableMemory (VtdIndex, (UINTN)&Lvl4PtEntry[Lvl4Start], (UINTN)&Lvl4PtEntry[Lvl4End + 1] - (UINTN)&Lvl4PtEntry[Lvl4Start]); -Done: return SecondLevelPagingEntry; } -- 2.39.2