From c59218126689f834aa1896c39a1e2bbd1baf751a Mon Sep 17 00:00:00 2001
From: Feng Tian <feng.tian@intel.com>
Date: Mon, 11 Jan 2016 02:47:21 +0000
Subject: [PATCH] MdeModulePkg/NvmExpressDxe: Fix MS toolchain /Od 32bit build
 failure

Note NVME_ACQ & NVME_ASQ internal data structure are changed to make
build pass.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19632 6f19259b-4bc3-4df7-8a09-765794883524
---
 .../Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c        |  6 +++---
 MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c   | 12 +++++-------
 MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h   | 11 ++---------
 3 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
index 6cb2f92e8d..2af2df7549 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
@@ -2,7 +2,7 @@
   NvmExpressDxe driver is used to manage non-volatile memory subsystem which follows
   NVM Express specification.
 
-  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -63,7 +63,7 @@ ReadSectors (
   CommandPacket.QueueType      = NVME_IO_QUEUE;
 
   CommandPacket.NvmeCmd->Cdw10 = (UINT32)Lba;
-  CommandPacket.NvmeCmd->Cdw11 = (UINT32)(Lba >> 32);
+  CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
   CommandPacket.NvmeCmd->Cdw12 = (Blocks - 1) & 0xFFFF;
 
   CommandPacket.NvmeCmd->Flags = CDW10_VALID | CDW11_VALID | CDW12_VALID;
@@ -126,7 +126,7 @@ WriteSectors (
   CommandPacket.QueueType      = NVME_IO_QUEUE;
 
   CommandPacket.NvmeCmd->Cdw10 = (UINT32)Lba;
-  CommandPacket.NvmeCmd->Cdw11 = (UINT32)(Lba >> 32);
+  CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
   CommandPacket.NvmeCmd->Cdw12 = (Blocks - 1) & 0xFFFF;
 
   CommandPacket.MetadataBuffer = NULL;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
index f6b6288f65..60b06b45e6 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
@@ -2,7 +2,7 @@
   NvmExpressDxe driver is used to manage non-volatile memory subsystem which follows
   NVM Express specification.
 
-  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -328,7 +328,7 @@ WriteNvmeAdminSubmissionQueueBaseAddress (
     return Status;
   }
 
-  DEBUG ((EFI_D_INFO, "Asq.Asqb: %lx\n", Asq->Asqb));
+  DEBUG ((EFI_D_INFO, "Asq: %lx\n", *Asq));
 
   return EFI_SUCCESS;
 }
@@ -408,7 +408,7 @@ WriteNvmeAdminCompletionQueueBaseAddress (
     return Status;
   }
 
-  DEBUG ((EFI_D_INFO, "Acq.Acqb: %lxh\n", Acq->Acqb));
+  DEBUG ((EFI_D_INFO, "Acq: %lxh\n", *Acq));
 
   return EFI_SUCCESS;
 }
@@ -861,14 +861,12 @@ NvmeControllerInit (
   //
   // Address of admin submission queue.
   //
-  Asq.Rsvd1 = 0;
-  Asq.Asqb  = (UINT64)(UINTN)(Private->BufferPciAddr) >> 12;
+  Asq = (UINT64)(UINTN)(Private->BufferPciAddr) & ~0xFFF;
 
   //
   // Address of admin completion queue.
   //
-  Acq.Rsvd1 = 0;
-  Acq.Acqb  = (UINT64)(UINTN)(Private->BufferPciAddr + EFI_PAGE_SIZE) >> 12;
+  Acq = (UINT64)(UINTN)(Private->BufferPciAddr + EFI_PAGE_SIZE) & ~0xFFF;
 
   //
   // Address of I/O submission & completion queue.
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h
index 06c1db7d8e..f893251fbc 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.h
@@ -109,18 +109,11 @@ typedef struct {
 //
 // 3.1.9 Offset 28h: ASQ - Admin Submission Queue Base Address
 //
-typedef struct {
-  UINT64 Rsvd1:12;
-  UINT64 Asqb:52;    // Admin Submission Queue Base Address
-} NVME_ASQ;
-
+#define NVME_ASQ      UINT64
 //
 // 3.1.10 Offset 30h: ACQ - Admin Completion Queue Base Address
 //
-typedef struct {
-  UINT64 Rsvd1:12;
-  UINT64 Acqb:52;    // Admin Completion Queue Base Address
-} NVME_ACQ;
+#define NVME_ACQ      UINT64
 
 //
 // 3.1.11 Offset (1000h + ((2y) * (4 << CAP.DSTRD))): SQyTDBL - Submission Queue y Tail Doorbell
-- 
2.39.2