From ca162103dae16dd48474f8dfc7a8951c997c89bc Mon Sep 17 00:00:00 2001 From: klu2 Date: Fri, 21 Dec 2007 08:48:38 +0000 Subject: [PATCH] Initialize DuetPkg ... git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4416 6f19259b-4bc3-4df7-8a09-765794883524 --- DuetPkg/DataHubGenDxe/DataHubGen.c | 468 ++++++++++ DuetPkg/DataHubGenDxe/DataHubGen.dxs | 39 + DuetPkg/DataHubGenDxe/DataHubGen.h | 74 ++ DuetPkg/DataHubGenDxe/DataHubGen.inf | 63 ++ DuetPkg/DataHubGenDxe/DataHubGenStrings.uni | Bin 0 -> 2102 bytes DuetPkg/DuetPkg.dec | 12 + DuetPkg/DuetPkg.dsc | 38 + DuetPkg/DxeIpl/Debug.c | 96 ++ DuetPkg/DxeIpl/Debug.h | 49 + DuetPkg/DxeIpl/DxeInit.c | 283 ++++++ DuetPkg/DxeIpl/DxeIpl.h | 35 + DuetPkg/DxeIpl/DxeIpl.inf | 69 ++ DuetPkg/DxeIpl/HobGeneration.c | 885 +++++++++++++++++++ DuetPkg/DxeIpl/HobGeneration.h | 178 ++++ DuetPkg/DxeIpl/Ia32/CpuIoAccess.asm | 62 ++ DuetPkg/DxeIpl/Ia32/EnterDxeCore.asm | 64 ++ DuetPkg/DxeIpl/Ia32/Paging.c | 172 ++++ DuetPkg/DxeIpl/Ia32/VirtualMemory.h | 88 ++ DuetPkg/DxeIpl/LegacyTable.c | 425 +++++++++ DuetPkg/DxeIpl/LegacyTable.h | 31 + DuetPkg/DxeIpl/PpisNeededByDxeCore.c | 78 ++ DuetPkg/DxeIpl/PpisNeededByDxeCore.h | 64 ++ DuetPkg/DxeIpl/SerialStatusCode.c | 885 +++++++++++++++++++ DuetPkg/DxeIpl/SerialStatusCode.h | 83 ++ DuetPkg/DxeIpl/X64/CpuIoAccess.asm | 52 ++ DuetPkg/DxeIpl/X64/EnterDxeCore.asm | 45 + DuetPkg/DxeIpl/X64/Paging.c | 238 +++++ DuetPkg/DxeIpl/X64/VirtualMemory.h | 117 +++ DuetPkg/Include/CpuIA32.h | 187 ++++ DuetPkg/Include/EfiFlashMap.h | 127 +++ DuetPkg/Include/EfiLdrHandoff.h | 59 ++ DuetPkg/Include/FlashLayout.h | 44 + DuetPkg/Include/Guid/AcpiDescription.h | 127 +++ DuetPkg/Include/Guid/FlashMapHob.h | 33 + DuetPkg/Include/Guid/PciExpressBaseAddress.h | 46 + 35 files changed, 5316 insertions(+) create mode 100644 DuetPkg/DataHubGenDxe/DataHubGen.c create mode 100644 DuetPkg/DataHubGenDxe/DataHubGen.dxs create mode 100644 DuetPkg/DataHubGenDxe/DataHubGen.h create mode 100644 DuetPkg/DataHubGenDxe/DataHubGen.inf create mode 100644 DuetPkg/DataHubGenDxe/DataHubGenStrings.uni create mode 100644 DuetPkg/DuetPkg.dec create mode 100644 DuetPkg/DuetPkg.dsc create mode 100644 DuetPkg/DxeIpl/Debug.c create mode 100644 DuetPkg/DxeIpl/Debug.h create mode 100644 DuetPkg/DxeIpl/DxeInit.c create mode 100644 DuetPkg/DxeIpl/DxeIpl.h create mode 100644 DuetPkg/DxeIpl/DxeIpl.inf create mode 100644 DuetPkg/DxeIpl/HobGeneration.c create mode 100644 DuetPkg/DxeIpl/HobGeneration.h create mode 100644 DuetPkg/DxeIpl/Ia32/CpuIoAccess.asm create mode 100644 DuetPkg/DxeIpl/Ia32/EnterDxeCore.asm create mode 100644 DuetPkg/DxeIpl/Ia32/Paging.c create mode 100644 DuetPkg/DxeIpl/Ia32/VirtualMemory.h create mode 100644 DuetPkg/DxeIpl/LegacyTable.c create mode 100644 DuetPkg/DxeIpl/LegacyTable.h create mode 100644 DuetPkg/DxeIpl/PpisNeededByDxeCore.c create mode 100644 DuetPkg/DxeIpl/PpisNeededByDxeCore.h create mode 100644 DuetPkg/DxeIpl/SerialStatusCode.c create mode 100644 DuetPkg/DxeIpl/SerialStatusCode.h create mode 100644 DuetPkg/DxeIpl/X64/CpuIoAccess.asm create mode 100644 DuetPkg/DxeIpl/X64/EnterDxeCore.asm create mode 100644 DuetPkg/DxeIpl/X64/Paging.c create mode 100644 DuetPkg/DxeIpl/X64/VirtualMemory.h create mode 100644 DuetPkg/Include/CpuIA32.h create mode 100644 DuetPkg/Include/EfiFlashMap.h create mode 100644 DuetPkg/Include/EfiLdrHandoff.h create mode 100644 DuetPkg/Include/FlashLayout.h create mode 100644 DuetPkg/Include/Guid/AcpiDescription.h create mode 100644 DuetPkg/Include/Guid/FlashMapHob.h create mode 100644 DuetPkg/Include/Guid/PciExpressBaseAddress.h diff --git a/DuetPkg/DataHubGenDxe/DataHubGen.c b/DuetPkg/DataHubGenDxe/DataHubGen.c new file mode 100644 index 0000000000..24b2c636be --- /dev/null +++ b/DuetPkg/DataHubGenDxe/DataHubGen.c @@ -0,0 +1,468 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubGen.c + +Abstract: + +--*/ + +#include "DataHubGen.h" + +EFI_HII_PROTOCOL *gHii; +extern UINT8 DataHubGenDxeStrings[]; + +EFI_DATA_HUB_PROTOCOL *gDataHub; +EFI_HII_HANDLE gStringHandle; + +VOID * +GetSmbiosTablesFromHob ( + VOID + ) +{ + EFI_STATUS Status; + EFI_HOB_HANDOFF_INFO_TABLE *HobList; + EFI_PHYSICAL_ADDRESS *Table; + + // + // Get Hob List + // + + Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, (VOID *) &HobList); + if (EFI_ERROR (Status)) { + return NULL; + } + + // + // If there is a SMBIOS table in the HOB add it to the EFI System table + // + Table = GetNextGuidHob (&gEfiSmbiosTableGuid, &HobList); + + if (!EFI_ERROR (Status)) { + return (VOID *)(UINTN)*Table; + } + + return NULL; +} + +EFI_STATUS +PrepareHiiPackage ( + VOID + ) +{ + EFI_HII_PACKAGES *PackageList; + EFI_STATUS Status; + + PackageList = PreparePackages (1, &gEfiMiscProducerGuid, DataHubGenDxeStrings); + Status = gHii->NewPack (gHii, PackageList, &gStringHandle); + + return Status; +} + +EFI_SUBCLASS_TYPE1_HEADER mCpuDataRecordHeader = { + EFI_PROCESSOR_SUBCLASS_VERSION, // Version + sizeof (EFI_SUBCLASS_TYPE1_HEADER), // Header Size + 0, // Instance, Initialize later + EFI_SUBCLASS_INSTANCE_NON_APPLICABLE, // SubInstance + 0 // RecordType, Initialize later +}; + +VOID +InstallProcessorDataHub ( + IN VOID *Smbios + ) +{ + EFI_STATUS Status; + SMBIOS_STRUCTURE_POINTER SmbiosTable; + EFI_CPU_DATA_RECORD DataRecord; + CHAR8 *AString; + CHAR16 *UString; + STRING_REF Token; + + // + // Processor info (TYPE 4) + // + SmbiosTable = GetSmbiosTableFromType ((SMBIOS_TABLE_ENTRY_POINT *)Smbios, 4, 0); + if (SmbiosTable.Raw == NULL) { + DEBUG ((EFI_D_ERROR, "SmbiosTable: Type 4 (Processor Info) not found!\n")); + return ; + } + + // + // Record Header + // + CopyMem (&DataRecord, &mCpuDataRecordHeader, sizeof (DataRecord.DataRecordHeader)); + + // + // Record Type 1 + // + DataRecord.DataRecordHeader.RecordType = ProcessorCoreFrequencyRecordType; + DataRecord.VariableRecord.ProcessorCoreFrequency.Value = SmbiosTable.Type4->CurrentSpeed; + DataRecord.VariableRecord.ProcessorCoreFrequency.Exponent = 6; + + Status = gDataHub->LogData ( + gDataHub, + &gEfiProcessorSubClassGuid, + &gEfiMiscProducerGuid, + EFI_DATA_RECORD_CLASS_DATA, + &DataRecord, + sizeof (DataRecord.DataRecordHeader) + sizeof (DataRecord.VariableRecord.ProcessorCoreFrequency) + ); + // + // Record Type 3 + // + AString = GetSmbiosString (SmbiosTable, SmbiosTable.Type4->ProcessorVersion); + UString = AllocateZeroPool ((AsciiStrLen(AString) + 1) * sizeof(CHAR16)); + ASSERT (UString != NULL); + AsciiStrToUnicodeStr (AString, UString); + + Token = 0; + Status = gHii->NewString (gHii, NULL, gStringHandle, &Token, UString); + + if (EFI_ERROR (Status)) { + gBS->FreePool (UString); + return ; + } + gBS->FreePool (UString); + + DataRecord.DataRecordHeader.RecordType = ProcessorVersionRecordType; + DataRecord.VariableRecord.ProcessorVersion = Token; + + Status = gDataHub->LogData ( + gDataHub, + &gEfiProcessorSubClassGuid, + &gEfiMiscProducerGuid, + EFI_DATA_RECORD_CLASS_DATA, + &DataRecord, + sizeof (DataRecord.DataRecordHeader) + sizeof (DataRecord.VariableRecord.ProcessorVersion) + ); + + return ; +} + +VOID +InstallCacheDataHub ( + IN VOID *Smbios + ) +{ + return ; +} + +EFI_SUBCLASS_TYPE1_HEADER mMemorySubclassDriverDataHeader = { + EFI_MEMORY_SUBCLASS_VERSION, // Version + sizeof (EFI_SUBCLASS_TYPE1_HEADER), // Header Size + 0, // Instance, Initialize later + EFI_SUBCLASS_INSTANCE_NON_APPLICABLE, // SubInstance + 0 // RecordType, Initialize later +}; + +VOID +InstallMemoryDataHub ( + IN VOID *Smbios + ) +{ + EFI_STATUS Status; + SMBIOS_STRUCTURE_POINTER SmbiosTable; + EFI_MEMORY_SUBCLASS_DRIVER_DATA DataRecord; + + // + // Generate Memory Array Mapped Address info (TYPE 19) + // + SmbiosTable = GetSmbiosTableFromType ((SMBIOS_TABLE_ENTRY_POINT *)Smbios, 19, 0); + if (SmbiosTable.Raw == NULL) { + DEBUG ((EFI_D_ERROR, "SmbiosTable: Type 19 (Memory Array Mapped Address Info) not found!\n")); + return ; + } + + // + // Record Header + // + CopyMem (&DataRecord, &mMemorySubclassDriverDataHeader, sizeof (DataRecord.Header)); + + // + // Record Type 4 + // + DataRecord.Header.RecordType = EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER; + DataRecord.Record.ArrayStartAddress.MemoryArrayStartAddress = LShiftU64(SmbiosTable.Type19->StartingAddress, 10); + DataRecord.Record.ArrayStartAddress.MemoryArrayEndAddress = LShiftU64((UINT64) SmbiosTable.Type19->EndingAddress + 1, 10) - 1; + + DataRecord.Record.ArrayStartAddress.PhysicalMemoryArrayLink.ProducerName = gEfiMemoryProducerGuid; + DataRecord.Record.ArrayStartAddress.PhysicalMemoryArrayLink.Instance = 0; + DataRecord.Record.ArrayStartAddress.PhysicalMemoryArrayLink.SubInstance = EFI_SUBCLASS_INSTANCE_NON_APPLICABLE; + DataRecord.Record.ArrayStartAddress.MemoryArrayPartitionWidth = (UINT16)(SmbiosTable.Type19->PartitionWidth); + + Status = gDataHub->LogData ( + gDataHub, + &gEfiMemorySubClassGuid, + &gEfiMiscProducerGuid, + EFI_DATA_RECORD_CLASS_DATA, + &DataRecord, + sizeof (DataRecord.Header) + sizeof (DataRecord.Record.ArrayStartAddress) + ); + + return ; +} + +EFI_SUBCLASS_TYPE1_HEADER mMiscSubclassDriverDataHeader = { + EFI_MISC_SUBCLASS_VERSION, // Version + sizeof (EFI_SUBCLASS_TYPE1_HEADER), // Header Size + 0, // Instance, Initialize later + EFI_SUBCLASS_INSTANCE_NON_APPLICABLE, // SubInstance + 0 // RecordType, Initialize later +}; + +VOID +InstallMiscDataHub ( + IN VOID *Smbios + ) +{ + EFI_STATUS Status; + SMBIOS_STRUCTURE_POINTER SmbiosTable; + EFI_MISC_SUBCLASS_DRIVER_DATA DataRecord; + CHAR8 *AString; + CHAR16 *UString; + STRING_REF Token; + + // + // BIOS information (TYPE 0) + // + SmbiosTable = GetSmbiosTableFromType ((SMBIOS_TABLE_ENTRY_POINT *)Smbios, 0, 0); + if (SmbiosTable.Raw == NULL) { + DEBUG ((EFI_D_ERROR, "SmbiosTable: Type 0 (BIOS Information) not found!\n")); + return ; + } + + // + // Record Header + // + CopyMem (&DataRecord, &mMiscSubclassDriverDataHeader, sizeof (DataRecord.Header)); + + // + // Record Type 2 + // + AString = GetSmbiosString (SmbiosTable, SmbiosTable.Type0->BiosVersion); + UString = AllocateZeroPool ((AsciiStrLen(AString) + 1) * sizeof(CHAR16) + sizeof(FIRMWARE_BIOS_VERSIONE)); + ASSERT (UString != NULL); + CopyMem (UString, FIRMWARE_BIOS_VERSIONE, sizeof(FIRMWARE_BIOS_VERSIONE)); + AsciiStrToUnicodeStr (AString, UString + sizeof(FIRMWARE_BIOS_VERSIONE) / sizeof(CHAR16) - 1); + + Token = 0; + Status = gHii->NewString (gHii, NULL, gStringHandle, &Token, UString); + + if (EFI_ERROR (Status)) { + gBS->FreePool (UString); + return ; + } + gBS->FreePool (UString); + + DataRecord.Header.RecordType = EFI_MISC_BIOS_VENDOR_RECORD_NUMBER; + DataRecord.Record.MiscBiosVendor.BiosVendor = 0; + DataRecord.Record.MiscBiosVendor.BiosVersion = Token; + DataRecord.Record.MiscBiosVendor.BiosReleaseDate = 0; + DataRecord.Record.MiscBiosVendor.BiosStartingAddress = 0; + DataRecord.Record.MiscBiosVendor.BiosPhysicalDeviceSize.Value = 0; + DataRecord.Record.MiscBiosVendor.BiosPhysicalDeviceSize.Exponent = 0; +// DataRecord.Record.MiscBiosVendor.BiosCharacteristics1 = {0}; +// DataRecord.Record.MiscBiosVendor.BiosCharacteristics2 = {0}; + DataRecord.Record.MiscBiosVendor.BiosMajorRelease = 0; + DataRecord.Record.MiscBiosVendor.BiosMinorRelease = 0; + DataRecord.Record.MiscBiosVendor.BiosEmbeddedFirmwareMajorRelease = 0; + DataRecord.Record.MiscBiosVendor.BiosEmbeddedFirmwareMinorRelease = 0; + + Status = gDataHub->LogData ( + gDataHub, + &gEfiMiscSubClassGuid, + &gEfiMiscProducerGuid, + EFI_DATA_RECORD_CLASS_DATA, + &DataRecord, + sizeof (DataRecord.Header) + sizeof (DataRecord.Record.MiscBiosVendor) + ); + + // + // System information (TYPE 1) + // + SmbiosTable = GetSmbiosTableFromType ((SMBIOS_TABLE_ENTRY_POINT *)Smbios, 1, 0); + if (SmbiosTable.Raw == NULL) { + DEBUG ((EFI_D_ERROR, "SmbiosTable: Type 1 (System Information) not found!\n")); + return ; + } + + // + // Record Type 3 + // + AString = GetSmbiosString (SmbiosTable, SmbiosTable.Type1->ProductName); + UString = AllocateZeroPool ((AsciiStrLen(AString) + 1) * sizeof(CHAR16) + sizeof(FIRMWARE_PRODUCT_NAME)); + ASSERT (UString != NULL); + CopyMem (UString, FIRMWARE_PRODUCT_NAME, sizeof(FIRMWARE_PRODUCT_NAME)); + AsciiStrToUnicodeStr (AString, UString + sizeof(FIRMWARE_PRODUCT_NAME) / sizeof(CHAR16) - 1); + +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) + Status = IfrLibNewString (gStringHandle, &Token, UString); +#else + Token = 0; + Status = gHii->NewString (gHii, NULL, gStringHandle, &Token, UString); +#endif + if (EFI_ERROR (Status)) { + gBS->FreePool (UString); + return ; + } + gBS->FreePool (UString); + + DataRecord.Header.RecordType = EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER; + DataRecord.Record.MiscSystemManufacturer.SystemManufacturer = 0; + DataRecord.Record.MiscSystemManufacturer.SystemProductName = Token; + DataRecord.Record.MiscSystemManufacturer.SystemVersion = 0; + DataRecord.Record.MiscSystemManufacturer.SystemSerialNumber = 0; +// DataRecord.Record.MiscSystemManufacturer.SystemUuid = {0}; + DataRecord.Record.MiscSystemManufacturer.SystemWakeupType = 0; + DataRecord.Record.MiscSystemManufacturer.SystemSKUNumber = 0; + DataRecord.Record.MiscSystemManufacturer.SystemFamily = 0; + + Status = gDataHub->LogData ( + gDataHub, + &gEfiMiscSubClassGuid, + &gEfiMiscProducerGuid, + EFI_DATA_RECORD_CLASS_DATA, + &DataRecord, + sizeof (DataRecord.Header) + sizeof (DataRecord.Record.MiscSystemManufacturer) + ); + + return ; +} + +EFI_STATUS +EFIAPI +DataHubGenEntrypoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + VOID *Smbios; + + + Smbios = GetSmbiosTablesFromHob (); + if (Smbios == NULL) { + return EFI_NOT_FOUND; + } + + Status = gBS->LocateProtocol ( + &gEfiDataHubProtocolGuid, + NULL, + &gDataHub + ); + if (EFI_ERROR (Status)) { + return Status; + } + +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) + Status = gBS->LocateProtocol ( + &gEfiHiiDatabaseProtocolGuid, + NULL, + &gHiiDatabase + ); +#else + Status = gBS->LocateProtocol ( + &gEfiHiiProtocolGuid, + NULL, + &gHii + ); +#endif + if (EFI_ERROR (Status)) { + return Status; + } + + PrepareHiiPackage (); + + InstallProcessorDataHub (Smbios); + InstallCacheDataHub (Smbios); + InstallMemoryDataHub (Smbios); + InstallMiscDataHub (Smbios); + + return EFI_SUCCESS; +} + +// +// Internal function +// + +UINTN +SmbiosTableLength ( + IN SMBIOS_STRUCTURE_POINTER SmbiosTable + ) +{ + CHAR8 *AChar; + UINTN Length; + + AChar = (CHAR8 *)(SmbiosTable.Raw + SmbiosTable.Hdr->Length); + while ((*AChar != 0) || (*(AChar + 1) != 0)) { + AChar ++; + } + Length = ((UINTN)AChar - (UINTN)SmbiosTable.Raw + 2); + + return Length; +} + +SMBIOS_STRUCTURE_POINTER +GetSmbiosTableFromType ( + IN SMBIOS_TABLE_ENTRY_POINT *Smbios, + IN UINT8 Type, + IN UINTN Index + ) +{ + SMBIOS_STRUCTURE_POINTER SmbiosTable; + UINTN SmbiosTypeIndex; + + SmbiosTypeIndex = 0; + SmbiosTable.Raw = (UINT8 *)(UINTN)Smbios->TableAddress; + if (SmbiosTable.Raw == NULL) { + return SmbiosTable; + } + while ((SmbiosTypeIndex != Index) || (SmbiosTable.Hdr->Type != Type)) { + if (SmbiosTable.Hdr->Type == 127) { + SmbiosTable.Raw = NULL; + return SmbiosTable; + } + if (SmbiosTable.Hdr->Type == Type) { + SmbiosTypeIndex ++; + } + SmbiosTable.Raw = (UINT8 *)(SmbiosTable.Raw + SmbiosTableLength (SmbiosTable)); + } + + return SmbiosTable; +} + +CHAR8 * +GetSmbiosString ( + IN SMBIOS_STRUCTURE_POINTER SmbiosTable, + IN SMBIOS_TABLE_STRING String + ) +{ + CHAR8 *AString; + UINT8 Index; + + Index = 1; + AString = (CHAR8 *)(SmbiosTable.Raw + SmbiosTable.Hdr->Length); + while (Index != String) { + while (*AString != 0) { + AString ++; + } + AString ++; + if (*AString == 0) { + return AString; + } + Index ++; + } + + return AString; +} diff --git a/DuetPkg/DataHubGenDxe/DataHubGen.dxs b/DuetPkg/DataHubGenDxe/DataHubGen.dxs new file mode 100644 index 0000000000..418f6110a3 --- /dev/null +++ b/DuetPkg/DataHubGenDxe/DataHubGen.dxs @@ -0,0 +1,39 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHub.dxs + +Abstract: + + Dependency expression source file. + +--*/ + + +#include "EfiDepex.h" + +#include EFI_PROTOCOL_DEFINITION (DataHub) +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) +#include EFI_PROTOCOL_DEFINITION (HiiDatabase) +#else +#include EFI_PROTOCOL_DEFINITION (Hii) +#endif + +DEPENDENCY_START + EFI_DATA_HUB_PROTOCOL_GUID AND +#if (EFI_SPECIFICATION_VERSION >= 0x0002000A) + EFI_HII_DATABASE_PROTOCOL_GUID +#else + EFI_HII_PROTOCOL_GUID +#endif +DEPENDENCY_END diff --git a/DuetPkg/DataHubGenDxe/DataHubGen.h b/DuetPkg/DataHubGenDxe/DataHubGen.h new file mode 100644 index 0000000000..5ac2add1fb --- /dev/null +++ b/DuetPkg/DataHubGenDxe/DataHubGen.h @@ -0,0 +1,74 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + DataHubGen.h + +Abstract: + +--*/ + +#ifndef _DATA_HUB_GEN_H_ +#define _DATA_HUB_GEN_H_ + +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#define PRODUCT_NAME L"DUET" +#define PRODUCT_VERSION L"Beta" + +#define FIRMWARE_PRODUCT_NAME (PRODUCT_NAME L": ") +#ifdef EFI32 +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +#define FIRMWARE_BIOS_VERSIONE (PRODUCT_NAME L"(IA32.UEFI)" PRODUCT_VERSION L": ") +#else +#define FIRMWARE_BIOS_VERSIONE (PRODUCT_NAME L"(IA32.EFI)" PRODUCT_VERSION L": ") +#endif +#else // EFIX64 +#if (EFI_SPECIFICATION_VERSION >= 0x00020000) +#define FIRMWARE_BIOS_VERSIONE (PRODUCT_NAME L"(X64.UEFI)" PRODUCT_VERSION L": ") +#else +#define FIRMWARE_BIOS_VERSIONE (PRODUCT_NAME L"(X64.EFI)" PRODUCT_VERSION L": ") +#endif +#endif + +SMBIOS_STRUCTURE_POINTER +GetSmbiosTableFromType ( + IN VOID *Smbios, + IN UINT8 Type, + IN UINTN Index + ); + +CHAR8 * +GetSmbiosString ( + IN SMBIOS_STRUCTURE_POINTER SmbiosTable, + IN SMBIOS_TABLE_STRING String + ); + +#endif diff --git a/DuetPkg/DataHubGenDxe/DataHubGen.inf b/DuetPkg/DataHubGenDxe/DataHubGen.inf new file mode 100644 index 0000000000..fde36e334c --- /dev/null +++ b/DuetPkg/DataHubGenDxe/DataHubGen.inf @@ -0,0 +1,63 @@ +#/*++ +# +# Copyright (c) 2006 - 2007, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# DataHubGen.inf +# +# Abstract: +# +# Component description file for DataHubGen module. +# +--*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = DataHubGenDxe + FILE_GUID = 0021001C-3CE3-41f8-99C6-ECF5DA754731 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + EDK_RELEASE_VERSION = 0x00020000 + EFI_SPECIFICATION_VERSION = 0x00020000 + ENTRY_POINT = DataHubGenEntrypoint + +[Packages] + MdePkg/MdePkg.dec + IntelFrameworkPkg/IntelFrameworkPkg.dec + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec + +[LibraryClasses] + UefiLib + HobLib + UefiBootServicesTableLib + BaseMemoryLib + MemoryAllocationLib + UefiDriverEntryPoint + BaseLib + FrameworkHiiLib + +[Sources.common] + DataHubGen.c + DataHubGen.h + DataHubGenStrings.uni + +[Guids.common] + gEfiProcessorSubClassGuid + gEfiHiiProtocolGuid + gEfiMiscSubClassGuid + gEfiDataHubProtocolGuid + gEfiSmbiosTableGuid + gEfiMiscProducerGuid + gEfiMemorySubClassGuid + gEfiMemoryProducerGuid + +[Depex] + gEfiDataHubProtocolGuid AND gEfiHiiProtocolGuid \ No newline at end of file diff --git a/DuetPkg/DataHubGenDxe/DataHubGenStrings.uni b/DuetPkg/DataHubGenDxe/DataHubGenStrings.uni new file mode 100644 index 0000000000000000000000000000000000000000..9d42cb98c0aa14df3e565895cd7c4650e4c308b0 GIT binary patch literal 2102 zcmchYO>YxH42FG1;yN%qCC? zq^cV2j6LJAUwdrtub)LLT4Klcit*f@!4-FFVjpZ~KWuGtOKoJgwm|lU_3S0wH;I+NC1lZy%(;POV4mBGxo@ZJHSsZJHv#_~ z+#~m40^h-hKI;OBf%84$FtZ7gI$LvZihRP3yq4Y+YV6wn-}i{VgC;Bwd;}l(U-o1G6J{db*eCgZC!O1CFZu$0YJ{}j* zKc3E~(-hG+?aInT>Bj0-vrFcZUBg$%!GtW-+GMw4=hlKMduFz*%35Y$`4Tk5tgX-A{5<$tyJ*EdmAsVf zaiYugcnWXSq&> ((7 - Index) * 4)) & 0x0f) + '0'; + if (Char > '9') { + Char = Char - '0' - 10 + 'A'; + } + *mCursor = Char; + mCursor += 2; + } +} + +VOID +PrintValue64 ( + UINT64 Value + ) +{ + PrintValue ((UINT32) RShiftU64 (Value, 32)); + PrintValue ((UINT32) Value); +} + + + +VOID +PrintString ( + UINT8 *String + ) +{ + UINT32 Index; + + for (Index = 0; String[Index] != 0; Index++) { + if (String[Index] == '\n') { + mCursor = (UINT8 *)(UINTN)(0xb8000 + (((((UINTN)mCursor - 0xb8000) + 160) / 160) * 160)); + } else { + *mCursor = String[Index]; + mCursor += 2; + } + } +} + diff --git a/DuetPkg/DxeIpl/Debug.h b/DuetPkg/DxeIpl/Debug.h new file mode 100644 index 0000000000..9939109e91 --- /dev/null +++ b/DuetPkg/DxeIpl/Debug.h @@ -0,0 +1,49 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + Debug.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _EFILDR_DEBUG_H_ +#define _EFILDR_DEBUG_H_ + +VOID +PrintHeader ( + CHAR8 Char + ); + +VOID +PrintValue ( + UINT32 Value + ); + +VOID +PrintValue64 ( + UINT64 Value + ); + +VOID +PrintString ( + UINT8 *String + ); + +VOID +ClearScreen ( + VOID + ); + +#endif diff --git a/DuetPkg/DxeIpl/DxeInit.c b/DuetPkg/DxeIpl/DxeInit.c new file mode 100644 index 0000000000..79b6b4c311 --- /dev/null +++ b/DuetPkg/DxeIpl/DxeInit.c @@ -0,0 +1,283 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + DxeInit.c + +Abstract: + +Revision History: + +--*/ + +#include "DxeIpl.h" + +#include "LegacyTable.h" +#include "HobGeneration.h" +#include "PpisNeededByDxeCore.h" +#include "Debug.h" + +/* +-------------------------------------------------------- + Memory Map: (XX=32,64) +-------------------------------------------------------- +0x0 + IVT +0x400 + BDA +0x500 + +0x7C00 + BootSector +0x10000 + EfiLdr (relocate by efiXX.COM) +0x15000 + Efivar.bin (Load by StartXX.COM) +0x20000 + StartXX.COM (E820 table, Temporary GDT, Temporary IDT) +0x21000 + EfiXX.COM (Temporary Interrupt Handler) +0x22000 + EfiLdr.efi + DxeIpl.Z + DxeMain.Z + BFV.Z +0x86000 + MemoryFreeUnder1M (For legacy driver DMA) +0x90000 + Temporary 4G PageTable for X64 (6 page) +0x9F800 + EBDA +0xA0000 + VGA +0xC0000 + OPROM +0xE0000 + FIRMEWARE +0x100000 (1M) + Temporary Stack (1M) +0x200000 + +MemoryAbove1MB.PhysicalStart <-----------------------------------------------------+ + ... | + ... | + <- Phit.EfiMemoryBottom -------------------+ | + HOB | | + <- Phit.EfiFreeMemoryBottom | | + | MemoryFreeAbove1MB.ResourceLength + <- Phit.EfiFreeMemoryTop ------+ | | + MemoryDescriptor (For ACPINVS, ACPIReclaim) | 4M = CONSUMED_MEMORY | + | | | + Permament 4G PageTable for IA32 or MemoryAllocation | | + Permament 64G PageTable for X64 | | | + <------------------------------+ | | + Permament Stack (0x20 Pages = 128K) | | + <- Phit.EfiMemoryTop ----------+-----------+---------------+ + DxeCore | + DxeCore + DxeIpl | + <----------------------------------------------------------+ + NvFV + FtwFV | + MMIO + BFV | + <- Top of Free Memory reported by E820 --------------------+ + ACPINVS or + ACPIReclaim or + Reserved + <- Memory Top on RealMemory + +0x100000000 (4G) + +MemoryFreeAbove4G.Physicalstart <--------------------------------------------------+ + | + | + MemoryFreeAbove4GB.ResourceLength + | + | + <--------------------------------------------------+ +*/ + +VOID +EnterDxeMain ( + IN VOID *StackTop, + IN VOID *DxeCoreEntryPoint, + IN VOID *Hob, + IN VOID *PageTable + ); + +VOID +DxeInit ( + IN EFILDRHANDOFF *Handoff + ) +/*++ + + Routine Description: + + This is the entry point after this code has been loaded into memory. + +Arguments: + + +Returns: + + Calls into EFI Firmware + +--*/ +{ + VOID *StackTop; + VOID *StackBottom; + VOID *PageTableBase; + VOID *MemoryTopOnDescriptor; + VOID *MemoryDescriptor; + VOID *NvStorageBase; + +/* + ClearScreen(); + PrintString("handoff:\n"); + PrintString("Handoff.BfvBase = "); + PrintValue64((UINT64)(UINTN)Handoff->BfvBase); + PrintString(", "); + PrintString("BfvLength = "); + PrintValue64(Handoff->BfvSize); + PrintString("\n"); + PrintString("Handoff.DxeIplImageBase = "); + PrintValue64((UINT64)(UINTN)Handoff->DxeIplImageBase); + PrintString(", "); + PrintString("DxeIplImageSize = "); + PrintValue64(Handoff->DxeIplImageSize); + PrintString("\n"); + PrintString("Handoff.DxeCoreImageBase = "); + PrintValue64((UINT64)(UINTN)Handoff->DxeCoreImageBase); + PrintString(", "); + PrintString("DxeCoreImageSize = "); + PrintValue64(Handoff->DxeCoreImageSize); + PrintString("\n"); +*/ + // + // Hob Generation Guild line: + // * Don't report FV as physical memory + // * MemoryAllocation Hob should only cover physical memory + // * Use ResourceDescriptor Hob to report physical memory or Firmware Device and they shouldn't be overlapped + + PrepareHobCpu (); + // + // 1. BFV + // + PrepareHobBfv (Handoff->BfvBase, Handoff->BfvSize); + + // + // 2. Updates Memory information, and get the top free address under 4GB + // + MemoryTopOnDescriptor = PrepareHobMemory (Handoff->MemDescCount, Handoff->MemDesc); + + // + // 3. Put [NV], [Stack], [PageTable], [MemDesc], [HOB] just below the [top free address under 4GB] + // + + // 3.1 NV data + NvStorageBase = PrepareHobNvStorage (MemoryTopOnDescriptor); + // 3.2 Stack + StackTop = NvStorageBase; + StackBottom = PrepareHobStack (StackTop); + // 3.3 Page Table + PageTableBase = PreparePageTable (StackBottom, gHob->Cpu.SizeOfMemorySpace); + // 3.4 MemDesc (will be used in PlatformBds) + MemoryDescriptor = PrepareHobMemoryDescriptor (PageTableBase, Handoff->MemDescCount, Handoff->MemDesc); + // 3.5 Copy the Hob itself to EfiMemoryBottom, and update the PHIT Hob + PrepareHobPhit (StackTop, MemoryDescriptor); + + // + // 4. Register the memory occupied by DxeCore and DxeIpl together as DxeCore + // + PrepareHobDxeCore ( + Handoff->DxeCoreEntryPoint, + (EFI_PHYSICAL_ADDRESS)(UINTN)Handoff->DxeCoreImageBase, + (UINTN)Handoff->DxeIplImageBase + (UINTN)Handoff->DxeIplImageSize - (UINTN)Handoff->DxeCoreImageBase + ); + + PrepareHobLegacyTable (gHob); + PreparePpisNeededByDxeCore (gHob); + + CompleteHobGeneration (); + +/* + // + // Print Hob Info + // + ClearScreen(); + PrintString("Hob Info\n"); + PrintString("Phit.EfiMemoryTop = "); + PrintValue64(gHob->Phit.EfiMemoryTop); + PrintString(" Phit.EfiMemoryBottom = "); + PrintValue64(gHob->Phit.EfiMemoryBottom); + PrintString("\n"); + PrintString("Phit.EfiFreeMemoryTop = "); + PrintValue64(gHob->Phit.EfiFreeMemoryTop); + PrintString(" Phit.EfiFreeMemoryBottom = "); + PrintValue64(gHob->Phit.EfiFreeMemoryBottom); + PrintString("\n"); + PrintString("Bfv = "); + PrintValue64(gHob->Bfv.BaseAddress); + PrintString(" BfvLength = "); + PrintValue64(gHob->Bfv.Length); + PrintString("\n"); + PrintString("NvStorageFvb = "); + PrintValue64(gHob->NvStorageFvb.FvbInfo.Entries[0].Base); + PrintString(" Length = "); + PrintValue64(gHob->NvStorageFvb.FvbInfo.Entries[0].Length); + PrintString("\n"); + PrintString("NvFtwFvb = "); + PrintValue64(gHob->NvFtwFvb.FvbInfo.Entries[0].Base); + PrintString(" Length = "); + PrintValue64(gHob->NvFtwFvb.FvbInfo.Entries[0].Length); + PrintString("\n"); + PrintString("Stack = "); + PrintValue64(gHob->Stack.AllocDescriptor.MemoryBaseAddress); + PrintString(" StackLength = "); + PrintValue64(gHob->Stack.AllocDescriptor.MemoryLength); + PrintString("\n"); + PrintString("MemoryFreeUnder1MB = "); + PrintValue64(gHob->MemoryFreeUnder1MB.PhysicalStart); + PrintString(" MemoryFreeUnder1MBLength = "); + PrintValue64(gHob->MemoryFreeUnder1MB.ResourceLength); + PrintString("\n"); + PrintString("MemoryAbove1MB = "); + PrintValue64(gHob->MemoryAbove1MB.PhysicalStart); + PrintString(" MemoryAbove1MBLength = "); + PrintValue64(gHob->MemoryAbove1MB.ResourceLength); + PrintString("\n"); + PrintString("MemoryAbove4GB = "); + PrintValue64(gHob->MemoryAbove4GB.PhysicalStart); + PrintString(" MemoryAbove4GBLength = "); + PrintValue64(gHob->MemoryAbove4GB.ResourceLength); + PrintString("\n"); + PrintString("DxeCore = "); + PrintValue64(gHob->DxeCore.MemoryAllocationHeader.MemoryBaseAddress); + PrintString(" DxeCoreLength = "); + PrintValue64(gHob->DxeCore.MemoryAllocationHeader.MemoryLength); + PrintString("\n"); + PrintString("MemoryAllocation = "); + PrintValue64(gHob->MemoryAllocation.AllocDescriptor.MemoryBaseAddress); + PrintString(" MemoryLength = "); + PrintValue64(gHob->MemoryAllocation.AllocDescriptor.MemoryLength); + PrintString("\n"); + EFI_DEADLOOP(); +*/ + + ClearScreen(); + PrintString("\n\n\n\n\n\n\n\n\n\n"); + PrintString(" WELCOME TO EFI WORLD!\n"); + + EnterDxeMain (StackTop, Handoff->DxeCoreEntryPoint, gHob, PageTableBase); + + // + // Should never get here + // + CpuDeadLoop (); +} + diff --git a/DuetPkg/DxeIpl/DxeIpl.h b/DuetPkg/DxeIpl/DxeIpl.h new file mode 100644 index 0000000000..5606a18f04 --- /dev/null +++ b/DuetPkg/DxeIpl/DxeIpl.h @@ -0,0 +1,35 @@ + +#ifndef _DUET_DXEIPL_H_ +#define _DUET_DXEIPL_H_ + +#include "FrameworkPei.h" +#include "FrameworkModulePei.h" + +#include "EfiLdrHandoff.h" +#include "EfiFlashMap.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#endif // _DUET_DXEIPL_H_ \ No newline at end of file diff --git a/DuetPkg/DxeIpl/DxeIpl.inf b/DuetPkg/DxeIpl/DxeIpl.inf new file mode 100644 index 0000000000..cfe109c86c --- /dev/null +++ b/DuetPkg/DxeIpl/DxeIpl.inf @@ -0,0 +1,69 @@ +#/*++ +# +# Copyright (c) 2006 - 2007, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# DxeIpl.inf +# +# Abstract: +# +#--*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = DxeIpl + FILE_GUID = 2119BBD7-9432-4f47-B5E2-5C4EA31B6BDC + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + EDK_RELEASE_VERSION = 0x00020000 + EFI_SPECIFICATION_VERSION = 0x00020000 + ENTRY_POINT = DxeInit + +[Packages] + MdePkg/MdePkg.dec + DuetPkg/DuetPkg.dec + MdeModulePkg/MdeModulePkg.dec + IntelFrameworkPkg/IntelFrameworkPkg.dec + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec + +[LibraryClasses.common] + BaseLib + BaseMemoryLib + PrintLib + PeimEntryPoint + ReportStatusCodeLib + +[Sources.common] + DxeIpl.h + DxeInit.c + LegacyTable.c + LegacyTable.h + PpisNeededByDxeCore.c + PpisNeededByDxeCore.h + HobGeneration.c + HobGeneration.h + SerialStatusCode.c + SerialStatusCode.h + Debug.c + Debug.h + +[Sources.x64] + X64\CpuIoAccess.asm + X64\EnterDxeCore.asm + X64\Paging.c + X64\VirtualMemory.h + +[Sources.Ia32] + Ia32\CpuIoAccess.asm + Ia32\EnterDxeCore.asm + Ia32\Paging.c + Ia32\VirtualMemory.h + + diff --git a/DuetPkg/DxeIpl/HobGeneration.c b/DuetPkg/DxeIpl/HobGeneration.c new file mode 100644 index 0000000000..7630b1e68a --- /dev/null +++ b/DuetPkg/DxeIpl/HobGeneration.c @@ -0,0 +1,885 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + HobGeneration.c + +Abstract: + +Revision History: + +--*/ +#include "DxeIpl.h" +#include "HobGeneration.h" +#include "PpisNeededByDxeCore.h" +#include "FlashLayout.h" +#include "Debug.h" + +#define EFI_DXE_FILE_GUID \ + { 0xb1644c1a, 0xc16a, 0x4c5b, 0x88, 0xde, 0xea, 0xfb, 0xa9, 0x7e, 0x74, 0xd8 } + +#define CPUID_EXTENDED_ADD_SIZE 0x80000008 + +HOB_TEMPLATE gHobTemplate = { + { // Phit + { // Header + EFI_HOB_TYPE_HANDOFF, // HobType + sizeof (EFI_HOB_HANDOFF_INFO_TABLE), // HobLength + 0 // Reserved + }, + EFI_HOB_HANDOFF_TABLE_VERSION, // Version + BOOT_WITH_FULL_CONFIGURATION, // BootMode + 0, // EfiMemoryTop + 0, // EfiMemoryBottom + 0, // EfiFreeMemoryTop + 0, // EfiFreeMemoryBottom + 0 // EfiEndOfHobList + }, + { // Bfv + { + EFI_HOB_TYPE_FV, // HobType + sizeof (EFI_HOB_FIRMWARE_VOLUME), // HobLength + 0 // Reserved + }, + 0, // BaseAddress + 0 // Length + }, + { // BfvResource + { + EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, // HobType + sizeof (EFI_HOB_RESOURCE_DESCRIPTOR), // HobLength + 0 // Reserved + }, + { + 0 // Owner Guid + }, + EFI_RESOURCE_FIRMWARE_DEVICE, // ResourceType + (EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_TESTED | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE), // ResourceAttribute + 0, // PhysicalStart + 0 // ResourceLength + }, + { // Cpu + { // Header + EFI_HOB_TYPE_CPU, // HobType + sizeof (EFI_HOB_CPU), // HobLength + 0 // Reserved + }, + 52, // SizeOfMemorySpace - Architecture Max + 16, // SizeOfIoSpace, + { + 0, 0, 0, 0, 0, 0 // Reserved[6] + } + }, + { // Stack HOB + { // header + EFI_HOB_TYPE_MEMORY_ALLOCATION, // Hob type + sizeof (EFI_HOB_MEMORY_ALLOCATION_STACK), // Hob size + 0 // reserved + }, + { + EFI_HOB_MEMORY_ALLOC_STACK_GUID, + 0x0, // EFI_PHYSICAL_ADDRESS MemoryBaseAddress; + 0x0, // UINT64 MemoryLength; + EfiBootServicesData, // EFI_MEMORY_TYPE MemoryType; + 0, 0, 0, 0 // Reserved Reserved[4]; + } + }, + { // MemoryAllocation for HOB's & Images + { + EFI_HOB_TYPE_MEMORY_ALLOCATION, // HobType + sizeof (EFI_HOB_MEMORY_ALLOCATION), // HobLength + 0 // Reserved + }, + { + { + 0, //EFI_HOB_MEMORY_ALLOC_MODULE_GUID // Name + }, + 0x0, // EFI_PHYSICAL_ADDRESS MemoryBaseAddress; + 0x0, // UINT64 MemoryLength; + EfiBootServicesData, // EFI_MEMORY_TYPE MemoryType; + { + 0, 0, 0, 0 // Reserved Reserved[4]; + } + } + }, + { // MemoryFreeUnder1MB for unused memory that DXE core will claim + { + EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, // HobType + sizeof (EFI_HOB_RESOURCE_DESCRIPTOR), // HobLength + 0 // Reserved + }, + { + 0 // Owner Guid + }, + EFI_RESOURCE_SYSTEM_MEMORY, // ResourceType + (EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_TESTED | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE), + 0x0, // PhysicalStart + 0 // ResourceLength + }, + { // MemoryFreeAbove1MB for unused memory that DXE core will claim + { + EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, // HobType + sizeof (EFI_HOB_RESOURCE_DESCRIPTOR), // HobLength + 0 // Reserved + }, + { + 0 // Owner Guid + }, + EFI_RESOURCE_SYSTEM_MEMORY, // ResourceType + (EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_TESTED | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE), + 0x0, // PhysicalStart + 0 // ResourceLength + }, + { // MemoryFreeAbove4GB for unused memory that DXE core will claim + { + EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, // HobType + sizeof (EFI_HOB_RESOURCE_DESCRIPTOR), // HobLength + 0 // Reserved + }, + { + 0 // Owner Guid + }, + EFI_RESOURCE_SYSTEM_MEMORY, // ResourceType + (EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE), + 0x0, // PhysicalStart + 0 // ResourceLength + }, + { // Memory Allocation Module for DxeCore + { // header + EFI_HOB_TYPE_MEMORY_ALLOCATION, // Hob type + sizeof (EFI_HOB_MEMORY_ALLOCATION_MODULE), // Hob size + 0 // reserved + }, + { + EFI_HOB_MEMORY_ALLOC_MODULE_GUID, + 0x0, // EFI_PHYSICAL_ADDRESS MemoryBaseAddress; + 0x0, // UINT64 MemoryLength; + EfiBootServicesCode, // EFI_MEMORY_TYPE MemoryType; + { + 0, 0, 0, 0 // UINT8 Reserved[4]; + }, + }, + EFI_DXE_FILE_GUID, + 0x0 // EFI_PHYSICAL_ADDRESS of EntryPoint; + }, + { // Memory Map Hints to reduce fragmentation in the memory map + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (MEMORY_TYPE_INFORMATION_HOB), // Hob size + 0, // reserved + EFI_MEMORY_TYPE_INFORMATION_GUID, + { + { + EfiACPIReclaimMemory, + 0x80 + }, // 0x80 pages = 512k for ASL + { + EfiACPIMemoryNVS, + 0x100 + }, // 0x100 pages = 1024k for S3, SMM, etc + { + EfiReservedMemoryType, + 0x04 + }, // 16k for BIOS Reserved + { + EfiRuntimeServicesData, + 0x100 + }, + { + EfiRuntimeServicesCode, + 0x100 + }, + { + EfiBootServicesCode, + 0x200 + }, + { + EfiBootServicesData, + 0x200 + }, + { + EfiLoaderCode, + 0x100 + }, + { + EfiLoaderData, + 0x100 + }, + { + EfiMaxMemoryType, + 0 + } + } + }, + { // Pointer to ACPI Table + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (TABLE_HOB), // Hob size + 0, // reserved + EFI_ACPI_TABLE_GUID, + 0 + }, + { // Pointer to ACPI20 Table + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (TABLE_HOB), // Hob size + 0, // reserved + EFI_ACPI_20_TABLE_GUID, + 0 + }, + { // Pointer to SMBIOS Table + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (TABLE_HOB), // Hob size + 0, // reserved + EFI_SMBIOS_TABLE_GUID, + 0 + }, + { // Pointer to MPS Table + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (TABLE_HOB), // Hob size + 0, // reserved + EFI_MPS_TABLE_GUID, + 0 + }, + /** + { // Pointer to FlushInstructionCache + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PROTOCOL_HOB), // Hob size + 0, // reserved + EFI_PEI_FLUSH_INSTRUCTION_CACHE_GUID, + NULL + }, + { // Pointer to TransferControl + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PROTOCOL_HOB), // Hob size + 0, // reserved + EFI_PEI_TRANSFER_CONTROL_GUID, + NULL + }, + { // Pointer to PeCoffLoader + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PROTOCOL_HOB), // Hob size + 0, // reserved + EFI_PEI_PE_COFF_LOADER_GUID, + NULL + }, + { // Pointer to EfiDecompress + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PROTOCOL_HOB), // Hob size + 0, // reserved + EFI_DECOMPRESS_PROTOCOL_GUID, + NULL + }, + { // Pointer to TianoDecompress + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PROTOCOL_HOB), // Hob size + 0, // reserved + EFI_TIANO_DECOMPRESS_PROTOCOL_GUID, + NULL + }, + **/ + { // Pointer to ReportStatusCode + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PROTOCOL_HOB), // Hob size + 0, // reserved + EFI_STATUS_CODE_RUNTIME_PROTOCOL_GUID, + NULL + }, + { // EFILDR Memory Descriptor + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (MEMORY_DESC_HOB), // Hob size + 0, // reserved + EFI_LDR_MEMORY_DESCRIPTOR_GUID, + 0, + NULL + }, + { // Pci Express Base Address Hob + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (PCI_EXPRESS_BASE_HOB), // Hob size + 0, // reserved + EFI_PCI_EXPRESS_BASE_ADDRESS_GUID, + { + 0, + 0, + 0, + } + }, + { // Acpi Description Hob + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (ACPI_DESCRIPTION_HOB), // Hob size + 0, // reserved + EFI_ACPI_DESCRIPTION_GUID, + { + 0, + } + }, + { // NV Storage FV Resource + { + EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, // HobType + sizeof (EFI_HOB_RESOURCE_DESCRIPTOR), // HobLength + 0 // Reserved + }, + { + 0 // Owner Guid + }, + EFI_RESOURCE_FIRMWARE_DEVICE, // ResourceType + (EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_TESTED | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE), // ResourceAttribute + 0, // PhysicalStart (Fixed later) + NV_STORAGE_FVB_SIZE // ResourceLength + }, + { // FVB holding NV Storage + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (FVB_HOB), + 0, + EFI_FLASH_MAP_HOB_GUID, + { + 0, 0, 0, // Reserved[3] + EFI_FLASH_AREA_GUID_DEFINED, // AreaType + EFI_SYSTEM_NV_DATA_HOB_GUID, // AreaTypeGuid + 1, + { + EFI_FLASH_AREA_FV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes + 0, // SubAreaData.Reserved + 0, // SubAreaData.Base (Fixed later) + NV_STORAGE_FVB_SIZE, // SubAreaData.Length + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem + }, + 0, // VolumeSignature (Fixed later) + NV_STORAGE_FILE_PATH, // Mapped file without padding + // TotalFVBSize = FileSize + PaddingSize = multiple of BLOCK_SIZE + NV_STORAGE_SIZE + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH, + // ActuralSize + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH + } + }, + { // NV Storage Hob + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (FVB_HOB), // Hob size + 0, // reserved + EFI_FLASH_MAP_HOB_GUID, + { + 0, 0, 0, // Reserved[3] + EFI_FLASH_AREA_EFI_VARIABLES, // AreaType + { 0 }, // AreaTypeGuid + 1, + { + EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes + 0, // SubAreaData.Reserved + 0, // SubAreaData.Base (Fixed later) + NV_STORAGE_SIZE, // SubAreaData.Length + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem + }, + 0, + NV_STORAGE_FILE_PATH, + NV_STORAGE_SIZE, + 0 + } + }, + { // FVB holding FTW spaces including Working & Spare space + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (FVB_HOB), + 0, + EFI_FLASH_MAP_HOB_GUID, + { + 0, 0, 0, // Reserved[3] + EFI_FLASH_AREA_GUID_DEFINED, // AreaType + EFI_SYSTEM_NV_DATA_HOB_GUID, // AreaTypeGuid + 1, + { + EFI_FLASH_AREA_FV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes + 0, // SubAreaData.Reserved + 0, // SubAreaData.Base (Fixed later) + NV_FTW_FVB_SIZE, // SubAreaData.Length + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem + }, + 0, + L"", // Empty String indicates using memory + 0, + 0 + } + }, + { // NV Ftw working Hob + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (FVB_HOB), // Hob size + 0, // reserved + EFI_FLASH_MAP_HOB_GUID, + { + 0, 0, 0, // Reserved[3] + EFI_FLASH_AREA_FTW_STATE, // AreaType + { 0 }, // AreaTypeGuid + 1, + { + EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes + 0, // SubAreaData.Reserved + 0, // SubAreaData.Base (Fixed later) + NV_FTW_WORKING_SIZE, // SubAreaData.Length + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem + }, + 0, // VolumeSignature + L"", + 0, + 0 + } + }, + { // NV Ftw spare Hob + EFI_HOB_TYPE_GUID_EXTENSION, // Hob type + sizeof (FVB_HOB), // Hob size + 0, // reserved + EFI_FLASH_MAP_HOB_GUID, + { + 0, 0, 0, // Reserved[3] + EFI_FLASH_AREA_FTW_BACKUP, // AreaType + { 0 }, // AreaTypeGuid + 1, + { + EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes + 0, // SubAreaData.Reserved + 0, // SubAreaData.Base (Fixed later) + NV_FTW_SPARE_SIZE, // SubAreaData.Length + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem + }, + 0, + L"", + 0, + 0 + } + }, + { // EndOfHobList + EFI_HOB_TYPE_END_OF_HOB_LIST, // HobType + sizeof (EFI_HOB_GENERIC_HEADER), // HobLength + 0 // Reserved + } +}; + +HOB_TEMPLATE *gHob = &gHobTemplate; + +VOID * +PrepareHobMemory ( + IN UINTN NumberOfMemoryMapEntries, + IN EFI_MEMORY_DESCRIPTOR *EfiMemoryDescriptor + ) +/*++ +Description: + Update the Hob filling MemoryFreeUnder1MB, MemoryAbove1MB, MemoryAbove4GB + +Arguments: + NumberOfMemoryMapEntries - Count of Memory Descriptors + EfiMemoryDescriptor - Point to the buffer containing NumberOfMemoryMapEntries Memory Descriptors + +Return: + VOID * : The end address of MemoryAbove1MB (or the top free memory under 4GB) +--*/ +{ + UINTN Index; + + // + // Prepare Low Memory + // 0x18 pages is 72 KB. + // + gHob->MemoryFreeUnder1MB.ResourceLength = EFI_MEMORY_BELOW_1MB_END - EFI_MEMORY_BELOW_1MB_START; + gHob->MemoryFreeUnder1MB.PhysicalStart = EFI_MEMORY_BELOW_1MB_START; + + // + // Prepare High Memory + // Assume Memory Map is ordered from low to high + // + gHob->MemoryAbove1MB.PhysicalStart = 0; + gHob->MemoryAbove1MB.ResourceLength = 0; + gHob->MemoryAbove4GB.PhysicalStart = 0; + gHob->MemoryAbove4GB.ResourceLength = 0; + + for (Index = 0; Index < NumberOfMemoryMapEntries; Index++) { + // + // Skip regions below 1MB + // + if (EfiMemoryDescriptor[Index].PhysicalStart < 0x100000) { + continue; + } + // + // Process regions above 1MB + // + if (EfiMemoryDescriptor[Index].PhysicalStart >= 0x100000) { + if (EfiMemoryDescriptor[Index].Type == EfiConventionalMemory) { + if (gHob->MemoryAbove1MB.PhysicalStart == 0) { + gHob->MemoryAbove1MB.PhysicalStart = EfiMemoryDescriptor[Index].PhysicalStart; + gHob->MemoryAbove1MB.ResourceLength = LShiftU64 (EfiMemoryDescriptor[Index].NumberOfPages, EFI_PAGE_SHIFT); + } else if (gHob->MemoryAbove1MB.PhysicalStart + gHob->MemoryAbove1MB.ResourceLength == EfiMemoryDescriptor[Index].PhysicalStart) { + gHob->MemoryAbove1MB.ResourceLength += LShiftU64 (EfiMemoryDescriptor[Index].NumberOfPages, EFI_PAGE_SHIFT); + } + } + if ((EfiMemoryDescriptor[Index].Type == EfiReservedMemoryType) || + (EfiMemoryDescriptor[Index].Type >= EfiACPIReclaimMemory) ) { + continue; + } + if ((EfiMemoryDescriptor[Index].Type == EfiRuntimeServicesCode) || + (EfiMemoryDescriptor[Index].Type == EfiRuntimeServicesData)) { + break; + } + } + // + // Process region above 4GB + // + if (EfiMemoryDescriptor[Index].PhysicalStart >= 0x100000000) { + if (EfiMemoryDescriptor[Index].Type == EfiConventionalMemory) { + if (gHob->MemoryAbove4GB.PhysicalStart == 0) { + gHob->MemoryAbove4GB.PhysicalStart = EfiMemoryDescriptor[Index].PhysicalStart; + gHob->MemoryAbove4GB.ResourceLength = LShiftU64 (EfiMemoryDescriptor[Index].NumberOfPages, EFI_PAGE_SHIFT); + } + if (gHob->MemoryAbove4GB.PhysicalStart + gHob->MemoryAbove4GB.ResourceLength == + EfiMemoryDescriptor[Index].PhysicalStart) { + gHob->MemoryAbove4GB.ResourceLength += LShiftU64 (EfiMemoryDescriptor[Index].NumberOfPages, EFI_PAGE_SHIFT); + } + } + } + } + + if (gHob->MemoryAbove4GB.ResourceLength == 0) { + // + // If there is no memory above 4GB then change the resource descriptor HOB + // into another type. I'm doing this as it's unclear if a resource + // descriptor HOB of length zero is valid. Spec does not say it's illegal, + // but code in EDK does not seem to handle this case. + // + gHob->MemoryAbove4GB.Header.HobType = EFI_HOB_TYPE_UNUSED; + } + + return (VOID *)(UINTN)(gHob->MemoryAbove1MB.PhysicalStart + gHob->MemoryAbove1MB.ResourceLength); +} + +VOID * +PrepareHobStack ( + IN VOID *StackTop + ) +{ + gHob->Stack.AllocDescriptor.MemoryLength = EFI_MEMORY_STACK_PAGE_NUM * EFI_PAGE_SIZE; + gHob->Stack.AllocDescriptor.MemoryBaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)StackTop - gHob->Stack.AllocDescriptor.MemoryLength; + + return (VOID *)(UINTN)gHob->Stack.AllocDescriptor.MemoryBaseAddress; +} + +VOID * +PrepareHobMemoryDescriptor ( + VOID *MemoryDescriptorTop, + UINTN MemDescCount, + EFI_MEMORY_DESCRIPTOR *MemDesc + ) +{ + gHob->MemoryDescriptor.MemDescCount = MemDescCount; + gHob->MemoryDescriptor.MemDesc = (EFI_MEMORY_DESCRIPTOR *)((UINTN)MemoryDescriptorTop - MemDescCount * sizeof(EFI_MEMORY_DESCRIPTOR)); + // + // Make MemoryDescriptor.MemDesc page aligned + // + gHob->MemoryDescriptor.MemDesc = (EFI_MEMORY_DESCRIPTOR *)((UINTN) gHob->MemoryDescriptor.MemDesc & ~EFI_PAGE_MASK); + + CopyMem (gHob->MemoryDescriptor.MemDesc, MemDesc, MemDescCount * sizeof(EFI_MEMORY_DESCRIPTOR)); + + return gHob->MemoryDescriptor.MemDesc; +} + +VOID +PrepareHobBfv ( + VOID *Bfv, + UINTN BfvLength + ) +{ + UINTN BfvLengthPageSize; + + // + // Calculate BFV location at top of the memory region. + // This is like a RAM Disk. Align to page boundry. + // + BfvLengthPageSize = EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (BfvLength)); + + gHob->Bfv.BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Bfv; + gHob->Bfv.Length = BfvLength; + + // + // Resource descriptor for the FV + // + gHob->BfvResource.PhysicalStart = gHob->Bfv.BaseAddress; + gHob->BfvResource.ResourceLength = gHob->Bfv.Length; +} + +VOID +PrepareHobDxeCore ( + VOID *DxeCoreEntryPoint, + EFI_PHYSICAL_ADDRESS DxeCoreImageBase, + UINT64 DxeCoreLength + ) +{ + gHob->DxeCore.MemoryAllocationHeader.MemoryBaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)DxeCoreImageBase; + gHob->DxeCore.MemoryAllocationHeader.MemoryLength = DxeCoreLength; + gHob->DxeCore.EntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)DxeCoreEntryPoint; +} + +VOID * +PrepareHobNvStorage ( + VOID *NvStorageTop + ) +/* + Initialize Block-Aligned Firmware Block. + + Variable: + +-------------------+ + | FV_Header | + +-------------------+ + | | + |VAR_STORAGE(0x4000)| + | | + +-------------------+ + FTW: + +-------------------+ + | FV_Header | + +-------------------+ + | | + | Working(0x2000) | + | | + +-------------------+ + | | + | Spare(0x10000) | + | | + +-------------------+ +*/ +{ + static VARIABLE_STORE_HEADER VarStoreHeader = { + VARIABLE_STORE_SIGNATURE, + 0xffffffff, // will be fixed in Variable driver + VARIABLE_STORE_FORMATTED, + VARIABLE_STORE_HEALTHY, + 0, + 0 + }; + + static EFI_FIRMWARE_VOLUME_HEADER NvStorageFvbHeader = { + { + 0, + }, // ZeroVector[16] + EFI_SYSTEM_NV_DATA_FV_GUID, + NV_STORAGE_FVB_SIZE, + EFI_FVH_SIGNATURE, + EFI_FVB_READ_ENABLED_CAP | + EFI_FVB_READ_STATUS | + EFI_FVB_WRITE_ENABLED_CAP | + EFI_FVB_WRITE_STATUS | + EFI_FVB_ERASE_POLARITY, + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH, + 0, // CheckSum + 0, // ExtHeaderOffset + { + 0, + }, // Reserved[1] + 1, // Revision + { + { + NV_STORAGE_FVB_BLOCK_NUM, + FV_BLOCK_SIZE, + } + } + }; + + static EFI_FV_BLOCK_MAP_ENTRY BlockMapEntryEnd = {0, 0}; + + EFI_PHYSICAL_ADDRESS StorageFvbBase; + EFI_PHYSICAL_ADDRESS FtwFvbBase; + + UINT16 *Ptr; + UINT16 Checksum; + + + // + // Use first 16-byte Reset Vector of FVB to store extra information + // UINT32 Offset 0 stores the volume signature + // UINT8 Offset 4 : should init the Variable Store Header if non-zero + // + gHob->NvStorageFvb.FvbInfo.VolumeId = *(UINT32 *) (UINTN) (NV_STORAGE_STATE); + gHob->NvStorage. FvbInfo.VolumeId = *(UINT32 *) (UINTN) (NV_STORAGE_STATE); + + // + // *(NV_STORAGE_STATE + 4): + // 2 - Size error + // 1 - File not exist + // 0 - File exist with correct size + // + if (*(UINT8 *) (UINTN) (NV_STORAGE_STATE + 4) == 2) { + ClearScreen (); + PrintString ("Error: Size of Efivar.bin should be 16k!\n"); + CpuDeadLoop(); + } + + if (*(UINT8 *) (UINTN) (NV_STORAGE_STATE + 4) != 0) { + // + // Efivar.bin doesn't exist + // 1. Init variable storage header to valid header + // + CopyMem ( + (VOID *) (UINTN) NV_STORAGE_START, + &VarStoreHeader, + sizeof (VARIABLE_STORE_HEADER) + ); + // + // 2. set all bits in variable storage body to 1 + // + SetMem ( + (VOID *) (UINTN) (NV_STORAGE_START + sizeof (VARIABLE_STORE_HEADER)), + NV_STORAGE_SIZE - sizeof (VARIABLE_STORE_HEADER), + 0xff + ); + } + + // + // Relocate variable storage + // + // 1. Init FVB Header to valid header: First 0x48 bytes + // In real platform, these fields are fixed by tools + // + // + Checksum = 0; + for ( + Ptr = (UINT16 *) &NvStorageFvbHeader; + Ptr < (UINT16 *) ((UINTN) (UINT8 *) &NvStorageFvbHeader + sizeof (EFI_FIRMWARE_VOLUME_HEADER)); + ++Ptr + ) { + Checksum = (UINT16) (Checksum + (*Ptr)); + } + NvStorageFvbHeader.Checksum = (UINT16) (0x10000 - Checksum); + StorageFvbBase = (EFI_PHYSICAL_ADDRESS)(((UINTN)NvStorageTop - NV_STORAGE_FVB_SIZE - NV_FTW_FVB_SIZE) & ~EFI_PAGE_MASK); + CopyMem ((VOID *) (UINTN) StorageFvbBase, &NvStorageFvbHeader, sizeof (EFI_FIRMWARE_VOLUME_HEADER)); + CopyMem ( + (VOID *) (UINTN) (StorageFvbBase + sizeof (EFI_FIRMWARE_VOLUME_HEADER)), + &BlockMapEntryEnd, + sizeof (EFI_FV_BLOCK_MAP_ENTRY) + ); + + // + // 2. Relocate variable data + // + CopyMem ( + (VOID *) (UINTN) (StorageFvbBase + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH), + (VOID *) (UINTN) NV_STORAGE_START, + NV_STORAGE_SIZE + ); + + // + // 3. Set the remaining memory to 0xff + // + SetMem ( + (VOID *) (UINTN) (StorageFvbBase + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH + NV_STORAGE_SIZE), + NV_STORAGE_FVB_SIZE - NV_STORAGE_SIZE - EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH, + 0xff + ); + + // + // Create the FVB holding NV Storage in memory + // + gHob->NvStorageFvResource.PhysicalStart = + gHob->NvStorageFvb.FvbInfo.Entries[0].Base = StorageFvbBase; + // + // Create the NV Storage Hob + // + gHob->NvStorage.FvbInfo.Entries[0].Base = StorageFvbBase + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH; + + // + // Create the FVB holding FTW spaces + // + FtwFvbBase = (EFI_PHYSICAL_ADDRESS)((UINTN) StorageFvbBase + NV_STORAGE_FVB_SIZE); + gHob->NvFtwFvb.FvbInfo.Entries[0].Base = FtwFvbBase; + // + // Put FTW Working in front + // + gHob->NvFtwWorking.FvbInfo.Entries[0].Base = FtwFvbBase + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH; + + // + // Put FTW Spare area after FTW Working area + // + gHob->NvFtwSpare.FvbInfo.Entries[0].Base = + (EFI_PHYSICAL_ADDRESS)((UINTN) FtwFvbBase + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH + NV_FTW_WORKING_SIZE); + + return (VOID *)(UINTN)StorageFvbBase; +} + +VOID +PrepareHobPhit ( + VOID *MemoryTop, + VOID *FreeMemoryTop + ) +{ + gHob->Phit.EfiMemoryTop = (EFI_PHYSICAL_ADDRESS)(UINTN)MemoryTop; + gHob->Phit.EfiMemoryBottom = gHob->Phit.EfiMemoryTop - CONSUMED_MEMORY; + gHob->Phit.EfiFreeMemoryTop = (EFI_PHYSICAL_ADDRESS)(UINTN)FreeMemoryTop; + gHob->Phit.EfiFreeMemoryBottom = gHob->Phit.EfiMemoryBottom + sizeof(HOB_TEMPLATE); + + CopyMem ((VOID *)(UINTN)gHob->Phit.EfiMemoryBottom, gHob, sizeof(HOB_TEMPLATE)); + gHob = (HOB_TEMPLATE *)(UINTN)gHob->Phit.EfiMemoryBottom; + + gHob->Phit.EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS)(UINTN)&gHob->EndOfHobList; +} + +VOID +PrepareHobCpu ( + VOID + ) +{ + EFI_CPUID_REGISTER Reg; + UINT8 CpuMemoryAddrBitNumber; + + // + // Create a CPU hand-off information + // + CpuMemoryAddrBitNumber = 36; + AsmCpuid (EFI_CPUID_EXTENDED_FUNCTION, &Reg.RegEax, &Reg.RegEbx, &Reg.RegEcx, &Reg.RegEdx); + + if (Reg.RegEax >= CPUID_EXTENDED_ADD_SIZE) { + AsmCpuid (CPUID_EXTENDED_ADD_SIZE, &Reg.RegEax, &Reg.RegEbx, &Reg.RegEcx, &Reg.RegEdx); + CpuMemoryAddrBitNumber = (UINT8)(UINTN)(Reg.RegEax & 0xFF); + } + + gHob->Cpu.SizeOfMemorySpace = CpuMemoryAddrBitNumber; +} + +VOID +CompleteHobGeneration ( + VOID + ) +{ + gHob->MemoryAllocation.AllocDescriptor.MemoryBaseAddress = gHob->Phit.EfiFreeMemoryTop; + // + // Reserve all the memory under Stack above FreeMemoryTop as allocated + // + gHob->MemoryAllocation.AllocDescriptor.MemoryLength = gHob->Stack.AllocDescriptor.MemoryBaseAddress - gHob->Phit.EfiFreeMemoryTop; + + // + // adjust Above1MB ResourceLength + // + if (gHob->MemoryAbove1MB.PhysicalStart + gHob->MemoryAbove1MB.ResourceLength > gHob->Phit.EfiMemoryTop) { + gHob->MemoryAbove1MB.ResourceLength = gHob->Phit.EfiMemoryTop - gHob->MemoryAbove1MB.PhysicalStart; + } +} + diff --git a/DuetPkg/DxeIpl/HobGeneration.h b/DuetPkg/DxeIpl/HobGeneration.h new file mode 100644 index 0000000000..438e95272b --- /dev/null +++ b/DuetPkg/DxeIpl/HobGeneration.h @@ -0,0 +1,178 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + HobGeneration.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _DXELDR_HOB_GENERATION_H_ +#define _DXELDR_HOB_GENERATION_H_ + +#include "DxeIpl.h" + +#define EFI_MEMORY_BELOW_1MB_START 0x86000 +#define EFI_MEMORY_BELOW_1MB_END 0x9F800 +#define EFI_MEMORY_STACK_PAGE_NUM 0x20 +#define CONSUMED_MEMORY 0x2000000 + +#define NV_STORAGE_START 0x15000 +#define NV_STORAGE_STATE 0x19000 + +#define EFI_LDR_MEMORY_DESCRIPTOR_GUID \ + { 0x7701d7e5, 0x7d1d, 0x4432, 0xa4, 0x68, 0x67, 0x3d, 0xab, 0x8a, 0xde, 0x60 } + +#pragma pack(1) + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + EFI_MEMORY_TYPE_INFORMATION Info[10]; +} MEMORY_TYPE_INFORMATION_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + EFI_PHYSICAL_ADDRESS Table; +} TABLE_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + VOID *Interface; +} PROTOCOL_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + UINTN MemDescCount; + EFI_MEMORY_DESCRIPTOR *MemDesc; +} MEMORY_DESC_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + // Note: we get only one PCI Segment now. + EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION PciExpressBaseAddressInfo; +} PCI_EXPRESS_BASE_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + EFI_ACPI_DESCRIPTION AcpiDescription; +} ACPI_DESCRIPTION_HOB; + +typedef struct { + EFI_HOB_GUID_TYPE Hob; + EFI_FLASH_MAP_FS_ENTRY_DATA FvbInfo; +} FVB_HOB; + +typedef struct { + EFI_HOB_HANDOFF_INFO_TABLE Phit; + EFI_HOB_FIRMWARE_VOLUME Bfv; + EFI_HOB_RESOURCE_DESCRIPTOR BfvResource; + EFI_HOB_CPU Cpu; + EFI_HOB_MEMORY_ALLOCATION_STACK Stack; + EFI_HOB_MEMORY_ALLOCATION MemoryAllocation; + EFI_HOB_RESOURCE_DESCRIPTOR MemoryFreeUnder1MB; + EFI_HOB_RESOURCE_DESCRIPTOR MemoryAbove1MB; + EFI_HOB_RESOURCE_DESCRIPTOR MemoryAbove4GB; + EFI_HOB_MEMORY_ALLOCATION_MODULE DxeCore; + MEMORY_TYPE_INFORMATION_HOB MemoryTypeInfo; + TABLE_HOB Acpi; + TABLE_HOB Acpi20; + TABLE_HOB Smbios; + TABLE_HOB Mps; + /** + PROTOCOL_HOB FlushInstructionCache; + PROTOCOL_HOB TransferControl; + PROTOCOL_HOB PeCoffLoader; + PROTOCOL_HOB EfiDecompress; + PROTOCOL_HOB TianoDecompress; + **/ + PROTOCOL_HOB SerialStatusCode; + MEMORY_DESC_HOB MemoryDescriptor; + PCI_EXPRESS_BASE_HOB PciExpress; + ACPI_DESCRIPTION_HOB AcpiInfo; + + EFI_HOB_RESOURCE_DESCRIPTOR NvStorageFvResource; + + FVB_HOB NvStorageFvb; + FVB_HOB NvStorage; + + FVB_HOB NvFtwFvb; + FVB_HOB NvFtwWorking; + FVB_HOB NvFtwSpare; + + EFI_HOB_GENERIC_HEADER EndOfHobList; +} HOB_TEMPLATE; + +#pragma pack() + +extern HOB_TEMPLATE *gHob; + +VOID * +PrepareHobStack ( + IN VOID *StackTop + ); + +VOID +PrepareHobBfv ( + VOID *Bfv, + UINTN BfvLength + ); + +VOID * +PrepareHobMemory ( + IN UINTN NumberOfMemoryMapEntries, + IN EFI_MEMORY_DESCRIPTOR *EfiMemoryDescriptor + ); + +VOID +PrepareHobDxeCore ( + VOID *DxeCoreEntryPoint, + EFI_PHYSICAL_ADDRESS DxeCoreImageBase, + UINT64 DxeCoreLength + ); + +VOID * +PreparePageTable ( + VOID *PageNumberTop, + UINT8 SizeOfMemorySpace + ); + +VOID * +PrepareHobMemoryDescriptor ( + VOID *MemoryDescriptorTop, + UINTN MemDescCount, + EFI_MEMORY_DESCRIPTOR *MemDesc + ); + +VOID +PrepareHobPhit ( + VOID *MemoryTop, + VOID *FreeMemoryTop + ); + +VOID * +PrepareHobNvStorage ( + VOID *NvStorageTop + ); + +VOID +PrepareHobCpu ( + VOID + ); + +VOID +CompleteHobGeneration ( + VOID + ); + +#endif diff --git a/DuetPkg/DxeIpl/Ia32/CpuIoAccess.asm b/DuetPkg/DxeIpl/Ia32/CpuIoAccess.asm new file mode 100644 index 0000000000..00a80ef75b --- /dev/null +++ b/DuetPkg/DxeIpl/Ia32/CpuIoAccess.asm @@ -0,0 +1,62 @@ + title CpuIoAccess.asm +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; CpuIoAccess.asm +; +; Abstract: +; CPU IO Abstraction +; +;------------------------------------------------------------------------------ + + .686 + .MODEL FLAT,C + .CODE + + +UINT8 TYPEDEF BYTE +UINT16 TYPEDEF WORD +UINT32 TYPEDEF DWORD +UINT64 TYPEDEF QWORD +UINTN TYPEDEF UINT32 + + + +;------------------------------------------------------------------------------ +; UINT8 +; CpuIoRead8 ( +; IN UINT16 Port +; ) +;------------------------------------------------------------------------------ +CpuIoRead8 PROC PUBLIC Port:UINT16 + mov dx, Port + in al, dx + ret +CpuIoRead8 ENDP + + +;------------------------------------------------------------------------------ +; VOID +; CpuIoWrite8 ( +; IN UINT16 Port, +; IN UINT32 Data +; ) +;------------------------------------------------------------------------------ +CpuIoWrite8 PROC PUBLIC Port:UINT16, Data:UINT32 + mov eax, Data + mov dx, Port + out dx, al + ret +CpuIoWrite8 ENDP + + +END \ No newline at end of file diff --git a/DuetPkg/DxeIpl/Ia32/EnterDxeCore.asm b/DuetPkg/DxeIpl/Ia32/EnterDxeCore.asm new file mode 100644 index 0000000000..0689a824c3 --- /dev/null +++ b/DuetPkg/DxeIpl/Ia32/EnterDxeCore.asm @@ -0,0 +1,64 @@ + TITLE EnterDxeCore.asm: Assembly code for the entering DxeCore +;------------------------------------------------------------------------------ +;* +;* Copyright 2006, Intel Corporation +;* All rights reserved. This program and the accompanying materials +;* are licensed and made available under the terms and conditions of the BSD License +;* which accompanies this distribution. The full text of the license may be found at +;* http://opensource.org/licenses/bsd-license.php +;* +;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +;* +;* EnterDxeCore.asm +;* +;* Abstract: +;* +;------------------------------------------------------------------------------ + +.686p +.model flat + +.code +.stack +.MMX +.XMM + +; +; VOID +; EnterDxeMain ( +; IN VOID *StackTop, +; IN VOID *DxeCoreEntryPoint, +; IN VOID *Hob, +; IN VOID *PageTable +; ) +; +EnterDxeMain PROC C \ + StackTop:DWORD, \ + DxeCoreEntryPoint:DWORD, \ + Hob:DWORD, \ + PageTable:DWORD + + mov eax, PageTable +; mov cr3, eax ; load page table +; mov eax, cr4 +; bts eax, 4 ; enable CR4.PSE +; mov cr4, eax +; mov eax, cr0 +; bts eax, 31 ; enable CR0.PG +; mov cr0, eax + mov ecx, DxeCoreEntryPoint + mov eax, StackTop + mov esp, eax + mov edx, Hob + push edx + push 0 + jmp ecx + +; should never get here + jmp $ + ret + +EnterDxeMain ENDP + +END diff --git a/DuetPkg/DxeIpl/Ia32/Paging.c b/DuetPkg/DxeIpl/Ia32/Paging.c new file mode 100644 index 0000000000..dbc43a3080 --- /dev/null +++ b/DuetPkg/DxeIpl/Ia32/Paging.c @@ -0,0 +1,172 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + Paging.c + +Abstract: + +Revision History: + +--*/ + +#include "DxeIpl.h" +#include "HobGeneration.h" +#include "VirtualMemory.h" +#include "Debug.h" + +#define EFI_PAGE_SIZE_4K 0x1000 +#define EFI_PAGE_SIZE_4M 0x400000 + +// +// Create 4G 4M-page table +// PDE (31:22) : 1024 entries +// +#define EFI_MAX_ENTRY_NUM 1024 + +#define EFI_PDE_ENTRY_NUM EFI_MAX_ENTRY_NUM + +#define EFI_PDE_PAGE_NUM 1 + +#define EFI_PAGE_NUMBER_4M (EFI_PDE_PAGE_NUM) + +// +// Create 4M 4K-page table +// PTE (21:12) : 1024 entries +// +#define EFI_PTE_ENTRY_NUM EFI_MAX_ENTRY_NUM +#define EFI_PTE_PAGE_NUM 1 + +#define EFI_PAGE_NUMBER_4K (EFI_PTE_PAGE_NUM) + +#define EFI_PAGE_NUMBER (EFI_PAGE_NUMBER_4M + EFI_PAGE_NUMBER_4K) + +VOID +EnableNullPointerProtection ( + UINT8 *PageTable + ) +{ + IA32_PAGE_TABLE_ENTRY_4K *PageTableEntry4KB; + + PageTableEntry4KB = (IA32_PAGE_TABLE_ENTRY_4K *)((UINTN)PageTable + EFI_PAGE_NUMBER_4M * EFI_PAGE_SIZE_4K); + + // + // Fill in the Page Table entries + // Mark 0~4K as not present + // + PageTableEntry4KB->Bits.Present = 0; + + return ; +} + +VOID +Ia32Create4KPageTables ( + UINT8 *PageTable + ) +{ + UINT64 PageAddress; + UINTN PTEIndex; + IA32_PAGE_DIRECTORY_ENTRY_4K *PageDirectoryEntry4KB; + IA32_PAGE_TABLE_ENTRY_4K *PageTableEntry4KB; + + PageAddress = 0; + + // + // Page Table structure 2 level 4K. + // + // Page Table 4K : PageDirectoryEntry4K : bits 31-22 + // PageTableEntry : bits 21-12 + // + + PageTableEntry4KB = (IA32_PAGE_TABLE_ENTRY_4K *)((UINTN)PageTable + EFI_PAGE_NUMBER_4M * EFI_PAGE_SIZE_4K); + PageDirectoryEntry4KB = (IA32_PAGE_DIRECTORY_ENTRY_4K *)((UINTN)PageTable); + + PageDirectoryEntry4KB->Uint32 = (UINT32)(UINTN)PageTableEntry4KB; + PageDirectoryEntry4KB->Bits.ReadWrite = 0; + PageDirectoryEntry4KB->Bits.Present = 1; + PageDirectoryEntry4KB->Bits.MustBeZero = 1; + + for (PTEIndex = 0; PTEIndex < EFI_PTE_ENTRY_NUM; PTEIndex++, PageTableEntry4KB++) { + // + // Fill in the Page Table entries + // + PageTableEntry4KB->Uint32 = (UINT32)PageAddress; + PageTableEntry4KB->Bits.ReadWrite = 1; + PageTableEntry4KB->Bits.Present = 1; + + PageAddress += EFI_PAGE_SIZE_4K; + } + + return ; +} + +VOID +Ia32Create4MPageTables ( + UINT8 *PageTable + ) +{ + UINT32 PageAddress; + UINT8 *TempPageTable; + UINTN PDEIndex; + IA32_PAGE_TABLE_ENTRY_4M *PageDirectoryEntry4MB; + + TempPageTable = PageTable; + + PageAddress = 0; + + // + // Page Table structure 1 level 4MB. + // + // Page Table 4MB : PageDirectoryEntry4M : bits 31-22 + // + + PageDirectoryEntry4MB = (IA32_PAGE_TABLE_ENTRY_4M *)TempPageTable; + + for (PDEIndex = 0; PDEIndex < EFI_PDE_ENTRY_NUM; PDEIndex++, PageDirectoryEntry4MB++) { + // + // Fill in the Page Directory entries + // + PageDirectoryEntry4MB->Uint32 = (UINT32)PageAddress; + PageDirectoryEntry4MB->Bits.ReadWrite = 1; + PageDirectoryEntry4MB->Bits.Present = 1; + PageDirectoryEntry4MB->Bits.MustBe1 = 1; + + PageAddress += EFI_PAGE_SIZE_4M; + } + + return ; +} + +VOID * +PreparePageTable ( + VOID *PageNumberTop, + UINT8 SizeOfMemorySpace + ) +/*++ +Description: + Generate pagetable below PageNumberTop, + and return the bottom address of pagetable for putting other things later. +--*/ +{ + VOID *PageNumberBase; + + PageNumberBase = (VOID *)((UINTN)PageNumberTop - EFI_PAGE_NUMBER * EFI_PAGE_SIZE_4K); + ZeroMem (PageNumberBase, EFI_PAGE_NUMBER * EFI_PAGE_SIZE_4K); + + Ia32Create4MPageTables (PageNumberBase); + Ia32Create4KPageTables (PageNumberBase); + // + // Not enable NULL Pointer Protection if using INTX call + // +// EnableNullPointerProtection (PageNumberBase); + + return PageNumberBase; +} diff --git a/DuetPkg/DxeIpl/Ia32/VirtualMemory.h b/DuetPkg/DxeIpl/Ia32/VirtualMemory.h new file mode 100644 index 0000000000..04eab8f206 --- /dev/null +++ b/DuetPkg/DxeIpl/Ia32/VirtualMemory.h @@ -0,0 +1,88 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + VirtualMemory.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _VIRTUAL_MEMORY_H_ +#define _VIRTUAL_MEMORY_H_ + +#pragma pack(1) + +// +// Page Directory Entry 4K +// +typedef union { + struct { + UINT32 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT32 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT32 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT32 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT32 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT32 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT32 MustBeZero:3; // Must Be Zero + UINT32 Available:3; // Available for use by system software + UINT32 PageTableBaseAddress:20; // Page Table Base Address + } Bits; + UINT32 Uint32; +} IA32_PAGE_DIRECTORY_ENTRY_4K; + +// +// Page Table Entry 4K +// +typedef union { + struct { + UINT32 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT32 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT32 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT32 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT32 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT32 Accessed:1; // 0 = Not accessed (cleared by software), 1 = Accessed (set by CPU) + UINT32 Dirty:1; // 0 = Not written to (cleared by software), 1 = Written to (set by CPU) + UINT32 PAT:1; // 0 = Disable PAT, 1 = Enable PAT + UINT32 Global:1; // Ignored + UINT32 Available:3; // Available for use by system software + UINT32 PageTableBaseAddress:20; // Page Table Base Address + } Bits; + UINT32 Uint32; +} IA32_PAGE_TABLE_ENTRY_4K; + +// +// Page Table Entry 4M +// +typedef union { + struct { + UINT32 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT32 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT32 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT32 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT32 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT32 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT32 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page + UINT32 MustBe1:1; // Must be 1 + UINT32 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write + UINT32 Available:3; // Available for use by system software + UINT32 PAT:1; // + UINT32 MustBeZero:9; // Must be zero; + UINT32 PageTableBaseAddress:10; // Page Table Base Address + } Bits; + UINT32 Uint32; +} IA32_PAGE_TABLE_ENTRY_4M; + +#pragma pack() + +#endif diff --git a/DuetPkg/DxeIpl/LegacyTable.c b/DuetPkg/DxeIpl/LegacyTable.c new file mode 100644 index 0000000000..a0fa894e35 --- /dev/null +++ b/DuetPkg/DxeIpl/LegacyTable.c @@ -0,0 +1,425 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + LegacyTable.c + +Abstract: + +Revision History: + +--*/ + +#include "DxeIpl.h" +#include "HobGeneration.h" + +#define ACPI_RSD_PTR 0x2052545020445352 +#define MPS_PTR EFI_SIGNATURE_32('_','M','P','_') +#define SMBIOS_PTR EFI_SIGNATURE_32('_','S','M','_') + +#define EBDA_BASE_ADDRESS 0x40E + +VOID * +FindAcpiRsdPtr ( + VOID + ) +{ + UINTN Address; + UINTN Index; + + // + // First Seach 0x0e0000 - 0x0fffff for RSD Ptr + // + for (Address = 0xe0000; Address < 0xfffff; Address += 0x10) { + if (*(UINT64 *)(Address) == ACPI_RSD_PTR) { + return (VOID *)Address; + } + } + + // + // Search EBDA + // + + Address = (*(UINT16 *)(UINTN)(EBDA_BASE_ADDRESS)) << 4; + for (Index = 0; Index < 0x400 ; Index += 16) { + if (*(UINT64 *)(Address + Index) == ACPI_RSD_PTR) { + return (VOID *)Address; + } + } + return NULL; +} + +VOID * +FindSMBIOSPtr ( + VOID + ) +{ + UINTN Address; + + // + // First Seach 0x0f0000 - 0x0fffff for SMBIOS Ptr + // + for (Address = 0xf0000; Address < 0xfffff; Address += 0x10) { + if (*(UINT32 *)(Address) == SMBIOS_PTR) { + return (VOID *)Address; + } + } + return NULL; +} + +VOID * +FindMPSPtr ( + VOID + ) +{ + UINTN Address; + UINTN Index; + + // + // First Seach 0x0e0000 - 0x0fffff for MPS Ptr + // + for (Address = 0xe0000; Address < 0xfffff; Address += 0x10) { + if (*(UINT32 *)(Address) == MPS_PTR) { + return (VOID *)Address; + } + } + + // + // Search EBDA + // + + Address = (*(UINT16 *)(UINTN)(EBDA_BASE_ADDRESS)) << 4; + for (Index = 0; Index < 0x400 ; Index += 16) { + if (*(UINT32 *)(Address + Index) == MPS_PTR) { + return (VOID *)Address; + } + } + return NULL; +} + +#pragma pack(1) +typedef struct { + UINT8 Signature[8]; + UINT8 Checksum; + UINT8 OemId[6]; + UINT8 Revision; + UINT32 RsdtAddress; + UINT32 Length; + UINT64 XsdtAddress; + UINT8 ExtendedChecksum; + UINT8 Reserved[3]; +} RSDP_TABLE; + +typedef struct { + UINT32 Signature; + UINT32 Length; + UINT8 Revision; + UINT8 Checksum; + UINT8 OemId[6]; + UINT8 OemTableId[8]; + UINT32 OemRevision; + UINT8 CreatorId[4]; + UINT32 CreatorRevision; +} DESCRIPTION_HEADER; + +typedef struct { + DESCRIPTION_HEADER Header; + UINT32 Entry; +} RSDT_TABLE; + +typedef struct { + DESCRIPTION_HEADER Header; + UINT64 Entry; +} XSDT_TABLE; + +typedef struct { + UINT8 Address_Space_ID; + UINT8 Register_Bit_Width; + UINT8 Register_Bit_Offset; + UINT8 Access_Size; + UINT64 Address; +} GADDRESS_STRUCTURE; + +#pragma pack() + +VOID +ScanTableInRSDT ( + RSDT_TABLE *Rsdt, + UINT32 Signature, + DESCRIPTION_HEADER **FoundTable + ) +{ + UINTN Index; + UINT32 EntryCount; + UINT32 *EntryPtr; + DESCRIPTION_HEADER *Table; + + *FoundTable = NULL; + + EntryCount = (Rsdt->Header.Length - sizeof (DESCRIPTION_HEADER)) / sizeof(UINT32); + + EntryPtr = &Rsdt->Entry; + for (Index = 0; Index < EntryCount; Index ++, EntryPtr ++) { + Table = (DESCRIPTION_HEADER*)((UINTN)(*EntryPtr)); + if (Table->Signature == Signature) { + *FoundTable = Table; + break; + } + } + + return; +} + +VOID +ScanTableInXSDT ( + XSDT_TABLE *Xsdt, + UINT32 Signature, + DESCRIPTION_HEADER **FoundTable + ) +{ + UINTN Index; + UINT32 EntryCount; + UINT64 EntryPtr; + UINTN BasePtr; + + DESCRIPTION_HEADER *Table; + + *FoundTable = NULL; + + EntryCount = (Xsdt->Header.Length - sizeof (DESCRIPTION_HEADER)) / sizeof(UINT64); + + BasePtr = (UINTN)(&(Xsdt->Entry)); + for (Index = 0; Index < EntryCount; Index ++) { + CopyMem (&EntryPtr, (VOID *)(BasePtr + Index * sizeof(UINT64)), sizeof(UINT64)); + Table = (DESCRIPTION_HEADER*)((UINTN)(EntryPtr)); + if (Table->Signature == Signature) { + *FoundTable = Table; + break; + } + } + + return; +} + +VOID * +FindAcpiPtr ( + IN HOB_TEMPLATE *Hob, + UINT32 Signature + ) +{ + DESCRIPTION_HEADER *AcpiTable; + RSDP_TABLE *Rsdp; + RSDT_TABLE *Rsdt; + XSDT_TABLE *Xsdt; + + AcpiTable = NULL; + + // + // Check ACPI2.0 table + // + if (Hob->Acpi20.Table > 0) { + Rsdp = (RSDP_TABLE *)(UINTN)Hob->Acpi20.Table; + Rsdt = (RSDT_TABLE *)(UINTN)Rsdp->RsdtAddress; + Xsdt = NULL; + if ((Rsdp->Revision >= 2) && (Rsdp->XsdtAddress < (UINT64)(UINTN)-1)) { + Xsdt = (XSDT_TABLE *)(UINTN)Rsdp->XsdtAddress; + } + // + // Check Xsdt + // + if (Xsdt != NULL) { + ScanTableInXSDT (Xsdt, Signature, &AcpiTable); + } + // + // Check Rsdt + // + if ((AcpiTable == NULL) && (Rsdt != NULL)) { + ScanTableInRSDT (Rsdt, Signature, &AcpiTable); + } + } + + // + // Check ACPI1.0 table + // + if ((AcpiTable == NULL) && (Hob->Acpi.Table > 0)) { + Rsdp = (RSDP_TABLE *)(UINTN)Hob->Acpi.Table; + Rsdt = (RSDT_TABLE *)(UINTN)Rsdp->RsdtAddress; + // + // Check Rsdt + // + if (Rsdt != NULL) { + ScanTableInRSDT (Rsdt, Signature, &AcpiTable); + } + } + + return AcpiTable; +} + +#pragma pack(1) +//#define MCFG_SIGNATURE 0x4746434D +#define MCFG_SIGNATURE EFI_SIGNATURE_32 ('M', 'C', 'F', 'G') +typedef struct { + UINT64 BaseAddress; + UINT16 PciSegmentGroupNumber; + UINT8 StartBusNumber; + UINT8 EndBusNumber; + UINT32 Reserved; +} MCFG_STRUCTURE; + +#define FADT_SIGNATURE EFI_SIGNATURE_32 ('F', 'A', 'C', 'P') +typedef struct { + DESCRIPTION_HEADER Header; + UINT32 FIRMWARE_CTRL; + UINT32 DSDT; + UINT8 INT_MODEL; + UINT8 Preferred_PM_Profile; + UINT16 SCI_INIT; + UINT32 SMI_CMD; + UINT8 ACPI_ENABLE; + UINT8 ACPI_DISABLE; + UINT8 S4BIOS_REQ; + UINT8 PSTATE_CNT; + UINT32 PM1a_EVT_BLK; + UINT32 PM1b_EVT_BLK; + UINT32 PM1a_CNT_BLK; + UINT32 PM1b_CNT_BLK; + UINT32 PM2_CNT_BLK; + UINT32 PM_TMR_BLK; + UINT32 GPE0_BLK; + UINT32 GPE1_BLK; + UINT8 PM1_EVT_LEN; + UINT8 PM1_CNT_LEN; + UINT8 PM2_CNT_LEN; + UINT8 PM_TMR_LEN; + UINT8 GPE0_BLK_LEN; + UINT8 GPE1_BLK_LEN; + UINT8 GPE1_BASE; + UINT8 CST_CNT; + UINT16 P_LVL2_LAT; + UINT16 P_LVL3_LAT; + UINT16 FLUSH_SIZE; + UINT16 FLUSH_STRIDE; + UINT8 DUTY_OFFSET; + UINT8 DUTY_WIDTH; + UINT8 DAY_ALARM; + UINT8 MON_ALARM; + UINT8 CENTRY; + UINT16 IAPC_BOOT_ARCH; + UINT8 Reserved_111; + UINT32 Flags; + GADDRESS_STRUCTURE RESET_REG; + UINT8 RESET_VALUE; + UINT8 Reserved_129[3]; + UINT64 X_FIRMWARE_CTRL; + UINT64 X_DSDT; + GADDRESS_STRUCTURE X_PM1a_EVT_BLK; + GADDRESS_STRUCTURE X_PM1b_EVT_BLK; + GADDRESS_STRUCTURE X_PM1a_CNT_BLK; + GADDRESS_STRUCTURE X_PM1b_CNT_BLK; + GADDRESS_STRUCTURE X_PM2_CNT_BLK; + GADDRESS_STRUCTURE X_PM_TMR_BLK; + GADDRESS_STRUCTURE X_GPE0_BLK; + GADDRESS_STRUCTURE X_GPE1_BLK; +} FADT_TABLE; + +#pragma pack() + +VOID +PrepareMcfgTable ( + IN HOB_TEMPLATE *Hob + ) +{ + DESCRIPTION_HEADER *McfgTable; + MCFG_STRUCTURE *Mcfg; + UINTN McfgCount; + UINTN Index; + + McfgTable = FindAcpiPtr (Hob, MCFG_SIGNATURE); + if (McfgTable == NULL) { + return ; + } + + Mcfg = (MCFG_STRUCTURE *)((UINTN)McfgTable + sizeof(DESCRIPTION_HEADER) + sizeof(UINT64)); + McfgCount = (McfgTable->Length - sizeof(DESCRIPTION_HEADER) - sizeof(UINT64)) / sizeof(MCFG_STRUCTURE); + + // + // Fill PciExpress info on Hob + // Note: Only for 1st segment + // + for (Index = 0; Index < McfgCount; Index++) { + if (Mcfg[Index].PciSegmentGroupNumber == 0) { + Hob->PciExpress.PciExpressBaseAddressInfo.PciExpressBaseAddress = Mcfg[Index].BaseAddress; + break; + } + } + + return ; +} + +VOID +PrepareFadtTable ( + IN HOB_TEMPLATE *Hob + ) +{ + FADT_TABLE *Fadt; + EFI_ACPI_DESCRIPTION *AcpiDescription; + + Fadt = FindAcpiPtr (Hob, FADT_SIGNATURE); + if (Fadt == NULL) { + return ; + } + + AcpiDescription = &Hob->AcpiInfo.AcpiDescription; + // + // Fill AcpiDescription according to FADT + // Currently, only for PM_TMR + // + AcpiDescription->PM_TMR_LEN = Fadt->PM_TMR_LEN; + AcpiDescription->TMR_VAL_EXT = (UINT8)((Fadt->Flags & 0x100) != 0); + if ((Fadt->Header.Revision >= 3) && (Fadt->Header.Length >= sizeof(FADT_TABLE))) { + CopyMem ( + &AcpiDescription->PM_TMR_BLK, + &Fadt->X_PM_TMR_BLK, + sizeof(GADDRESS_STRUCTURE) + ); + CopyMem ( + &AcpiDescription->RESET_REG, + &Fadt->RESET_REG, + sizeof(GADDRESS_STRUCTURE) + ); + AcpiDescription->RESET_VALUE = Fadt->RESET_VALUE; + } + if (AcpiDescription->PM_TMR_BLK.Address == 0) { + AcpiDescription->PM_TMR_BLK.Address = Fadt->PM_TMR_BLK; + AcpiDescription->PM_TMR_BLK.AddressSpaceId = ACPI_ADDRESS_ID_IO; + AcpiDescription->PM_TMR_BLK.RegisterBitWidth = (AcpiDescription->TMR_VAL_EXT == 0) ? 24 : 32; + } + + return ; +} + +VOID +PrepareHobLegacyTable ( + IN HOB_TEMPLATE *Hob + ) +{ + Hob->Acpi.Table = (EFI_PHYSICAL_ADDRESS)(UINTN)FindAcpiRsdPtr (); + Hob->Acpi20.Table = (EFI_PHYSICAL_ADDRESS)(UINTN)FindAcpiRsdPtr (); + Hob->Smbios.Table = (EFI_PHYSICAL_ADDRESS)(UINTN)FindSMBIOSPtr (); + Hob->Mps.Table = (EFI_PHYSICAL_ADDRESS)(UINTN)FindMPSPtr (); + + PrepareMcfgTable (Hob); + + PrepareFadtTable (Hob); + + return ; +} + diff --git a/DuetPkg/DxeIpl/LegacyTable.h b/DuetPkg/DxeIpl/LegacyTable.h new file mode 100644 index 0000000000..77ec756196 --- /dev/null +++ b/DuetPkg/DxeIpl/LegacyTable.h @@ -0,0 +1,31 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + LegacyTable.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _DXELDR_LEGACY_TABLE_H_ +#define _DXELDR_LEGACY_TABLE_H_ + +#include "HobGeneration.h" + +VOID +PrepareHobLegacyTable ( + IN HOB_TEMPLATE *Hob + ); + +#endif diff --git a/DuetPkg/DxeIpl/PpisNeededByDxeCore.c b/DuetPkg/DxeIpl/PpisNeededByDxeCore.c new file mode 100644 index 0000000000..54f8aa7530 --- /dev/null +++ b/DuetPkg/DxeIpl/PpisNeededByDxeCore.c @@ -0,0 +1,78 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + PpisNeededByDxeCore.c + +Abstract: + +Revision History: + +--*/ + +#include "PpisNeededByDxeCore.h" +#include "HobGeneration.h" +#include "SerialStatusCode.h" + +EFI_STATUS +EFIAPI +PreparePpisNeededByDxeCore ( + IN HOB_TEMPLATE *Hob + ) +/*++ + +Routine Description: + + This routine adds the PPI/Protocol Hobs that are consumed by the DXE Core. + Normally these come from PEI, but since our PEI was 32-bit we need an + alternate source. That is this driver. + + This driver does not consume PEI or DXE services and thus updates the + Phit (HOB list) directly + +Arguments: + + HobStart - Pointer to the beginning of the HOB List from PEI + +Returns: + + This function should after it has add it's HOBs + +--*/ +{ + //EFI_PEI_PE_COFF_LOADER_PROTOCOL *PeCoffLoader; + //EFI_DECOMPRESS_PROTOCOL *EfiDecompress; + //EFI_TIANO_DECOMPRESS_PROTOCOL *TianoDecompress; + EFI_REPORT_STATUS_CODE ReportStatusCode; + + //InstallEfiPeiFlushInstructionCache (&FlushInstructionCache); + //Hob->FlushInstructionCache.Interface = FlushInstructionCache; + + // R9 do not need this protocol. + // InstallEfiPeiTransferControl (&TransferControl); + // Hob->TransferControl.Interface = TransferControl; + + //InstallEfiPeiPeCoffLoader (NULL, &PeCoffLoader, NULL); + //Hob->PeCoffLoader.Interface = PeCoffLoader; + + //InstallEfiDecompress (&EfiDecompress); + //Hob->EfiDecompress.Interface = EfiDecompress; + + //InstallTianoDecompress (&TianoDecompress); + //Hob->TianoDecompress.Interface = TianoDecompress; + + InstallSerialStatusCode (&ReportStatusCode); + Hob->SerialStatusCode.Interface = (VOID *)(UINTN)ReportStatusCode; + + return EFI_SUCCESS; +} + + diff --git a/DuetPkg/DxeIpl/PpisNeededByDxeCore.h b/DuetPkg/DxeIpl/PpisNeededByDxeCore.h new file mode 100644 index 0000000000..61e9cbec2e --- /dev/null +++ b/DuetPkg/DxeIpl/PpisNeededByDxeCore.h @@ -0,0 +1,64 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + PpisNeededByDxeCore.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _DXELDR_PPIS_NEEDED_BY_DXE_CORE_H_ +#define _DXELDR_PPIS_NEEDED_BY_DXE_CORE_H_ + +#include "DxeIpl.h" +#include "HobGeneration.h" + +//EFI_STATUS +//InstallEfiPeiTransferControl ( +// IN OUT EFI_PEI_TRANSFER_CONTROL_PROTOCOL **This +// ); + +//EFI_STATUS +//InstallEfiPeiFlushInstructionCache ( +// IN OUT EFI_PEI_FLUSH_INSTRUCTION_CACHE_PROTOCOL **This +// ); + +EFI_STATUS +EFIAPI +PreparePpisNeededByDxeCore ( + IN HOB_TEMPLATE *HobStart + ) +/*++ + +Routine Description: + + This routine adds the PPI/Protocol Hobs that are consumed by the DXE Core. + Normally these come from PEI, but since our PEI was 32-bit we need an + alternate source. That is this driver. + + This driver does not consume PEI or DXE services and thus updates the + Phit (HOB list) directly + +Arguments: + + HobStart - Pointer to the beginning of the HOB List from PEI + +Returns: + + This function should after it has add it's HOBs + +--*/ +; + +#endif diff --git a/DuetPkg/DxeIpl/SerialStatusCode.c b/DuetPkg/DxeIpl/SerialStatusCode.c new file mode 100644 index 0000000000..20a11d2c54 --- /dev/null +++ b/DuetPkg/DxeIpl/SerialStatusCode.c @@ -0,0 +1,885 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + SerialStatusCode.c + +Abstract: + +Revision History: + +--*/ + +#include "SerialStatusCode.h" + + +UINT16 gComBase = 0x3f8; +UINTN gBps = 115200; +UINT8 gData = 8; +UINT8 gStop = 1; +UINT8 gParity = 0; +UINT8 gBreakSet = 0; + +// +// All of the lookup tables are only needed in debug. +// + +typedef struct { + UINT32 Value; + CHAR8 *Token; +} STATUS_CODE_LOOKUP_TABLE; + +STATUS_CODE_LOOKUP_TABLE mSeverityToken[] = { + { EFI_ERROR_MINOR, "ERROR_MINOR" }, + { EFI_ERROR_MAJOR, "ERROR_MAJOR" }, + { EFI_ERROR_UNRECOVERED, "ERROR_UNRECOVERED" }, + { EFI_ERROR_UNCONTAINED, "ERROR_UNCONTAINED" }, + { 0xFFFFFFFF, "ERROR_UNRECOGNIZED" } + }; + +STATUS_CODE_LOOKUP_TABLE mClassSubClassToken[] = { + { EFI_COMPUTING_UNIT_UNSPECIFIED, "COMPUTING_UNIT_UNSPECIFIED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR, "COMPUTING_UNIT_HOST_PROCESSOR" }, + { EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR, "COMPUTING_UNIT_FIRMWARE_PROCESSOR" }, + { EFI_COMPUTING_UNIT_IO_PROCESSOR, "COMPUTING_UNIT_IO_PROCESSOR" }, + { EFI_COMPUTING_UNIT_CACHE, "COMPUTING_UNIT_CACHE" }, + { EFI_COMPUTING_UNIT_MEMORY, "COMPUTING_UNIT_MEMORY" }, + { EFI_COMPUTING_UNIT_CHIPSET, "COMPUTING_UNIT_CHIPSET" }, + { EFI_PERIPHERAL_UNSPECIFIED, "PERIPHERAL_UNSPECIFIED" }, + { EFI_PERIPHERAL_KEYBOARD, "PERIPHERAL_KEYBOARD" }, + { EFI_PERIPHERAL_MOUSE, "PERIPHERAL_MOUSE" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE, "PERIPHERAL_LOCAL_CONSOLE" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE, "PERIPHERAL_REMOTE_CONSOLE" }, + { EFI_PERIPHERAL_SERIAL_PORT, "PERIPHERAL_SERIAL_PORT" }, + { EFI_PERIPHERAL_PARALLEL_PORT, "PERIPHERAL_PARALLEL_PORT" }, + { EFI_PERIPHERAL_FIXED_MEDIA, "PERIPHERAL_FIXED_MEDIA" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA, "PERIPHERAL_REMOVABLE_MEDIA" }, + { EFI_PERIPHERAL_AUDIO_INPUT, "PERIPHERAL_AUDIO_INPUT" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT, "PERIPHERAL_AUDIO_OUTPUT" }, + { EFI_PERIPHERAL_LCD_DEVICE, "PERIPHERAL_LCD_DEVICE" }, + { EFI_IO_BUS_UNSPECIFIED, "IO_BUS_UNSPECIFIED" }, + { EFI_IO_BUS_PCI, "IO_BUS_PCI" }, + { EFI_IO_BUS_USB, "IO_BUS_USB" }, + { EFI_IO_BUS_IBA, "IO_BUS_IBA" }, + { EFI_IO_BUS_AGP, "IO_BUS_AGP" }, + { EFI_IO_BUS_PC_CARD, "IO_BUS_PC_CARD" }, + { EFI_IO_BUS_LPC, "IO_BUS_LPC" }, + { EFI_IO_BUS_SCSI, "IO_BUS_SCSI" }, + { EFI_IO_BUS_ATA_ATAPI, "IO_BUS_ATA_ATAPI" }, + { EFI_IO_BUS_FC, "IO_BUS_FC" }, + { EFI_IO_BUS_IP_NETWORK, "IO_BUS_IP_NETWORK" }, + { EFI_IO_BUS_SMBUS, "IO_BUS_SMBUS" }, + { EFI_IO_BUS_I2C, "IO_BUS_I2C" }, + { EFI_SOFTWARE_UNSPECIFIED, "SOFTWARE_UNSPECIFIED" }, + { EFI_SOFTWARE_SEC, "SOFTWARE_SEC" }, + { EFI_SOFTWARE_PEI_CORE, "SOFTWARE_PEI_CORE" }, + { EFI_SOFTWARE_PEI_MODULE, "SOFTWARE_PEI_MODULE" }, + { EFI_SOFTWARE_DXE_CORE, "SOFTWARE_DXE_CORE" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE, "SOFTWARE_EFI_BOOT_SERVICE" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE, "SOFTWARE_EFI_RUNTIME_SERVICE" }, + { EFI_SOFTWARE_DXE_BS_DRIVER, "SOFTWARE_DXE_BS_DRIVER" }, + { EFI_SOFTWARE_DXE_RT_DRIVER, "SOFTWARE_DXE_RT_DRIVER" }, + { EFI_SOFTWARE_SMM_DRIVER, "SOFTWARE_SMM_DRIVER" }, + { EFI_SOFTWARE_RT, "SOFTWARE_EFI_RT" }, + { EFI_SOFTWARE_AL, "SOFTWARE_EFI_AL" }, + { EFI_SOFTWARE_EFI_APPLICATION, "SOFTWARE_EFI_APPLICATION" }, + { EFI_SOFTWARE_EFI_OS_LOADER, "SOFTWARE_EFI_OS_LOADER" }, + { 0xFFFFFFFF, "ERROR_UNRECOGNIZED" } + }; + +STATUS_CODE_LOOKUP_TABLE mOperationToken[] = { + { EFI_COMPUTING_UNIT_UNSPECIFIED | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_UNSPECIFIED | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_UNSPECIFIED | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_UNSPECIFIED | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_UNSPECIFIED | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INVALID_TYPE, "INVALID_TYPE" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INVALID_SPEED, "INVALID_SPEED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_MISMATCH, "MISMATCH" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_TIMER_EXPIRED, "TIMER_EXPIRED" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST, "SELF_TEST" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INTERNAL, "INTERNAL" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_THERMAL, "THERMAL" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_LOW_VOLTAGE, "LOW_VOLTAGE" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_HIGH_VOLTAGE, "HIGH_VOLTAGE" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_CACHE, "CACHE" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_MICROCODE_UPDATE, "MICROCODE_UPDATE" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_NO_MICROCODE_UPDATE, "NO_MICROCODE_UPDATE" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_CORRECTABLE, "1XECC" }, + { EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_UNCORRECTABLE, "2XECC" }, + { EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_COMPUTING_UNIT_IO_PROCESSOR | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_IO_PROCESSOR | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_IO_PROCESSOR | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_IO_PROCESSOR | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_IO_PROCESSOR | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_CACHE_EC_INVALID_TYPE, "INVALID_TYPE" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_CACHE_EC_INVALID_SPEED, "INVALID_SPEED" }, + { EFI_COMPUTING_UNIT_CACHE | EFI_CU_CACHE_EC_INVALID_SIZE, "INVALID_SIZE" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_TYPE, "INVALID_TYPE" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_SPEED, "INVALID_SPEED" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_CORRECTABLE, "1XECC" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_UNCORRECTABLE, "2XECC" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_SPD_FAIL, "SPD_FAIL" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_SIZE, "INVALID_SIZE" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_MISMATCH, "MISMATCH" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_S3_RESUME_FAIL, "S3_RESUME_FAIL" }, + { EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_UPDATE_FAIL, "UPDATE_FAIL" }, + { EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_EC_DISABLED, "DISABLED" }, + { EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_UNSPECIFIED | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_EC_LOCKED, "LOCKED" }, + { EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_EC_STUCK_KEY, "STUCK_KEY" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_MOUSE | EFI_P_MOUSE_EC_LOCKED, "LOCKED" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_REMOTE_CONSOLE | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_SERIAL_PORT | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_PARALLEL_PORT | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_AUDIO_INPUT | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_AUDIO_OUTPUT | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_DISABLED, "DISABLED" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_INPUT_ERROR, "INPUT_ERROR" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_OUTPUT_ERROR, "OUTPUT_ERROR" }, + { EFI_PERIPHERAL_LCD_DEVICE | EFI_P_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_UNSPECIFIED | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_PCI | EFI_IOB_PCI_EC_PERR, "PERR" }, + { EFI_IO_BUS_PCI | EFI_IOB_PCI_EC_SERR, "SERR" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_USB | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_IBA | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_AGP | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_PC_CARD | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_LPC | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_SCSI | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_FC | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_IP_NETWORK | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_SMBUS | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_DISABLED, "DISABLED" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_NOT_SUPPORTED, "NOT_SUPPORTED" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_NOT_DETECTED, "NOT_DETECTED" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_NOT_CONFIGURED, "NOT_CONFIGURED" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_INTERFACE_ERROR, "INTERFACE_ERROR" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_CONTROLLER_ERROR, "CONTROLLER_ERROR" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_READ_ERROR, "READ_ERROR" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_WRITE_ERROR, "WRITE_ERROR" }, + { EFI_IO_BUS_I2C | EFI_IOB_EC_RESOURCE_CONFLICT, "RESOURCE_CONFLICT" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_SEC | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_PEI_CORE | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_PEI_MODULE | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_DXE_CORE | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_DXE_RT_DRIVER | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_SMM_DRIVER | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_RT | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_AL | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_EFI_APPLICATION | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_NON_SPECIFIC, "NON_SPECIFIC" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_LOAD_ERROR, "LOAD_ERROR" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_INVALID_PARAMETER, "INVALID_PARAMETER" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_UNSUPPORTED, "NOT_SUPPORTED" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_INVALID_BUFFER, "INVALID_BUFFER" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_OUT_OF_RESOURCES, "OUT_OF_RESOURCES" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_ABORTED, "ABORTED" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, "ILLEGAL_SOFTWARE_STATE" }, + { EFI_SOFTWARE_EFI_OS_LOADER | EFI_SW_EC_ILLEGAL_HARDWARE_STATE, "ILLEGAL_HARDWARE_STATE" }, + { 0xFFFFFFFF, "ERROR_UNRECOGNIZED" } + }; + + +// +// Private function declarations +// +UINT8 +CpuIoRead8 ( + UINT16 Port + ); + +VOID +CpuIoWrite8 ( + UINT16 Port, + UINT32 Data + ); + + +EFI_STATUS +MatchString ( + IN STATUS_CODE_LOOKUP_TABLE *Table, + IN UINT32 Value, + OUT CHAR8 **Token + ); + +// +// Function implemenations +// + +// +// Match is only needed for debug. +// + +EFI_STATUS +MatchString ( + IN STATUS_CODE_LOOKUP_TABLE *Table, + IN UINT32 Value, + OUT CHAR8 **Token + ) +/*++ + +Routine Description: + + Search the input table for a matching value and return the token associated + with that value. Well formed tables will have the last value == 0 and will + return a default token. + +Arguments: + + Table Pointer to first entry in an array of table entries. + Value Value to look up. + Token String to return. + +Returns: + + EFI_SUCCESS The function always returns success. + +--*/ +{ + UINTN Current; + + Current = 0; + *Token = 0; + + while (!*Token) { + // + // Found token if values match or current entry is the last entry. + // + if ((Table[Current].Value == (-1)) || + (Table[Current].Value == Value)) { + *Token = Table[Current].Token; + } + Current++; + } + return EFI_SUCCESS; +} + + + +VOID +DebugSerialWrite ( + IN UINT8 Character + ) +/*++ + +Routine Description: + + DebugSerialWrite - Outputs a character to the Serial port + + Repeatedly polls the TXRDY bit of the Line Status Register + until the Transmitter Holding Register is empty. The character + is then written to the Serial port. + +Arguments: + + Character - Character to write + +Returns: + + None + +--*/ +{ + UINT8 Data; + + // + // Wait for the serail port to be ready. + // + do { + Data = CpuIoRead8 (gComBase + LSR_OFFSET); + } while ((Data & LSR_TXRDY) == 0); + + CpuIoWrite8 (gComBase, Character); +} + +VOID +DebugSerialPrint ( + IN UINT8 *OutputString + ) +/*++ + +Routine Description: + + Prints a string to the Serial port + +Arguments: + + OutputString - Ascii string to print to serial port. + +Returns: + + None + +--*/ +{ + EFI_STATUS Status; + + Status = EFI_SUCCESS; + + for ( ; *OutputString != 0; OutputString++) { + DebugSerialWrite (*OutputString); + } +} + +EFI_STATUS +EFIAPI +SerialReportStatusCode ( + IN EFI_STATUS_CODE_TYPE CodeType, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN EFI_GUID *CallerId, + IN EFI_STATUS_CODE_DATA *Data OPTIONAL + ) +/*++ + +Routine Description: + + Provide a serial port print + +Arguments: + + PeiServices - General purpose services available to every PEIM. + +Returns: + + Status - EFI_SUCCESS if the interface could be successfully + installed + +--*/ +{ + CHAR8 Buffer[EFI_STATUS_CODE_DATA_MAX_SIZE]; + UINT32 LineNumber; + CHAR8 *Filename; + CHAR8 *Description; + CHAR8 *Format; + VA_LIST Marker; + UINT32 ErrorLevel; + UINTN CharCount; + + Buffer[0] = '\0'; + + if (ReportStatusCodeExtractAssertInfo (CodeType, Value, Data, &Filename, &Description, &LineNumber)) { + // + // Processes PEI_ASSERT () + // + AsciiSPrint ( + Buffer, + EFI_STATUS_CODE_DATA_MAX_SIZE, + "\nPEI_ASSERT!: %a (%d): %a\n", + Filename, + LineNumber, + Description + ); + + } else if (ReportStatusCodeExtractDebugInfo (Data, &ErrorLevel, &Marker, &Format)) { + // + // Process PEI_DEBUG () macro to Serial + // + AsciiVSPrint (Buffer, EFI_STATUS_CODE_DATA_MAX_SIZE, Format, Marker); + + } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) { + // + // Process Errors + // + CharCount = AsciiSPrint (Buffer, EFI_STATUS_CODE_DATA_MAX_SIZE, "ERROR: C%x:V%x I%x", CodeType, Value, Instance); + // + // Make sure we don't try to print values that weren't intended to be printed, especially NULL GUID pointers. + // + if (CallerId) { + CharCount += AsciiSPrint (&Buffer[CharCount - 1], (EFI_STATUS_CODE_DATA_MAX_SIZE - (sizeof(Buffer[0]) * CharCount)), " %g", CallerId); + } + if (Data) { + CharCount += AsciiSPrint (&Buffer[CharCount - 1], (EFI_STATUS_CODE_DATA_MAX_SIZE - (sizeof(Buffer[0]) * CharCount)), " %x", Data); + } + CharCount += AsciiSPrint (&Buffer[CharCount - 1], (EFI_STATUS_CODE_DATA_MAX_SIZE - (sizeof(Buffer[0]) * CharCount)), "\n"); + + } + + if (Buffer[0] != '\0') { + // + // Callout to platform Lib function to do print. + // + DebugSerialPrint (Buffer); + } + + // + // Debug code to display human readable code information. + // + { + CHAR8 *SeverityToken; + CHAR8 *SubClassToken; + CHAR8 *OperationToken; + + if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) { + // + // Get the severity token + // + MatchString ( + mSeverityToken, + (CodeType & EFI_STATUS_CODE_SEVERITY_MASK), + &SeverityToken + ); + + // + // Get the Class/SubClass token + // + MatchString ( + mClassSubClassToken, + (Value & (EFI_STATUS_CODE_CLASS_MASK | EFI_STATUS_CODE_SUBCLASS_MASK)), + &SubClassToken + ); + + // + // Get the operation token + // + MatchString ( + mOperationToken, + (Value & (EFI_STATUS_CODE_CLASS_MASK | EFI_STATUS_CODE_SUBCLASS_MASK | EFI_STATUS_CODE_OPERATION_MASK)), + &OperationToken + ); + + // + // Concatenate the instance + // + AsciiSPrint ( + Buffer, + EFI_STATUS_CODE_DATA_MAX_SIZE, + "%a:%a:%a:%d\n", + SeverityToken, + SubClassToken, + OperationToken, + Instance + ); + + DebugSerialPrint (Buffer); + } + } + + return EFI_SUCCESS; +} + + +VOID +InstallSerialStatusCode ( + IN EFI_REPORT_STATUS_CODE *ReportStatusCode + ) +/*++ + +Routine Description: + + Initialize Serial Port + + The Baud Rate Divisor registers are programmed and the LCR + is used to configure the communications format. Hard coded + UART config comes from globals in DebugSerialPlatform lib. + +Arguments: + + None + +Returns: + + None + +--*/ +{ + UINTN Divisor; + UINT8 OutputData; + UINT8 Data; + + // + // Some init is done by the platform status code initialization. + // + + // + // Map 5..8 to 0..3 + // + Data = (UINT8) (gData - (UINT8)5); + + // + // Calculate divisor for baud generator + // + Divisor = 115200 / gBps; + + // + // Set communications format + // + OutputData = (UINT8)((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data)))); + CpuIoWrite8 (gComBase + LCR_OFFSET, OutputData); + + // + // Configure baud rate + // + CpuIoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8)(Divisor >> 8)); + CpuIoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8)(Divisor & 0xff)); + + // + // Switch back to bank 0 + // + OutputData = (UINT8)((~DLAB<<7)|((gBreakSet<<6)|((gParity<<3)|((gStop<<2)| Data)))); + CpuIoWrite8 (gComBase + LCR_OFFSET, OutputData); + + *ReportStatusCode = SerialReportStatusCode; +} diff --git a/DuetPkg/DxeIpl/SerialStatusCode.h b/DuetPkg/DxeIpl/SerialStatusCode.h new file mode 100644 index 0000000000..f2e91903bd --- /dev/null +++ b/DuetPkg/DxeIpl/SerialStatusCode.h @@ -0,0 +1,83 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + SerialStatusCode.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _DXELDR_SERIAL_STATUS_CODE_H_ +#define _DXELDR_SERIAL_STATUS_CODE_H_ + +// +// Statements that include other files +// +#include "DxeIpl.h" + +// +// GUID consumed +// + + +//--------------------------------------------- +// UART Register Offsets +//--------------------------------------------- +#define BAUD_LOW_OFFSET 0x00 +#define BAUD_HIGH_OFFSET 0x01 +#define IER_OFFSET 0x01 +#define LCR_SHADOW_OFFSET 0x01 +#define FCR_SHADOW_OFFSET 0x02 +#define IR_CONTROL_OFFSET 0x02 +#define FCR_OFFSET 0x02 +#define EIR_OFFSET 0x02 +#define BSR_OFFSET 0x03 +#define LCR_OFFSET 0x03 +#define MCR_OFFSET 0x04 +#define LSR_OFFSET 0x05 +#define MSR_OFFSET 0x06 + +//--------------------------------------------- +// UART Register Bit Defines +//--------------------------------------------- +#define LSR_TXRDY 0x20 +#define LSR_RXDA 0x01 +#define DLAB 0x01 + +// +// Globals for Serial Port settings +// +extern UINT16 gComBase; +extern UINTN gBps; +extern UINT8 gData; +extern UINT8 gStop; +extern UINT8 gParity; +extern UINT8 gBreakSet; + +VOID +DebugSerialPrint ( + IN UINT8 *OutputString + ); + +VOID +DebugSerialWrite ( + IN UINT8 Character + ); + +VOID +InstallSerialStatusCode ( + IN EFI_REPORT_STATUS_CODE *ReportStatusCode + ); + +#endif diff --git a/DuetPkg/DxeIpl/X64/CpuIoAccess.asm b/DuetPkg/DxeIpl/X64/CpuIoAccess.asm new file mode 100644 index 0000000000..f1515e8c84 --- /dev/null +++ b/DuetPkg/DxeIpl/X64/CpuIoAccess.asm @@ -0,0 +1,52 @@ + title CpuIoAccess.asm +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2007, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; CpuIoAccess.asm +; +; Abstract: +; CPU IO Abstraction +; +;------------------------------------------------------------------------------ + + +.code + +;------------------------------------------------------------------------------ +; UINT8 +; CpuIoRead8 ( +; UINT16 Port // rcx +; ) +;------------------------------------------------------------------------------ +CpuIoRead8 PROC PUBLIC + xor eax, eax + mov dx, cx + in al, dx + ret +CpuIoRead8 ENDP + +;------------------------------------------------------------------------------ +; VOID +; CpuIoWrite8 ( +; UINT16 Port, // rcx +; UINT32 Data // rdx +; ) +;------------------------------------------------------------------------------ +CpuIoWrite8 PROC PUBLIC + mov eax, edx + mov dx, cx + out dx, al + ret +CpuIoWrite8 ENDP + + +END diff --git a/DuetPkg/DxeIpl/X64/EnterDxeCore.asm b/DuetPkg/DxeIpl/X64/EnterDxeCore.asm new file mode 100644 index 0000000000..a1eada3905 --- /dev/null +++ b/DuetPkg/DxeIpl/X64/EnterDxeCore.asm @@ -0,0 +1,45 @@ + TITLE EnterDxeCore.asm: Assembly code for the entering DxeCore +;------------------------------------------------------------------------------ +;* +;* Copyright 2006, Intel Corporation +;* All rights reserved. This program and the accompanying materials +;* are licensed and made available under the terms and conditions of the BSD License +;* which accompanies this distribution. The full text of the license may be found at +;* http://opensource.org/licenses/bsd-license.php +;* +;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +;* +;* EnterDxeCore.asm +;* +;* Abstract: +;* +;------------------------------------------------------------------------------ + +.code + +; +; VOID +; EnterDxeMain ( +; IN VOID *StackTop, // rcx +; IN VOID *DxeCoreEntryPoint, // rdx +; IN VOID *Hob, // r8 +; IN VOID *PageTable // r9 +; ) +; +EnterDxeMain PROC + + mov cr3, r9 + sub rcx, 32 + mov rsp, rcx + mov rcx, r8 + push 0 + jmp rdx + +; should never get here + jmp $ + ret + +EnterDxeMain ENDP + +END diff --git a/DuetPkg/DxeIpl/X64/Paging.c b/DuetPkg/DxeIpl/X64/Paging.c new file mode 100644 index 0000000000..0377b6a39b --- /dev/null +++ b/DuetPkg/DxeIpl/X64/Paging.c @@ -0,0 +1,238 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + Paging.c + +Abstract: + +Revision History: + +--*/ + +#include "HobGeneration.h" +#include "VirtualMemory.h" + +// +// Create 2M-page table +// PML4 (47:39) +// PDPTE (38:30) +// PDE (29:21) +// + +#define EFI_2M_PAGE_BITS_NUM 21 +#define EFI_MAX_ENTRY_BITS_NUM 9 + +#define EFI_PAGE_SIZE_4K 0x1000 +#define EFI_PAGE_SIZE_2M (1 << EFI_2M_PAGE_BITS_NUM) + +#ifndef MIN + #define MIN(a, b) ((a) < (b) ? (a) : (b)) +#endif +#define ENTRY_NUM(x) ((UINTN)1 << (x)) + +UINT8 gPML4BitsNum; +UINT8 gPDPTEBitsNum; +UINT8 gPDEBitsNum; + +UINTN gPageNum2M; +UINTN gPageNum4K; + +VOID +EnableNullPointerProtection ( + UINT8 *PageTable + ) +{ + X64_PAGE_TABLE_ENTRY_4K *PageTableEntry4KB; + + PageTableEntry4KB = (X64_PAGE_TABLE_ENTRY_4K *) (PageTable + gPageNum2M * EFI_PAGE_SIZE_4K); + // + // Fill in the Page Table entries + // Mark 0~4K as not present + // + PageTableEntry4KB->Bits.Present = 0; + + return ; +} + +VOID +X64Create4KPageTables ( + UINT8 *PageTable + ) +/*++ +Routine Description: + Create 4K-Page-Table for the low 2M memory. + This will change the previously created 2M-Page-Table-Entry. +--*/ +{ + UINT64 PageAddress; + UINTN PTEIndex; + X64_PAGE_DIRECTORY_ENTRY_4K *PageDirectoryEntry4KB; + X64_PAGE_TABLE_ENTRY_4K *PageTableEntry4KB; + + // + // Page Table structure 4 level 4K. + // + // PageMapLevel4Entry : bits 47-39 + // PageDirectoryPointerEntry : bits 38-30 + // Page Table 4K : PageDirectoryEntry4K : bits 29-21 + // PageTableEntry : bits 20-12 + // + + PageTableEntry4KB = (X64_PAGE_TABLE_ENTRY_4K *)(PageTable + gPageNum2M * EFI_PAGE_SIZE_4K); + + PageDirectoryEntry4KB = (X64_PAGE_DIRECTORY_ENTRY_4K *) (PageTable + 2 * EFI_PAGE_SIZE_4K); + PageDirectoryEntry4KB->Uint64 = (UINT64)(UINTN)PageTableEntry4KB; + PageDirectoryEntry4KB->Bits.ReadWrite = 1; + PageDirectoryEntry4KB->Bits.Present = 1; + PageDirectoryEntry4KB->Bits.MustBeZero = 0; + + for (PTEIndex = 0, PageAddress = 0; + PTEIndex < ENTRY_NUM (EFI_MAX_ENTRY_BITS_NUM); + PTEIndex++, PageTableEntry4KB++, PageAddress += EFI_PAGE_SIZE_4K + ) { + // + // Fill in the Page Table entries + // + PageTableEntry4KB->Uint64 = (UINT64)PageAddress; + PageTableEntry4KB->Bits.ReadWrite = 1; + PageTableEntry4KB->Bits.Present = 1; + } + + return ; +} + +VOID +X64Create2MPageTables ( + UINT8 *PageTable + ) +{ + UINT64 PageAddress; + UINT8 *TempPageTable; + UINTN PML4Index; + UINTN PDPTEIndex; + UINTN PDEIndex; + X64_PAGE_MAP_AND_DIRECTORY_POINTER_2MB_4K *PageMapLevel4Entry; + X64_PAGE_MAP_AND_DIRECTORY_POINTER_2MB_4K *PageDirectoryPointerEntry; + X64_PAGE_TABLE_ENTRY_2M *PageDirectoryEntry2MB; + + TempPageTable = PageTable; + PageAddress = 0; + + // + // Page Table structure 3 level 2MB. + // + // PageMapLevel4Entry : bits 47-39 + // PageDirectoryPointerEntry : bits 38-30 + // Page Table 2MB : PageDirectoryEntry2M : bits 29-21 + // + + PageMapLevel4Entry = (X64_PAGE_MAP_AND_DIRECTORY_POINTER_2MB_4K *)TempPageTable; + + for (PML4Index = 0; PML4Index < ENTRY_NUM (gPML4BitsNum); PML4Index++, PageMapLevel4Entry++) { + // + // Each PML4 entry points to a page of Page Directory Pointer entires. + // + TempPageTable += EFI_PAGE_SIZE_4K; + PageDirectoryPointerEntry = (X64_PAGE_MAP_AND_DIRECTORY_POINTER_2MB_4K *)TempPageTable; + + // + // Make a PML4 Entry + // + PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)(TempPageTable); + PageMapLevel4Entry->Bits.ReadWrite = 1; + PageMapLevel4Entry->Bits.Present = 1; + + for (PDPTEIndex = 0; PDPTEIndex < ENTRY_NUM (gPDPTEBitsNum); PDPTEIndex++, PageDirectoryPointerEntry++) { + // + // Each Directory Pointer entries points to a page of Page Directory entires. + // + TempPageTable += EFI_PAGE_SIZE_4K; + PageDirectoryEntry2MB = (X64_PAGE_TABLE_ENTRY_2M *)TempPageTable; + + // + // Fill in a Page Directory Pointer Entries + // + PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)(TempPageTable); + PageDirectoryPointerEntry->Bits.ReadWrite = 1; + PageDirectoryPointerEntry->Bits.Present = 1; + + for (PDEIndex = 0; PDEIndex < ENTRY_NUM (gPDEBitsNum); PDEIndex++, PageDirectoryEntry2MB++) { + // + // Fill in the Page Directory entries + // + PageDirectoryEntry2MB->Uint64 = (UINT64)PageAddress; + PageDirectoryEntry2MB->Bits.ReadWrite = 1; + PageDirectoryEntry2MB->Bits.Present = 1; + PageDirectoryEntry2MB->Bits.MustBe1 = 1; + + PageAddress += EFI_PAGE_SIZE_2M; + } + } + } + + return ; +} + +VOID * +PreparePageTable ( + VOID *PageNumberTop, + UINT8 SizeOfMemorySpace + ) +/*++ +Description: + Generate pagetable below PageNumberTop, + and return the bottom address of pagetable for putting other things later. +--*/ +{ + VOID *PageNumberBase; + + SizeOfMemorySpace -= EFI_2M_PAGE_BITS_NUM; + gPDEBitsNum = MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM); + SizeOfMemorySpace = SizeOfMemorySpace - gPDEBitsNum; + gPDPTEBitsNum = MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM); + SizeOfMemorySpace = SizeOfMemorySpace - gPDPTEBitsNum; + gPML4BitsNum = SizeOfMemorySpace; + if (gPML4BitsNum > EFI_MAX_ENTRY_BITS_NUM) { + return NULL; + } + + // + // Suppose we have: + // 2MPage: + // Entry: PML4 -> PDPTE -> PDE -> Page + // EntryNum: a b c + // then + // Occupy4KPage: 1 a a*b + // + // 2M 4KPage: + // Entry: PTE -> Page + // EntryNum: 512 + // then + // Occupy4KPage: 1 + // + + gPageNum2M = 1 + ENTRY_NUM (gPML4BitsNum) + ENTRY_NUM (gPML4BitsNum + gPDPTEBitsNum); + gPageNum4K = 1; + + + PageNumberBase = (VOID *)((UINTN)PageNumberTop - (gPageNum2M + gPageNum4K) * EFI_PAGE_SIZE_4K); + ZeroMem (PageNumberBase, (gPageNum2M + gPageNum4K) * EFI_PAGE_SIZE_4K); + + X64Create2MPageTables (PageNumberBase); + X64Create4KPageTables (PageNumberBase); + // + // Not enable NULL Pointer Protection if using INTx call + // +// EnableNullPointerProtection (PageNumberBase); + + return PageNumberBase; +} diff --git a/DuetPkg/DxeIpl/X64/VirtualMemory.h b/DuetPkg/DxeIpl/X64/VirtualMemory.h new file mode 100644 index 0000000000..6077de513f --- /dev/null +++ b/DuetPkg/DxeIpl/X64/VirtualMemory.h @@ -0,0 +1,117 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + VirtualMemory.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _VIRTUAL_MEMORY_H_ +#define _VIRTUAL_MEMORY_H_ + +#pragma pack(1) + +// +// Page Map Level 4 Offset (PML4) and +// Page Directory Pointer Table (PDPE) entries 4K & 2M +// + +typedef union { + struct { + UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Reserved:1; // Reserved + UINT64 MustBeZero:2; // Must Be Zero + UINT64 Available:3; // Available for use by system software + UINT64 PageTableBaseAddress:40; // Page Table Base Address + UINT64 AvabilableHigh:11; // Available for use by system software + UINT64 Nx:1; // No Execute bit + } Bits; + UINT64 Uint64; +} X64_PAGE_MAP_AND_DIRECTORY_POINTER_2MB_4K; + +// +// Page Directory Entry 4K +// +typedef union { + struct { + UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 MustBeZero:3; // Must Be Zero + UINT64 Available:3; // Available for use by system software + UINT64 PageTableBaseAddress:40; // Page Table Base Address + UINT64 AvabilableHigh:11; // Available for use by system software + UINT64 Nx:1; // No Execute bit + } Bits; + UINT64 Uint64; +} X64_PAGE_DIRECTORY_ENTRY_4K; + +// +// Page Table Entry 4K +// +typedef union { + struct { + UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page + UINT64 PAT:1; // 0 = Ignore Page Attribute Table + UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write + UINT64 Available:3; // Available for use by system software + UINT64 PageTableBaseAddress:40; // Page Table Base Address + UINT64 AvabilableHigh:11; // Available for use by system software + UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution + } Bits; + UINT64 Uint64; +} X64_PAGE_TABLE_ENTRY_4K; + +// +// Page Table Entry 2M +// +typedef union { + struct { + UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory + UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write + UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User + UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching + UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached + UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) + UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page + UINT64 MustBe1:1; // Must be 1 + UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write + UINT64 Available:3; // Available for use by system software + UINT64 PAT:1; // + UINT64 MustBeZero:8; // Must be zero; + UINT64 PageTableBaseAddress:31; // Page Table Base Address + UINT64 AvabilableHigh:11; // Available for use by system software + UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution + } Bits; + UINT64 Uint64; +} X64_PAGE_TABLE_ENTRY_2M; + +#pragma pack() + +#endif diff --git a/DuetPkg/Include/CpuIA32.h b/DuetPkg/Include/CpuIA32.h new file mode 100644 index 0000000000..912d128f63 --- /dev/null +++ b/DuetPkg/Include/CpuIA32.h @@ -0,0 +1,187 @@ +/*++ + +Copyright (c) 2006, Intel Corporation. All rights reserved. +This software and associated documentation (if any) is furnished +under a license and may only be used or copied in accordance +with the terms of the license. Except as permitted by such +license, no part of this software or documentation may be +reproduced, stored in a retrieval system, or transmitted in any +form or by any means without the express written consent of +Intel Corporation. + +Module Name: + + CpuIA32.h + +Abstract: + + Basic Definition for IA32 Architecture. + +--*/ + +#ifndef _CPU_IA32_H_ +#define _CPU_IA32_H_ + +typedef struct { + UINT32 RegEax; + UINT32 RegEbx; + UINT32 RegEcx; + UINT32 RegEdx; +} EFI_CPUID_REGISTER; + +#pragma pack(1) +// +// Definition for IA32 microcode format +// +typedef struct { + UINT32 HeaderVersion; + UINT32 UpdateRevision; + UINT32 Date; + UINT32 ProcessorId; + UINT32 Checksum; + UINT32 LoaderRevision; + UINT32 ProcessorFlags; + UINT32 DataSize; + UINT32 TotalSize; + UINT8 Reserved[12]; +} EFI_CPU_MICROCODE_HEADER; + +typedef struct { + UINT32 ExtendedSignatureCount; + UINT32 ExtendedTableChecksum; + UINT8 Reserved[12]; +} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER; + +typedef struct { + UINT32 ProcessorSignature; + UINT32 ProcessorFlag; + UINT32 ProcessorChecksum; +} EFI_CPU_MICROCODE_EXTENDED_TABLE; + +// +// The MS compiler doesn't handle QWORDs very well. So break +// them into DWORDs to circumvent the problem. +// +typedef union _MSR_REGISTER { + UINT64 Qword; + + struct _DWORDS { + UINT32 Low; + UINT32 High; + } Dwords; + + struct _BYTES { + UINT8 FirstByte; + UINT8 SecondByte; + UINT8 ThirdByte; + UINT8 FouthByte; + UINT8 FifthByte; + UINT8 SixthByte; + UINT8 SeventhByte; + UINT8 EighthByte; + } Bytes; + +} MSR_REGISTER; + +#pragma pack() + +// +// Definition for CPUID Index +// +#define EFI_CPUID_SIGNATURE 0x0 +#define EFI_CPUID_VERSION_INFO 0x1 +#define EFI_CPUID_CACHE_INFO 0x2 +#define EFI_CPUID_SERIAL_NUMBER 0x3 +#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000 +#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001 +#define EFI_CPUID_BRAND_STRING1 0x80000002 +#define EFI_CPUID_BRAND_STRING2 0x80000003 +#define EFI_CPUID_BRAND_STRING3 0x80000004 +#define EFI_CPUID_ADDRESS_SIZE 0x80000008 + +// +// Definition for MSR address +// +#define EFI_MSR_IA32_PLATFORM_ID 0x17 +#define EFI_MSR_IA32_APIC_BASE 0x1B +#define EFI_MSR_EBC_HARD_POWERON 0x2A +#define EFI_MSR_EBC_SOFT_POWERON 0x2B +#define EFI_MSR_EBC_FREQUENCY_ID 0x2C +#define MSR_IA32_FEATURE_CONTROL 0x3A +#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79 +#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B +#define EFI_MSR_PSB_CLOCK_STATUS 0xCD +#define MSR_EXT_CONFIG 0xEE +#define EFI_IA32_MCG_CAP 0x179 +#define EFI_IA32_MCG_CTL 0x17B + +#define EFI_MSR_IA32_PERF_STS 0x198 +#define EFI_MSR_IA32_PERF_CTL 0x199 +#define EFI_MSR_IA32_CLOCK_MODULATION 0x19A +#define MSR_IA32_THERMAL_INTERRUPT 0x19B +#define EFI_MSR_IA32_THERM_STATUS 0x19C +#define EFI_MSR_GV_THERM 0x19D +#define MSR_IA32_MISC_ENABLE 0x1A0 +#define MSR_PIC_SENS_CFG 0x1AA + +#define EFI_IA32_MC0_CTL 0x400 +#define EFI_IA32_MC0_STATUS 0x401 +#define MSR_PECI_CONTROL 0x5A0 + +// +// Definition for MTRR address and related values +// +#define EFI_IA32_MTRR_FIX64K_00000 0x250 +#define EFI_IA32_MTRR_FIX16K_80000 0x258 +#define EFI_IA32_MTRR_FIX16K_A0000 0x259 +#define EFI_IA32_MTRR_FIX4K_C0000 0x268 +#define EFI_IA32_MTRR_FIX4K_C8000 0x269 +#define EFI_IA32_MTRR_FIX4K_D0000 0x26A +#define EFI_IA32_MTRR_FIX4K_D8000 0x26B +#define EFI_IA32_MTRR_FIX4K_E0000 0x26C +#define EFI_IA32_MTRR_FIX4K_E8000 0x26D +#define EFI_IA32_MTRR_FIX4K_F0000 0x26E +#define EFI_IA32_MTRR_FIX4K_F8000 0x26F +#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200 +#define EFI_CACHE_VARIABLE_MTRR_END 0x20F +#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF + +#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000 +#define EFI_MSR_VALID_MASK 0xFFFFFFFFF +#define EFI_CACHE_MTRR_VALID 0x800 +#define EFI_CACHE_FIXED_MTRR_VALID 0x400 + +#define EFI_CACHE_UNCACHEABLE 0 +#define EFI_CACHE_WRITECOMBINING 1 +#define EFI_CACHE_WRITETHROUGH 4 +#define EFI_CACHE_WRITEPROTECTED 5 +#define EFI_CACHE_WRITEBACK 6 + +// +// Definition for Local APIC registers and related values +// +#define LOCAL_APIC_LVT_TIMER 0x320 +#define LOCAL_APIC_TIMER_INIT_COUNT 0x380 +#define LOCAL_APIC_TIMER_COUNT 0x390 +#define LOCAL_APIC_TIMER_DIVIDE 0x3E0 + + +#define DELIVERY_MODE_FIXED 0x0 +#define DELIVERY_MODE_LOWEST_PRIORITY 0x1 +#define DELIVERY_MODE_SMI 0x2 +#define DELIVERY_MODE_REMOTE_READ 0x3 +#define DELIVERY_MODE_NMI 0x4 +#define DELIVERY_MODE_INIT 0x5 +#define DELIVERY_MODE_SIPI 0x6 + +#define TRIGGER_MODE_EDGE 0x0 +#define TRIGGER_MODE_LEVEL 0x1 + +// +// CPU System Memory Map Definition +// +#define CPU_MSI_MEMORY_BASE 0xFEE00000 +#define CPU_MSI_MEMORY_SIZE 0x100000 + + +#endif diff --git a/DuetPkg/Include/EfiFlashMap.h b/DuetPkg/Include/EfiFlashMap.h new file mode 100644 index 0000000000..8aa1b98314 --- /dev/null +++ b/DuetPkg/Include/EfiFlashMap.h @@ -0,0 +1,127 @@ +/*++ + +Copyright (c) 2004 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + EfiFlashMap.h + +Abstract: + + Defines for the EFI Flash Map functionality + +--*/ + +#ifndef _EFI_FLASHMAP_H_ +#define _EFI_FLASHMAP_H_ + + +// +// Definition for flash map GUIDed HOBs +// +typedef UINT32 EFI_FLASH_AREA_ATTRIBUTES; + +#define EFI_FLASH_AREA_FV 0x0001 +#define EFI_FLASH_AREA_SUBFV 0x0002 +#define EFI_FLASH_AREA_MEMMAPPED_FV 0x0004 +#define EFI_FLASH_AREA_REQUIRED 0x0008 +#define EFI_FLASH_AREA_CORRUPT 0x0010 + +typedef UINT8 EFI_FLASH_AREA_TYPE; + +#define EFI_FLASH_AREA_RECOVERY_BIOS 0x0 // Recovery code +#define EFI_FLASH_AREA_MAIN_BIOS 0x1 // Regular BIOS code +#define EFI_FLASH_AREA_PAL_B 0x2 // PAL-B +#define EFI_FLASH_AREA_RESERVED_03 0x3 // Reserved for backwards compatibility +#define EFI_FLASH_AREA_RESERVED_04 0x4 // Reserved for backwards compatibility +#define EFI_FLASH_AREA_DMI_FRU 0x5 // DMI FRU information +#define EFI_FLASH_AREA_OEM_BINARY 0x6 // OEM Binary Code/data +#define EFI_FLASH_AREA_RESERVED_07 0x7 // Reserved for backwards compatibility +#define EFI_FLASH_AREA_RESERVED_08 0x8 // Reserved for backwards compatibility +#define EFI_FLASH_AREA_RESERVED_09 0x9 // Reserved for backwards compatibility +#define EFI_FLASH_AREA_RESERVED_0A 0x0a // Reserved for backwards compatibility +#define EFI_FLASH_AREA_EFI_VARIABLES 0x0b // EFI variables +#define EFI_FLASH_AREA_MCA_LOG 0x0c // MCA error log +#define EFI_FLASH_AREA_SMBIOS_LOG 0x0d // SMBIOS error log +#define EFI_FLASH_AREA_FTW_BACKUP 0x0e // A backup block during FTW operations +#define EFI_FLASH_AREA_FTW_STATE 0x0f // State information during FTW operations +#define EFI_FLASH_AREA_UNUSED 0x0fd // Not used +#define EFI_FLASH_AREA_GUID_DEFINED 0x0fe // Usage defined by a GUID +#pragma pack(1) +// +// An individual sub-area Entry. +// A single flash area may consist of more than one sub-area. +// +typedef struct { + EFI_FLASH_AREA_ATTRIBUTES Attributes; + UINT32 Reserved; + EFI_PHYSICAL_ADDRESS Base; + EFI_PHYSICAL_ADDRESS Length; + EFI_GUID FileSystem; +} EFI_FLASH_SUBAREA_ENTRY; + +typedef struct { + UINT8 Reserved[3]; + EFI_FLASH_AREA_TYPE AreaType; + EFI_GUID AreaTypeGuid; + UINT32 NumEntries; + EFI_FLASH_SUBAREA_ENTRY Entries[1]; +} EFI_FLASH_MAP_ENTRY_DATA; + +typedef struct { + UINT8 Reserved[3]; + EFI_FLASH_AREA_TYPE AreaType; + EFI_GUID AreaTypeGuid; + UINT32 NumberOfEntries; + EFI_FLASH_SUBAREA_ENTRY Entries[1]; + // + // Extended Hob data. + // + // VolumeId and FilePath indicating a unique file. + // + UINT32 VolumeId; + CHAR16 FilePath[256]; + UINT32 ActuralSize; + UINT32 Offset; +} EFI_FLASH_MAP_FS_ENTRY_DATA; + +typedef struct { + EFI_HOB_GENERIC_HEADER Header; + EFI_GUID Name; + UINT8 Reserved[3]; + EFI_FLASH_AREA_TYPE AreaType; + EFI_GUID AreaTypeGuid; + UINT32 NumEntries; + EFI_FLASH_SUBAREA_ENTRY Entries[1]; +} EFI_HOB_FLASH_MAP_ENTRY_TYPE; + +// +// Internal definitions +// +typedef struct { + UINT8 Reserved[3]; + EFI_FLASH_AREA_TYPE AreaType; + EFI_GUID AreaTypeGuid; + UINT32 NumberOfEntries; + EFI_FLASH_SUBAREA_ENTRY SubAreaData; +} EFI_FLASH_AREA_HOB_DATA; + +typedef struct { + UINTN Base; + UINTN Length; + EFI_FLASH_AREA_ATTRIBUTES Attributes; + EFI_FLASH_AREA_TYPE AreaType; + UINT8 Reserved[3]; + EFI_GUID AreaTypeGuid; +} EFI_FLASH_AREA_DATA; + +#pragma pack() + +#endif // #ifndef _EFI_FLASHMAP_H_ diff --git a/DuetPkg/Include/EfiLdrHandoff.h b/DuetPkg/Include/EfiLdrHandoff.h new file mode 100644 index 0000000000..69fcd54d4d --- /dev/null +++ b/DuetPkg/Include/EfiLdrHandoff.h @@ -0,0 +1,59 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + EfiLdrHandoff.h + +Abstract: + +Revision History: + +--*/ + +#ifndef _EFILDR_HANDOFF_H_ +#define _EFILDR_HANDOFF_H_ + +#include +#include + +#define EFILDR_BASE_SEGMENT 0x2000 +#define EFILDR_LOAD_ADDRESS (EFILDR_BASE_SEGMENT << 4) +#define EFILDR_HEADER_ADDRESS (EFILDR_LOAD_ADDRESS+0x2000) + +#define EFILDR_CB_VA 0x00 + +typedef struct _EFILDRHANDOFF { + UINTN MemDescCount; + EFI_MEMORY_DESCRIPTOR *MemDesc; + VOID *BfvBase; + UINTN BfvSize; + VOID *DxeIplImageBase; + UINTN DxeIplImageSize; + VOID *DxeCoreImageBase; + UINTN DxeCoreImageSize; + VOID *DxeCoreEntryPoint; +} EFILDRHANDOFF; + +typedef struct { + UINT32 CheckSum; + UINT32 Offset; + UINT32 Length; + UINT8 FileName[52]; +} EFILDR_IMAGE; + +typedef struct { + UINT32 Signature; + UINT32 HeaderCheckSum; + UINT32 FileLength; + UINT32 NumberOfImages; +} EFILDR_HEADER; + +#endif diff --git a/DuetPkg/Include/FlashLayout.h b/DuetPkg/Include/FlashLayout.h new file mode 100644 index 0000000000..38a3fe4613 --- /dev/null +++ b/DuetPkg/Include/FlashLayout.h @@ -0,0 +1,44 @@ +/*++ + +Copyright (c) 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + FlashLayout.h + +Abstract: + + Platform specific flash layout + +--*/ + +#ifndef _EFI_FLASH_LAYOUT +#define _EFI_FLASH_LAYOUT + +#include "EfiFlashMap.h" + +// +// Firmware Volume Information for DUET +// +#define FV_BLOCK_SIZE 0x10000 +#define FV_BLOCK_MASK 0x0FFFF +#define EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH (sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY)) + +#define NV_STORAGE_SIZE 0x4000 +#define NV_STORAGE_FVB_SIZE ((NV_STORAGE_SIZE + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH + FV_BLOCK_MASK) & ~FV_BLOCK_MASK) +#define NV_STORAGE_FVB_BLOCK_NUM (NV_STORAGE_FVB_SIZE / FV_BLOCK_SIZE) + +#define NV_FTW_WORKING_SIZE 0x2000 +#define NV_FTW_SPARE_SIZE 0x10000 +#define NV_FTW_FVB_SIZE ((NV_FTW_WORKING_SIZE + NV_FTW_SPARE_SIZE + EFI_RUNTIME_UPDATABLE_FV_HEADER_LENGTH + FV_BLOCK_MASK) & ~FV_BLOCK_MASK) +#define NV_FTW_FVB_BLOCK_NUM (NV_FTW_FVB_SIZE / FV_BLOCK_SIZE) + +#define NV_STORAGE_FILE_PATH L"\\Efivar.bin" +#endif // _EFI_FLASH_LAYOUT diff --git a/DuetPkg/Include/Guid/AcpiDescription.h b/DuetPkg/Include/Guid/AcpiDescription.h new file mode 100644 index 0000000000..43adf0191b --- /dev/null +++ b/DuetPkg/Include/Guid/AcpiDescription.h @@ -0,0 +1,127 @@ +/*++ + +Copyright (c) 2006 - 2007, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + AcpiDescription.h + +Abstract: + + + GUIDs used for ACPI Description + +--*/ + +#ifndef _EFI_ACPI_DESCRIPTION_H_ +#define _EFI_ACPI_DESCRIPTION_H_ + +#define EFI_ACPI_DESCRIPTION_GUID \ + { \ + 0x3c699197, 0x93c, 0x4c69, 0xb0, 0x6b, 0x12, 0x8a, 0xe3, 0x48, 0x1d, 0xc9 \ + } + +typedef struct { + UINT8 AddressSpaceId; + UINT8 RegisterBitWidth; + UINT8 RegisterBitOffset; + UINT8 AccessSize; + UINT64 Address; +} EFI_ACPI_GENERIC_ADDRESS_STRUCTURE; + +#define ACPI_ADDRESS_ID_MEMORY 0 +#define ACPI_ADDRESS_ID_IO 1 +#define ACPI_ADDRESS_ID_PCI 2 +#define ACPI_ADDRESS_ID_EC 3 +#define ACPI_ADDRESS_ID_SMBUS 4 + +#define ACPI_ADDRESS_ACCESS_ANY 0 +#define ACPI_ADDRESS_ACCESS_BYTE 1 +#define ACPI_ADDRESS_ACCESS_WORD 2 +#define ACPI_ADDRESS_ACCESS_DWORD 3 +#define ACPI_ADDRESS_ACCESS_QWORD 4 + +// +// Following structure defines ACPI Description information. +// This information is platform specific, may be consumed by DXE generic driver. +// +#pragma pack(1) +typedef struct _EFI_ACPI_DESCRIPTION { + // + // For Timer + // + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE PM_TMR_BLK; + UINT8 PM_TMR_LEN; + UINT8 TMR_VAL_EXT; + + // + // For RTC + // + UINT8 DAY_ALRM; + UINT8 MON_ALRM; + UINT8 CENTURY; + + // + // For Reset + // + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE RESET_REG; + UINT8 RESET_VALUE; + + // + // For Shutdown + // + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE PM1a_EVT_BLK; + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE PM1b_EVT_BLK; + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE PM1a_CNT_BLK; + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE PM1b_CNT_BLK; + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE PM2_CNT_BLK; + UINT8 PM1_EVT_LEN; + UINT8 PM1_CNT_LEN; + UINT8 PM2_CNT_LEN; + UINT8 SLP_TYPa; + UINT8 SLP_TYPb; + + // + // For sleep + // + UINT8 SLP1_TYPa; + UINT8 SLP1_TYPb; + UINT8 SLP2_TYPa; + UINT8 SLP2_TYPb; + UINT8 SLP3_TYPa; + UINT8 SLP3_TYPb; + UINT8 SLP4_TYPa; + UINT8 SLP4_TYPb; + + // + // GPE + // + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE GPE0_BLK; + EFI_ACPI_GENERIC_ADDRESS_STRUCTURE GPE1_BLK; + UINT8 GPE0_BLK_LEN; + UINT8 GPE1_BLK_LEN; + UINT8 GPE1_BASE; + + // + // IAPC Boot Arch + // + UINT16 IAPC_BOOT_ARCH; + + // + // Flags + // + UINT32 Flags; + +} EFI_ACPI_DESCRIPTION; +#pragma pack() + +extern EFI_GUID gEfiAcpiDescriptionGuid; + +#endif diff --git a/DuetPkg/Include/Guid/FlashMapHob.h b/DuetPkg/Include/Guid/FlashMapHob.h new file mode 100644 index 0000000000..1676df2a5e --- /dev/null +++ b/DuetPkg/Include/Guid/FlashMapHob.h @@ -0,0 +1,33 @@ +/*++ + +Copyright (c) 2004, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + FlashMapHob.h + +Abstract: + + GUID used for Flash Map HOB entries in the HOB list. + +--*/ + +#ifndef _FLASH_MAP_HOB_GUID_H_ +#define _FLASH_MAP_HOB_GUID_H_ + +// +// Definitions for Flash Map +// +#define EFI_FLASH_MAP_HOB_GUID \ + { 0xb091e7d2, 0x5a0, 0x4198, 0x94, 0xf0, 0x74, 0xb7, 0xb8, 0xc5, 0x54, 0x59 } + +extern EFI_GUID gEfiFlashMapHobGuid; + +#endif // _FLASH_MAP_HOB_GUID_H_ diff --git a/DuetPkg/Include/Guid/PciExpressBaseAddress.h b/DuetPkg/Include/Guid/PciExpressBaseAddress.h new file mode 100644 index 0000000000..0625b3e147 --- /dev/null +++ b/DuetPkg/Include/Guid/PciExpressBaseAddress.h @@ -0,0 +1,46 @@ +/*++ + +Copyright (c) 2006, Intel Corporation +All rights reserved. This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +Module Name: + + PciExpressBaseAddress.h + +Abstract: + + + GUIDs used for PciExpress Base Address + +--*/ + +#ifndef _EFI_PCI_EXPRESS_BASE_ADDRESS_H_ +#define _EFI_PCI_EXPRESS_BASE_ADDRESS_H_ + +#define EFI_PCI_EXPRESS_BASE_ADDRESS_GUID \ + { \ + 0x3677d529, 0x326f, 0x4603, 0xa9, 0x26, 0xea, 0xac, 0xe0, 0x1d, 0xcb, 0xb0 \ + } + +// +// Following structure defines PCI Express Base Address information. +// This information is platform specific, and built into hob in PEI phase. +// It can be consumed by PEI PCI driver and DXE PCI driver. +// +#pragma pack(1) +typedef struct _EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION { + UINT32 HostBridgeNumber; + UINT32 RootBridgeNumber; + UINT64 PciExpressBaseAddress; +} EFI_PCI_EXPRESS_BASE_ADDRESS_INFORMATION; +#pragma pack() + +extern EFI_GUID gEfiPciExpressBaseAddressGuid; + +#endif -- 2.30.2