From e700a1fc9158cd8f956bd9d2a1867f47ee6591cc Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Fri, 4 Jul 2014 11:16:48 +0000 Subject: [PATCH] ArmPkg/ArmGic: Introduced helper functions to access the GIC controller Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15621 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Drivers/ArmGic/ArmGicDxe.c | 76 ++++++------------- ArmPkg/Include/Library/ArmGicLib.h | 45 +++++++++-- .../Library/ArmVExpressSecLibRTSM/RTSMSec.c | 6 +- 3 files changed, 66 insertions(+), 61 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.c b/ArmPkg/Drivers/ArmGic/ArmGicDxe.c index 9608c314ed..c360d113be 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicDxe.c @@ -2,19 +2,19 @@ Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.
+Portions copyright (c) 2011-2014, ARM Ltd. All rights reserved.
-This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. Module Name: - Gic.c + ArmGicDxe.c Abstract: @@ -111,21 +111,13 @@ EnableInterruptSource ( IN HARDWARE_INTERRUPT_SOURCE Source ) { - UINT32 RegOffset; - UINTN RegShift; - if (Source > mGicNumInterrupts) { ASSERT(FALSE); return EFI_UNSUPPORTED; } - - // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; - // Write set-enable register - MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDISER + (4*RegOffset), 1 << RegShift); - + ArmGicEnableInterrupt (FixedPcdGet32 (PcdGicDistributorBase), Source); + return EFI_SUCCESS; } @@ -146,21 +138,13 @@ DisableInterruptSource ( IN HARDWARE_INTERRUPT_SOURCE Source ) { - UINT32 RegOffset; - UINTN RegShift; - if (Source > mGicNumInterrupts) { ASSERT(FALSE); return EFI_UNSUPPORTED; } - - // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; - // Write set-enable register - MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDICER + (4*RegOffset), 1 << RegShift); - + ArmGicDisableInterrupt (PcdGet32(PcdGicDistributorBase), Source); + return EFI_SUCCESS; } @@ -183,24 +167,13 @@ GetInterruptSourceState ( IN BOOLEAN *InterruptState ) { - UINT32 RegOffset; - UINTN RegShift; - if (Source > mGicNumInterrupts) { ASSERT(FALSE); return EFI_UNSUPPORTED; } - - // calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; - - if ((MmioRead32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDISER + (4*RegOffset)) & (1<InstallMultipleProtocolInterfaces ( &gHardwareInterruptHandle, &gHardwareInterruptProtocolGuid, &gHardwareInterruptProtocol, NULL ); ASSERT_EFI_ERROR (Status); - + // // Get the CPU protocol that this driver requires. // diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h index af8941905b..24f1966b56 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2013, ARM Limited. All rights reserved. +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -57,7 +57,7 @@ #define ARM_GIC_ICCRPR 0x14 // Running Priority Register #define ARM_GIC_ICCPIR 0x18 // Highest Pending Interrupt Register #define ARM_GIC_ICCABPR 0x1C // Aliased Binary Point Register -#define ARM_GIC_ICCIDR 0xFC // Identification Register +#define ARM_GIC_ICCIIDR 0xFC // Identification Register #define ARM_GIC_ICDSGIR_FILTER_TARGETLIST 0x0 #define ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE 0x1 @@ -71,14 +71,20 @@ #define ARM_GIC_ICCICR_USE_SBPR 0x10 // Bit Mask for GICC_IIDR -#define ARM_GIC_ICCIDR_GET_PRODUCT_ID(IccIdr) (((IccIdr) >> 20) & 0xFFF) -#define ARM_GIC_ICCIDR_GET_ARCH_VERSION(IccIdr) (((IccIdr) >> 16) & 0xF) -#define ARM_GIC_ICCIDR_GET_REVISION(IccIdr) (((IccIdr) >> 12) & 0xF) -#define ARM_GIC_ICCIDR_GET_IMPLEMENTER(IccIdr) ((IccIdr) & 0xFFF) +#define ARM_GIC_ICCIIDR_GET_PRODUCT_ID(IccIidr) (((IccIidr) >> 20) & 0xFFF) +#define ARM_GIC_ICCIIDR_GET_ARCH_VERSION(IccIidr) (((IccIidr) >> 16) & 0xF) +#define ARM_GIC_ICCIIDR_GET_REVISION(IccIidr) (((IccIidr) >> 12) & 0xF) +#define ARM_GIC_ICCIIDR_GET_IMPLEMENTER(IccIidr) ((IccIidr) & 0xFFF) // Bit Mask for #define ARM_GIC_ICCIAR_ACKINTID 0x3FF +UINTN +EFIAPI +ArmGicGetInterfaceIdentification ( + IN INTN GicInterruptInterfaceBase + ); + // // GIC Secure interfaces // @@ -116,6 +122,12 @@ ArmGicEnableDistributor ( IN INTN GicDistributorBase ); +VOID +EFIAPI +ArmGicDisableDistributor ( + IN INTN GicDistributorBase + ); + UINTN EFIAPI ArmGicGetMaxNumInterrupts ( @@ -151,4 +163,25 @@ ArmGicSetPriorityMask ( IN INTN PriorityMask ); +VOID +EFIAPI +ArmGicEnableInterrupt ( + IN UINTN GicDistributorBase, + IN UINTN Source + ); + +VOID +EFIAPI +ArmGicDisableInterrupt ( + IN UINTN GicDistributorBase, + IN UINTN Source + ); + +BOOLEAN +EFIAPI +ArmGicIsInterruptEnabled ( + IN UINTN GicDistributorBase, + IN UINTN Source + ); + #endif diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c index 4c018f7672..f5176eac90 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2013, ARM Limited. All rights reserved. +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -73,10 +73,10 @@ ArmPlatformSecInitialize ( MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK); // Read the GIC Identification Register - Identification = MmioRead32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCIDR); + Identification = ArmGicGetInterfaceIdentification (PcdGet32 (PcdGicInterruptInterfaceBase)); // Check if we are GICv3 - if (ARM_GIC_ICCIDR_GET_ARCH_VERSION(Identification) >= 0x3) { + if (ARM_GIC_ICCIIDR_GET_ARCH_VERSION(Identification) >= 0x3) { InitializeGicV3 (); } -- 2.39.2