From eae7b476c2151141a43cc89d9629c47757f024f1 Mon Sep 17 00:00:00 2001 From: Jian J Wang Date: Wed, 17 Oct 2018 12:49:57 +0800 Subject: [PATCH] UefiCpuPkg/CpuExceptionHandlerLib: always clear descriptor data in advance REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1237 Sometimes the memory will be contaminated by random data left in last boot (warm reset). The code should not assume the allocated memory is always filled with zero. This patch add code to clear data structure used for stack switch to prevent such problem from happening. Cc: Eric Dong Cc: Laszlo Ersek Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang Reviewed-by: Eric Dong Reviewed-by: Laszlo Ersek Reviewed-by: Ruiyu Ni --- .../Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 3 +++ .../Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c index 031d0d35fa..4a61b61f0a 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -214,6 +214,7 @@ ArchSetupExcpetionStack ( // TssBase = (UINTN)Tss; + TssDesc->Uint64 = 0; TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1; TssDesc->Bits.BaseLow = (UINT16)TssBase; TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16); @@ -238,6 +239,7 @@ ArchSetupExcpetionStack ( // TssBase = (UINTN)Tss; + TssDesc->Uint64 = 0; TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1; TssDesc->Bits.BaseLow = (UINT16)TssBase; TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16); @@ -255,6 +257,7 @@ ArchSetupExcpetionStack ( continue; } + ZeroMem (Tss, sizeof (*Tss)); Tss->EIP = (UINT32)(TemplateMap.ExceptionStart + Vector * TemplateMap.ExceptionStubHeaderSize); Tss->EFLAGS = 0x2; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c index 93ecf5ae5a..5dc628149e 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c @@ -219,6 +219,8 @@ ArchSetupExcpetionStack ( // TssBase = (UINTN)Tss; + TssDesc->Uint128.Uint64 = 0; + TssDesc->Uint128.Uint64_1= 0; TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1; TssDesc->Bits.BaseLow = (UINT16)TssBase; TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16); @@ -231,6 +233,7 @@ ArchSetupExcpetionStack ( // // Fixup exception task descriptor and task-state segment // + ZeroMem (Tss, sizeof (*Tss)); StackTop = StackSwitchData->X64.KnownGoodStackTop - CPU_STACK_ALIGNMENT; StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT); IdtTable = StackSwitchData->X64.IdtTable; -- 2.39.2