From fa7fadf78e064d1d73d21d0487e2a31a394a88ae Mon Sep 17 00:00:00 2001
From: Star Zeng <star.zeng@intel.com>
Date: Fri, 22 Aug 2014 01:23:28 +0000
Subject: [PATCH] IntelFspPkg BaseCacheLib: State CacheAsRamLib in its inf,
 because it consumes DisableCacheAsRam() that is the interface of
 CacheAsRamLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15877 6f19259b-4bc3-4df7-8a09-765794883524
---
 IntelFspPkg/Library/BaseCacheLib/BaseCacheLib.inf | 1 +
 1 file changed, 1 insertion(+)

diff --git a/IntelFspPkg/Library/BaseCacheLib/BaseCacheLib.inf b/IntelFspPkg/Library/BaseCacheLib/BaseCacheLib.inf
index d76a32bc4f..fb8d5f6083 100644
--- a/IntelFspPkg/Library/BaseCacheLib/BaseCacheLib.inf
+++ b/IntelFspPkg/Library/BaseCacheLib/BaseCacheLib.inf
@@ -29,4 +29,5 @@
 
 [LibraryClasses]
   BaseMemoryLib
+  CacheAsRamLib
 
-- 
2.39.2