KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler

BugLink: https://bugs.launchpad.net/bugs/1673564
Add a handler for reading the guest's view of the ICV_HPPIR1_EL1
register. This is a simple parsing of the available LRs, extracting the
highest available interrupt.

Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: David Daney <david.daney@cavium.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
(backported from commit 2724c11a1df4b22ee966c04809ea0e808f66b04e)
[ dannf: Drop the SYS_ prefix and move the ICV_HPPIR1_EL1 macro definition
  from asm/sysreg.h to asm/arch_gicv3.h for consistency with code
  prior to 0e9884fe ]
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 7bf1d46272bc7faaf73ff56d8997babee91b9506..0a93a4ad2e82110be3db281c334cb877ada09569 100644 (file)
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -30,7 +30,7 @@
 #define ICC_SRE_EL1                    sys_reg(3, 0, 12, 12, 5)
 #define ICC_GRPEN1_EL1                 sys_reg(3, 0, 12, 12, 7)
 #define ICC_BPR1_EL1                   sys_reg(3, 0, 12, 12, 3)
-
+#define ICC_HPPIR1_EL1                 sys_reg(3, 0, 12, 12, 2)
 #define ICC_SRE_EL2                    sys_reg(3, 4, 12, 9, 5)
 
 /*

diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
index 2fc92c1d01ae0c04aa638facf354b669a783a645..7fbbf82959c22e4d7705513d53908620f0ddb133 100644 (file)
--- a/virt/kvm/arm/hyp/vgic-v3-sr.c
+++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
@@ -839,6 +839,26 @@ static void __hyp_text __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu,
        __vgic_v3_write_apxrn(vcpu, rt, 3);
 }
 
+static void __hyp_text __vgic_v3_read_hppir(struct kvm_vcpu *vcpu,
+                                           u32 vmcr, int rt)
+{
+       u64 lr_val;
+       int lr, lr_grp, grp;
+
+       grp = __vgic_v3_get_group(vcpu);
+
+       lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);
+       if (lr == -1)
+               goto spurious;
+
+       lr_grp = !!(lr_val & ICH_LR_GROUP);
+       if (lr_grp != grp)
+               lr_val = ICC_IAR1_EL1_SPURIOUS;
+
+spurious:
+       vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);
+}
+
 int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
 {
        int rt;
@@ -903,6 +923,9 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
                else
                        fn = __vgic_v3_write_apxr3;
                break;
+       case ICC_HPPIR1_EL1:
+               fn = __vgic_v3_read_hppir;
+               break;
        default:
                return 0;
        }