Stefan Bader [Fri, 11 Aug 2017 11:07:46 +0000 (13:07 +0200)]
UBUNTU: (config) Update config for arm64 master changes
Changes to the master tree added ARCH_SUPPORTS_MEMORY_FAILURE
and CAVIUM_ERRATUM_30115 to the arm64 architecture. Following
those changes in the raspi2(/3) topic branch.
Paolo Pisati [Tue, 13 Jun 2017 10:14:00 +0000 (12:14 +0200)]
UBUNTU: skip ABI and modules checks
BugLink: https://bugs.launchpad.net/bugs/1693250 Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> Acked-by: Colin King <colin.king@canonical.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
Paolo Pisati [Tue, 13 Jun 2017 10:14:00 +0000 (12:14 +0200)]
UBUNTU: disable SND_ARMAACI, FTBFS
BugLink: https://bugs.launchpad.net/bugs/1693250 Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> Acked-by: Colin King <colin.king@canonical.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
Paolo Pisati [Tue, 13 Jun 2017 10:14:00 +0000 (12:14 +0200)]
UBUNTU: [Config] config sync wrt master
BugLink: https://bugs.launchpad.net/bugs/1693250 Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> Acked-by: Colin King <colin.king@canonical.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
Paolo Pisati [Fri, 5 May 2017 15:08:44 +0000 (17:08 +0200)]
UBUNTU: [Config] CPU_SW_DOMAIN_PAN=y, HARDENED_USERCOPY=y and SLAB_FREELIST_RANDOM=y
Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com> Acked-by: Colin Ian King <colin.king@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Also improve code style and adhere to ALSA coding conventions.
Signed-off-by: Baswaraj K <jaikumar@cem-solutions.net> Reviewed-by: Vijay Kumar B. <vijaykumar@zilogic.com> Reviewed-by: Raashid Muhammed <raashidmuhammed@zilogic.com> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Raashid Muhammed [Mon, 27 Mar 2017 07:05:00 +0000 (12:35 +0530)]
Add support for Allo Piano DAC 2.1 plus add-on board for Raspberry Pi.
The Piano DAC 2.1 has support for 4 channels with subwoofer.
Signed-off-by: Baswaraj K <jaikumar@cem-solutions.net> Reviewed-by: Vijay Kumar B. <vijaykumar@zilogic.com> Reviewed-by: Raashid Muhammed <raashidmuhammed@zilogic.com> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
This patch adds new sample rates to the Audioinjector Octo sound card. The
new supported rates are (in kHz) :
96, 48, 32, 24, 16, 8, 88.2, 44.1, 29.4, 22.05, 14.7
Reference the bcm270x DT regulators in the overlay.
This patch adds a reset GPIO for the AudioInjector.net octo sound card.
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Tue, 28 Mar 2017 16:41:30 +0000 (17:41 +0100)]
leds-gpio: Remove stray assignment to brightness_set
The brightness_set method is intended for use cases that must not
block, and can only be used if the GPIO provider can never sleep.
Remove an accidental initialisation (a copy-and-paste error) that
sets it regardless, which has been seen to cause crashes with the
gpio expander driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Tue, 28 Mar 2017 13:22:20 +0000 (14:22 +0100)]
BCM270X_DT: Allow multiple instances of w1-gpio overlays
Upcoming firmware will modify the address portion of node names when
their "reg" property is written by a dtparam. Modify the w1-gpio
overlays to write the gpiopin parameter value to "reg" properties, so
that multiple instances can be loaded simultaneously.
Note: The value of the "address" is unimportant - the w1 subsystem
assigns instance numbers to buses sequentially from 1, and it is
not necessary to know which bus a device is on in order to find it.
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Thu, 23 Mar 2017 16:34:46 +0000 (16:34 +0000)]
bcm2835-aux: Add aux interrupt controller
The AUX block has a shared interrupt line with a register indicating
which devices have active IRQs. Expose this as a nested interrupt
controller to avoid sharing problems.
Phil Elwell [Thu, 23 Mar 2017 10:06:56 +0000 (10:06 +0000)]
ASoC: Add prompt for ICS43432 codec
Without a prompt string, a config setting can't be included in a
defconfig. Give CONFIG_SND_SOC_ICS43432 a prompt so that Pi soundcards
can use the driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Tue, 14 Mar 2017 14:23:06 +0000 (14:23 +0000)]
bcm2835-gpio-exp: Copy/paste error adding base twice
brcmexp_gpio_set was adding gpio->gc.base to the offset
twice, so passing an invalid number to the mailbox service.
The firmware treated it modulo-8 anyway, but was logging an
assert every time.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Tue, 7 Mar 2017 12:18:20 +0000 (12:18 +0000)]
BCM270X_DT: Invert Pi3 power LED to match fw change
Firmware expgpio driver reworked due to complaint over
hotplug detect.
Requires power LED to change sense as firmware is no longer
inverting the read value.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Mon, 13 Mar 2017 12:30:37 +0000 (12:30 +0000)]
thermal: Compatible strings for bcm2836, bcm2837
The upstream dt-bindings documentation for bcm2835-thermal (which
exists even though the driver isn't upstreamed) says to use
dedicated compatible strings on bcm2836 and bcm2837, even though
the downstream driver doesn't support them. The Pi2 DTB uses
"brcm,bcm2836-thermal", so the driver doesn't load. The Pi3 DTB
doesn't override the base value, but the arm64 Pi3 support uses "brcm,bcm2837-thermal".
Solve the documentation problem by adding "brcm,bcm2836-thermal" and
"brcm,bcm2837-thermal" as alternative compatible strings for the
bcm2835-thermal driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Mon, 6 Mar 2017 20:17:16 +0000 (12:17 -0800)]
panel-raspberrypi-touchscreen: Round up clk rate to fix DSI panel.
Commit 488f9bc8e3def93e0baef53cee2026c2cb0d8956 slightly increased the
reported rate of PLLD, so the clk driver decided that PLLD/3/8 was now
higher than our requested pixel clock rate and rejected it in favor of
PLLD/4/8, which then ran the pixel clock way out of spec.
By bumping the requested clock rate just slightly, we get back to
PLLD/3/8 like we wanted and the panel displays content again.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Michael Zoran [Fri, 24 Feb 2017 01:54:31 +0000 (17:54 -0800)]
drm/vc4: Don't wait for vblank when updating the cursor
Commonly used desktop environments such as xfce4 and gnome
on debian sid can flood the graphics drivers with cursor
updates. Because the current implementation is waiting
for a vblank between cursor updates, this will cause the
display to hang for a long time since a typical refresh
rate is only 60Hz.
This is unnecessary and unexpected by user mode software,
so simply swap out the cursor frame buffer without waiting.
Signed-off-by: Michael Zoran <mzoran@crowfest.net> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 9 Feb 2017 17:23:34 +0000 (09:23 -0800)]
drm/vc4: Fix OOPSes from trying to cache a partially constructed BO.
If a CMA allocation failed, the partially constructed BO would be
unreferenced through the normal path, and we might choose to put it in
the BO cache. If we then reused it before it expired from the cache,
the kernel would OOPS.
Signed-off-by: Eric Anholt <eric@anholt.net> Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Wed, 8 Feb 2017 23:00:54 +0000 (15:00 -0800)]
drm/vc4: Fulfill user BO creation requests from the kernel BO cache.
The from_cache flag was actually "the BO is invisible to userspace",
so we can repurpose to just zero out a cached BO and return it to
userspace.
Improves wall time for a loop of 5 glsl-algebraic-add-add-1 by
-1.44989% +/- 0.862891% (n=28, 1 outlier removed from each that
appeared to be other system noise)
Note that there's an intel-gpu-tools test to check for the proper
zeroing behavior here, which we continue to pass.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 2 Feb 2017 17:42:18 +0000 (09:42 -0800)]
drm/vc4: Fix sending of page flip completion events in FKMS mode.
In the rewrite of vc4_crtc.c for fkms, I dropped the part of the
CRTC's atomic flush handler that moved the completion event from the
proposed atomic state change to the CRTC's current state. That meant
that when full screen pageflipping happened (glxgears -fullscreen in
X, compton, por weston), the app would end up blocked firever waiting
to draw its next frame.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Boris Brezillon [Fri, 2 Dec 2016 13:48:13 +0000 (14:48 +0100)]
ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi boards
Enable the VEC IP on all RaspberryPi boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 5ab1a37c6027c114a87a1ae32cfc5ef303d643c5) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Boris Brezillon [Fri, 2 Dec 2016 13:48:12 +0000 (14:48 +0100)]
ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit b899c45208d6f204a6da9a1132577993eeecf0fb) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Wed, 10 Feb 2016 19:42:32 +0000 (11:42 -0800)]
drm/vc4: Add DSI driver
The DSI0 and DSI1 blocks on the 2835 are related hardware blocks.
Some registers move around, and the featureset is slightly different,
as DSI1 (the 4-lane DSI) is a later version of the hardware block.
This driver doesn't yet enable DSI0, since we don't have any hardware
to test against, but it does put a lot of the register definitions and
code in place.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 11 Feb 2016 00:17:29 +0000 (16:17 -0800)]
drm/vc4: Add support for feeding DSI encoders from the pixel valve.
We have to set a different pixel format, which tells the hardware to
use the pix_width field that's fed in sideband from the DSI encoder to
divide the "pixel" clock.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 15 Sep 2016 14:25:23 +0000 (15:25 +0100)]
drm/vc4: Set up SCALER_DISPCTRL at boot.
We want the HVS on, obviously, and we also want DSP3 (PV1's source) to
be muxed from HVS channel 2 like we expect in vc4_crtc.c. The
firmware wasn't setting the DSP3 mux up when both the LCD and HDMI
were disabled.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
This means that the firmware won't power on the panel at boot time (no
rainbow) and the touchscreen input won't work. The native input
driver for the touchscreen still needs to be written.
v2: Set the same default orientation as the closed source firmware
used, which is the best for viewing angle.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 17 Jan 2017 20:31:57 +0000 (07:31 +1100)]
clk: bcm2835: Add leaf clock measurement support, disabled by default
This proved incredibly useful during debugging of the DSI driver, to
see if our clocks were running at rate we requested. Let's leave it
here for the next person interacting with clocks on the platform (and
so that hopefully we can just hook it up to debugfs some day).
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 3f9195811d8d829556c4cd88d3f9e56a80d5ba60) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 17 Jan 2017 20:31:56 +0000 (07:31 +1100)]
clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
The DSI pixel clocks are muxed from clocks generated in the analog phy
by the DSI driver. In order to set them as parents, we need to do the
same name lookup dance on them as we do for our root oscillator.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 8a39e9fa578229fd4604266c6ebb1a3a77d7994c) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 17 Jan 2017 20:31:55 +0000 (07:31 +1100)]
clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.
Our core PLLs are intended to be configured once and left alone. With
the SET_RATE_PARENT, asking to set the PLLD_DSI1 clock rate would
change PLLD just to get closer to the requested DSI clock, thus
changing PLLD_PER, the UART and ethernet PHY clock rates downstream of
it, and breaking ethernet.
We *do* want PLLH to change so that PLLH_AUX can be exactly the value
we want, though. Thus, we need to have a per-divider policy of
whether to pass rate changes up.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 55486091bd1e1c5ed28c43c0d6b3392468a9adb5) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 10 May 2016 00:28:18 +0000 (17:28 -0700)]
clk: bcm2835: Mark GPIO clocks enabled at boot as critical.
These divide off of PLLD_PER and are used for the ethernet and wifi
PHYs source PLLs. Neither of them is currently represented by a phy
device that would grab the clock for us.
This keeps other drivers from killing the networking PHYs when they
disable their own clocks and trigger PLLD_PER's refcount going to 0.
v2: Skip marking as critical if they aren't on at boot.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Tue, 24 Feb 2015 13:40:50 +0000 (13:40 +0000)]
pinctrl-bcm2835: Fix interrupt handling for GPIOs 28-31 and 46-53
Contrary to the documentation, the BCM2835 GPIO controller actually has
four interrupt lines - one each for the three IRQ groups and one common. Rather
confusingly, the GPIO interrupt groups don't correspond directly with the GPIO
control banks. Instead, GPIOs 0-27 generate IRQ GPIO0, 28-45 GPIO1 and
46-53 GPIO2.
Awkwardly, the GPIOS for IRQ GPIO1 straddle two 32-entry GPIO banks, so it is
cleaner to split out a function to process the interrupts for a single GPIO
bank.
This bug has only just been observed because GPIOs above 27 can only be
accessed on an old Raspberry Pi with the optional P5 header fitted, where
the pins are often used for I2S instead.
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Fri, 10 Mar 2017 14:43:15 +0000 (14:43 +0000)]
bcm2835-v4l2: Fix buffer overflow problem
https://github.com/raspberrypi/linux/issues/1447
port_parameter_get() failed to account for the header
(u32 id and u32 size) in the size before memcpying
the response into the response buffer, so overrunning
the provided buffer by 8 bytes.
Account for those bytes, and also a belt-and-braces
check to ensure we never copy more than *value_size
bytes into value.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Tue, 7 Mar 2017 19:48:23 +0000 (19:48 +0000)]
config: Add CONFIG_CRYPTO_LZ4
Enabling this options allows LZ4 memory compression.
Fixes: https://github.com/raspberrypi/linux/issues/1875 Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Mon, 6 Mar 2017 09:06:18 +0000 (09:06 +0000)]
clk-bcm2835: Read max core clock from firmware
The VPU is responsible for managing the core clock, usually under
direction from the bcm2835-cpufreq driver but not via the clk-bcm2835
driver. Since the core frequency can change without warning, it is
safer to report the maximum clock rate to users of the core clock -
I2C, SPI and the mini UART - to err on the safe side when calculating
clock divisors.
If the DT node for the clock driver includes a reference to the
firmware node, use the firmware API to query the maximum core clock
instead of reading the divider registers.
Prior to this patch, a "100KHz" I2C bus was sometimes clocked at about
160KHz. In particular, switching to the 4.9 kernel was likely to break
SenseHAT usage on a Pi3.
Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Mon, 20 Feb 2017 17:01:21 +0000 (17:01 +0000)]
bcm2835-gpio-exp: Driver for GPIO expander via mailbox service
Pi3 and Compute Module 3 have a GPIO expander that the
VPU communicates with.
There is a mailbox service that now allows control of this
expander, so add a kernel driver that can make use of it.
Pwr_led node added to device-tree for Pi3.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Dave Stevenson [Mon, 13 Feb 2017 11:10:50 +0000 (11:10 +0000)]
BCM2835-V4L2: Ensure H264 header bytes get a sensible timestamp
H264 header come off VC with 0 timestamps, which means they get a
strange timestamp when processed with VC/kernel start times,
particularly if used with the inline header option.
Remember the last frame timestamp and use that if set, or otherwise
use the kernel start time.
https://github.com/raspberrypi/linux/issues/1836
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Phil Elwell [Wed, 1 Mar 2017 16:07:39 +0000 (16:07 +0000)]
amba_pl011: Round input clock up
The UART clock is initialised to be as close to the requested
frequency as possible without exceeding it. Now that there is a
clock manager that returns the actual frequencies, an expected
48MHz clock is reported as 47999625. If the requested baudrate
== requested clock/16, there is no headroom and the slight
reduction in actual clock rate results in failure.
Detect cases where it looks like a "round" clock was chosen and
adjust the reported clock to match that "round" value. As the
code comment says:
/*
* If increasing a clock by less than 0.1% changes it
* from ..999.. to ..000.., round up.
*/
projects / mirror_ubuntu-zesty-kernel.git / log