X-Git-Url: https://git.proxmox.com/?p=pve-kernel.git;a=blobdiff_plain;f=patches%2Fkernel%2F0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch;h=128b1aac4bd6573a4cb211463783b59f3ffe4008;hp=cf367c1ab5bc78095b6dfc182022068b6a00298a;hb=0594faab6568bb3110b82bc09edeb426ff5dd620;hpb=0a77aa18e14c9fdfc9dca4ee9e8c954cdc159954 diff --git a/patches/kernel/0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch b/patches/kernel/0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch index cf367c1..128b1aa 100644 --- a/patches/kernel/0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch +++ b/patches/kernel/0003-pci-Enable-overrides-for-missing-ACS-capabilities-4..patch @@ -55,10 +55,10 @@ Signed-off-by: Thomas Lamprecht 2 files changed, 111 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index 0a6c12e3fd4a..51e9b9efdd34 100644 +index c73168dbb050..754fa5793a4d 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -3906,6 +3906,15 @@ +@@ -3943,6 +3943,15 @@ Also, it enforces the PCI Local Bus spec rule that those bits should be 0 in system reset events (useful for kexec/kdump cases). @@ -75,7 +75,7 @@ index 0a6c12e3fd4a..51e9b9efdd34 100644 Safety option to keep boot IRQs enabled. This should never be necessary. diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c -index 993eff5d2e39..e76bfd054dba 100644 +index 1c566b0cbee9..d49c54c579bb 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -193,6 +193,106 @@ static int __init pci_apply_final_quirks(void) @@ -185,7 +185,7 @@ index 993eff5d2e39..e76bfd054dba 100644 /* * Decoding should be disabled for a PCI device during BAR sizing to avoid * conflict. But doing so may cause problems on host bridge and perhaps other -@@ -4912,6 +5012,8 @@ static const struct pci_dev_acs_enabled { +@@ -4927,6 +5027,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_CAVIUM, 0xA060, pci_quirk_mf_endpoint_acs }, /* APM X-Gene */ { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },