From: Andreas Färber Date: Thu, 17 Jan 2013 11:13:41 +0000 (+0100) Subject: cpu: Add CPUArchState pointer to CPUState X-Git-Tag: v1.5.0-rc0~672^2~7 X-Git-Url: https://git.proxmox.com/?p=qemu.git;a=commitdiff_plain;h=c05efcb18ee30cdf2b00b3512aa0f5233b52911f cpu: Add CPUArchState pointer to CPUState The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson Signed-off-by: Andreas Färber --- diff --git a/include/qom/cpu.h b/include/qom/cpu.h index c25a99780..ee1a7c878 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -71,6 +71,7 @@ struct kvm_run; * @created: Indicates whether the CPU thread has been successfully created. * @stop: Indicates a pending stop request. * @stopped: Indicates the CPU has been artificially stopped. + * @env_ptr: Pointer to subclass-specific CPUArchState field. * @current_tb: Currently executing TB. * @kvm_fd: vCPU file descriptor for KVM. * @@ -100,6 +101,7 @@ struct CPUState { bool stopped; volatile sig_atomic_t exit_request; + void *env_ptr; /* CPUArchState */ struct TranslationBlock *current_tb; int kvm_fd; diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 0cdae6986..cec998992 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -233,9 +233,11 @@ static const TypeInfo ev68_cpu_type_info = { static void alpha_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); AlphaCPU *cpu = ALPHA_CPU(obj); CPUAlphaState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); tlb_flush(env, 1); diff --git a/target-arm/cpu.c b/target-arm/cpu.c index f54d20057..5dfcb740d 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -134,9 +134,11 @@ static inline void set_feature(CPUARMState *env, int feature) static void arm_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); ARMCPU *cpu = ARM_CPU(obj); static bool inited; + cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); diff --git a/target-cris/cpu.c b/target-cris/cpu.c index 80089884e..7974be33f 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -146,11 +146,13 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp) static void cris_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); CRISCPU *cpu = CRIS_CPU(obj); CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj); CPUCRISState *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); env->pregs[PR_VR] = ccc->vr; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e2fd6268e..635f33407 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2164,6 +2164,7 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env = &cpu->env; static int inited; + cs->env_ptr = env; cpu_exec_init(env); object_property_add(obj, "family", "int", diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 5f167340e..a2badb570 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -56,10 +56,12 @@ static void lm32_cpu_realizefn(DeviceState *dev, Error **errp) static void lm32_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); LM32CPU *cpu = LM32_CPU(obj); CPULM32State *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); env->flags = 0; diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 42735dbe4..f5a109854 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -154,10 +154,12 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) static void m68k_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; static bool inited; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !inited) { diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 28b5a8878..81359db16 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -98,10 +98,12 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) static void mb_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj); CPUMBState *env = &cpu->env; static bool tcg_initialized; + cs->env_ptr = env; cpu_exec_init(env); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 09d61723c..4d62031c3 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -55,9 +55,11 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) static void mips_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); MIPSCPU *cpu = MIPS_CPU(obj); CPUMIPSState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled()) { diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index d8cc533ef..72d5e8d2a 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -75,9 +75,11 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) static void openrisc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); OpenRISCCPU *cpu = OPENRISC_CPU(obj); static int inited; + cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); #ifndef CONFIG_USER_ONLY diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5a2acaafe..5df205757 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -10529,11 +10529,13 @@ static void ppc_cpu_reset(CPUState *s) static void ppc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); PowerPCCPU *cpu = POWERPC_CPU(obj); PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; ppc_def_t *def = pcc->info; + cs->env_ptr = env; cpu_exec_init(env); env->msr_mask = def->msr_mask; diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index 787c93757..b74654724 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -110,6 +110,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) static void s390_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); S390CPU *cpu = S390_CPU(obj); CPUS390XState *env = &cpu->env; static bool inited; @@ -118,6 +119,7 @@ static void s390_cpu_initfn(Object *obj) struct tm tm; #endif + cs->env_ptr = env; cpu_exec_init(env); #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, cpu); diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index dc5d7568e..ef0e62195 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -67,9 +67,11 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp) static void superh_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); SuperHCPU *cpu = SUPERH_CPU(obj); CPUSH4State *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); env->movcal_backup_tail = &(env->movcal_backup); diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 759be532a..ef52df6d7 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -860,9 +860,11 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) static void sparc_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); SPARCCPU *cpu = SPARC_CPU(obj); CPUSPARCState *env = &cpu->env; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled()) { diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 7bcf3b365..b7024c85b 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -93,10 +93,12 @@ static void uc32_cpu_realizefn(DeviceState *dev, Error **errp) static void uc32_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); UniCore32CPU *cpu = UNICORE32_CPU(obj); CPUUniCore32State *env = &cpu->env; static bool inited; + cs->env_ptr = env; cpu_exec_init(env); #ifdef CONFIG_USER_ONLY diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 309bb169e..785e56d36 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -69,10 +69,12 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) static void xtensa_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); XtensaCPU *cpu = XTENSA_CPU(obj); CPUXtensaState *env = &cpu->env; static bool tcg_inited; + cs->env_ptr = env; cpu_exec_init(env); if (tcg_enabled() && !tcg_inited) {