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1da177e4 LT |
1 | Dynamic DMA mapping using the generic device |
2 | ============================================ | |
3 | ||
4 | James E.J. Bottomley <James.Bottomley@HansenPartnership.com> | |
5 | ||
6 | This document describes the DMA API. For a more gentle introduction | |
7 | phrased in terms of the pci_ equivalents (and actual examples) see | |
5872fb94 | 8 | Documentation/PCI/PCI-DMA-mapping.txt. |
1da177e4 LT |
9 | |
10 | This API is split into two pieces. Part I describes the API and the | |
11 | corresponding pci_ API. Part II describes the extensions to the API | |
12 | for supporting non-consistent memory machines. Unless you know that | |
13 | your driver absolutely has to support non-consistent platforms (this | |
14 | is usually only legacy platforms) you should only use the API | |
15 | described in part I. | |
16 | ||
17 | Part I - pci_ and dma_ Equivalent API | |
18 | ------------------------------------- | |
19 | ||
20 | To get the pci_ API, you must #include <linux/pci.h> | |
21 | To get the dma_ API, you must #include <linux/dma-mapping.h> | |
22 | ||
23 | ||
24 | Part Ia - Using large dma-coherent buffers | |
25 | ------------------------------------------ | |
26 | ||
27 | void * | |
28 | dma_alloc_coherent(struct device *dev, size_t size, | |
a12e2c6c | 29 | dma_addr_t *dma_handle, gfp_t flag) |
1da177e4 LT |
30 | void * |
31 | pci_alloc_consistent(struct pci_dev *dev, size_t size, | |
32 | dma_addr_t *dma_handle) | |
33 | ||
34 | Consistent memory is memory for which a write by either the device or | |
35 | the processor can immediately be read by the processor or device | |
21440d31 DB |
36 | without having to worry about caching effects. (You may however need |
37 | to make sure to flush the processor's write buffers before telling | |
38 | devices to read that memory.) | |
1da177e4 LT |
39 | |
40 | This routine allocates a region of <size> bytes of consistent memory. | |
a12e2c6c | 41 | It also returns a <dma_handle> which may be cast to an unsigned |
1da177e4 LT |
42 | integer the same width as the bus and used as the physical address |
43 | base of the region. | |
44 | ||
45 | Returns: a pointer to the allocated region (in the processor's virtual | |
46 | address space) or NULL if the allocation failed. | |
47 | ||
48 | Note: consistent memory can be expensive on some platforms, and the | |
49 | minimum allocation length may be as big as a page, so you should | |
50 | consolidate your requests for consistent memory as much as possible. | |
51 | The simplest way to do that is to use the dma_pool calls (see below). | |
52 | ||
53 | The flag parameter (dma_alloc_coherent only) allows the caller to | |
54 | specify the GFP_ flags (see kmalloc) for the allocation (the | |
a12e2c6c | 55 | implementation may choose to ignore flags that affect the location of |
1da177e4 LT |
56 | the returned memory, like GFP_DMA). For pci_alloc_consistent, you |
57 | must assume GFP_ATOMIC behaviour. | |
58 | ||
59 | void | |
a12e2c6c | 60 | dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, |
1da177e4 LT |
61 | dma_addr_t dma_handle) |
62 | void | |
a12e2c6c | 63 | pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr, |
1da177e4 LT |
64 | dma_addr_t dma_handle) |
65 | ||
66 | Free the region of consistent memory you previously allocated. dev, | |
67 | size and dma_handle must all be the same as those passed into the | |
68 | consistent allocate. cpu_addr must be the virtual address returned by | |
a12e2c6c | 69 | the consistent allocate. |
1da177e4 | 70 | |
aa24886e DB |
71 | Note that unlike their sibling allocation calls, these routines |
72 | may only be called with IRQs enabled. | |
73 | ||
1da177e4 LT |
74 | |
75 | Part Ib - Using small dma-coherent buffers | |
76 | ------------------------------------------ | |
77 | ||
78 | To get this part of the dma_ API, you must #include <linux/dmapool.h> | |
79 | ||
80 | Many drivers need lots of small dma-coherent memory regions for DMA | |
81 | descriptors or I/O buffers. Rather than allocating in units of a page | |
82 | or more using dma_alloc_coherent(), you can use DMA pools. These work | |
a12e2c6c | 83 | much like a struct kmem_cache, except that they use the dma-coherent allocator, |
1da177e4 | 84 | not __get_free_pages(). Also, they understand common hardware constraints |
a12e2c6c | 85 | for alignment, like queue heads needing to be aligned on N-byte boundaries. |
1da177e4 LT |
86 | |
87 | ||
88 | struct dma_pool * | |
89 | dma_pool_create(const char *name, struct device *dev, | |
90 | size_t size, size_t align, size_t alloc); | |
91 | ||
92 | struct pci_pool * | |
93 | pci_pool_create(const char *name, struct pci_device *dev, | |
94 | size_t size, size_t align, size_t alloc); | |
95 | ||
96 | The pool create() routines initialize a pool of dma-coherent buffers | |
97 | for use with a given device. It must be called in a context which | |
98 | can sleep. | |
99 | ||
e18b890b | 100 | The "name" is for diagnostics (like a struct kmem_cache name); dev and size |
1da177e4 LT |
101 | are like what you'd pass to dma_alloc_coherent(). The device's hardware |
102 | alignment requirement for this type of data is "align" (which is expressed | |
103 | in bytes, and must be a power of two). If your device has no boundary | |
104 | crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated | |
105 | from this pool must not cross 4KByte boundaries. | |
106 | ||
107 | ||
a12e2c6c | 108 | void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags, |
1da177e4 LT |
109 | dma_addr_t *dma_handle); |
110 | ||
a12e2c6c | 111 | void *pci_pool_alloc(struct pci_pool *pool, gfp_t gfp_flags, |
1da177e4 LT |
112 | dma_addr_t *dma_handle); |
113 | ||
114 | This allocates memory from the pool; the returned memory will meet the size | |
115 | and alignment requirements specified at creation time. Pass GFP_ATOMIC to | |
a12e2c6c | 116 | prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks), |
1da177e4 LT |
117 | pass GFP_KERNEL to allow blocking. Like dma_alloc_coherent(), this returns |
118 | two values: an address usable by the cpu, and the dma address usable by the | |
119 | pool's device. | |
120 | ||
121 | ||
122 | void dma_pool_free(struct dma_pool *pool, void *vaddr, | |
123 | dma_addr_t addr); | |
124 | ||
125 | void pci_pool_free(struct pci_pool *pool, void *vaddr, | |
126 | dma_addr_t addr); | |
127 | ||
128 | This puts memory back into the pool. The pool is what was passed to | |
a12e2c6c | 129 | the pool allocation routine; the cpu (vaddr) and dma addresses are what |
1da177e4 LT |
130 | were returned when that routine allocated the memory being freed. |
131 | ||
132 | ||
133 | void dma_pool_destroy(struct dma_pool *pool); | |
134 | ||
135 | void pci_pool_destroy(struct pci_pool *pool); | |
136 | ||
137 | The pool destroy() routines free the resources of the pool. They must be | |
138 | called in a context which can sleep. Make sure you've freed all allocated | |
139 | memory back to the pool before you destroy it. | |
140 | ||
141 | ||
142 | Part Ic - DMA addressing limitations | |
143 | ------------------------------------ | |
144 | ||
145 | int | |
146 | dma_supported(struct device *dev, u64 mask) | |
147 | int | |
02d15c43 | 148 | pci_dma_supported(struct pci_dev *hwdev, u64 mask) |
1da177e4 LT |
149 | |
150 | Checks to see if the device can support DMA to the memory described by | |
151 | mask. | |
152 | ||
153 | Returns: 1 if it can and 0 if it can't. | |
154 | ||
155 | Notes: This routine merely tests to see if the mask is possible. It | |
156 | won't change the current mask settings. It is more intended as an | |
157 | internal API for use by the platform than an external API for use by | |
158 | driver writers. | |
159 | ||
160 | int | |
161 | dma_set_mask(struct device *dev, u64 mask) | |
162 | int | |
163 | pci_set_dma_mask(struct pci_device *dev, u64 mask) | |
164 | ||
165 | Checks to see if the mask is possible and updates the device | |
166 | parameters if it is. | |
167 | ||
168 | Returns: 0 if successful and a negative error if not. | |
169 | ||
170 | u64 | |
171 | dma_get_required_mask(struct device *dev) | |
172 | ||
175add19 JK |
173 | This API returns the mask that the platform requires to |
174 | operate efficiently. Usually this means the returned mask | |
1da177e4 LT |
175 | is the minimum required to cover all of memory. Examining the |
176 | required mask gives drivers with variable descriptor sizes the | |
177 | opportunity to use smaller descriptors as necessary. | |
178 | ||
179 | Requesting the required mask does not alter the current mask. If you | |
175add19 JK |
180 | wish to take advantage of it, you should issue a dma_set_mask() |
181 | call to set the mask to the value returned. | |
1da177e4 LT |
182 | |
183 | ||
184 | Part Id - Streaming DMA mappings | |
185 | -------------------------------- | |
186 | ||
187 | dma_addr_t | |
188 | dma_map_single(struct device *dev, void *cpu_addr, size_t size, | |
189 | enum dma_data_direction direction) | |
190 | dma_addr_t | |
02d15c43 | 191 | pci_map_single(struct pci_dev *hwdev, void *cpu_addr, size_t size, |
1da177e4 LT |
192 | int direction) |
193 | ||
194 | Maps a piece of processor virtual memory so it can be accessed by the | |
195 | device and returns the physical handle of the memory. | |
196 | ||
197 | The direction for both api's may be converted freely by casting. | |
198 | However the dma_ API uses a strongly typed enumerator for its | |
199 | direction: | |
200 | ||
201 | DMA_NONE = PCI_DMA_NONE no direction (used for | |
202 | debugging) | |
203 | DMA_TO_DEVICE = PCI_DMA_TODEVICE data is going from the | |
204 | memory to the device | |
205 | DMA_FROM_DEVICE = PCI_DMA_FROMDEVICE data is coming from | |
206 | the device to the | |
207 | memory | |
208 | DMA_BIDIRECTIONAL = PCI_DMA_BIDIRECTIONAL direction isn't known | |
209 | ||
210 | Notes: Not all memory regions in a machine can be mapped by this | |
211 | API. Further, regions that appear to be physically contiguous in | |
212 | kernel virtual space may not be contiguous as physical memory. Since | |
213 | this API does not provide any scatter/gather capability, it will fail | |
a12e2c6c | 214 | if the user tries to map a non-physically contiguous piece of memory. |
1da177e4 | 215 | For this reason, it is recommended that memory mapped by this API be |
a12e2c6c | 216 | obtained only from sources which guarantee it to be physically contiguous |
1da177e4 LT |
217 | (like kmalloc). |
218 | ||
219 | Further, the physical address of the memory must be within the | |
220 | dma_mask of the device (the dma_mask represents a bit mask of the | |
a12e2c6c | 221 | addressable region for the device. I.e., if the physical address of |
1da177e4 LT |
222 | the memory anded with the dma_mask is still equal to the physical |
223 | address, then the device can perform DMA to the memory). In order to | |
224 | ensure that the memory allocated by kmalloc is within the dma_mask, | |
a12e2c6c | 225 | the driver may specify various platform-dependent flags to restrict |
1da177e4 LT |
226 | the physical memory range of the allocation (e.g. on x86, GFP_DMA |
227 | guarantees to be within the first 16Mb of available physical memory, | |
228 | as required by ISA devices). | |
229 | ||
230 | Note also that the above constraints on physical contiguity and | |
231 | dma_mask may not apply if the platform has an IOMMU (a device which | |
232 | supplies a physical to virtual mapping between the I/O memory bus and | |
233 | the device). However, to be portable, device driver writers may *not* | |
234 | assume that such an IOMMU exists. | |
235 | ||
236 | Warnings: Memory coherency operates at a granularity called the cache | |
237 | line width. In order for memory mapped by this API to operate | |
238 | correctly, the mapped region must begin exactly on a cache line | |
239 | boundary and end exactly on one (to prevent two separately mapped | |
240 | regions from sharing a single cache line). Since the cache line size | |
241 | may not be known at compile time, the API will not enforce this | |
242 | requirement. Therefore, it is recommended that driver writers who | |
243 | don't take special care to determine the cache line size at run time | |
244 | only map virtual regions that begin and end on page boundaries (which | |
245 | are guaranteed also to be cache line boundaries). | |
246 | ||
247 | DMA_TO_DEVICE synchronisation must be done after the last modification | |
248 | of the memory region by the software and before it is handed off to | |
a12e2c6c RD |
249 | the driver. Once this primitive is used, memory covered by this |
250 | primitive should be treated as read-only by the device. If the device | |
1da177e4 LT |
251 | may write to it at any point, it should be DMA_BIDIRECTIONAL (see |
252 | below). | |
253 | ||
254 | DMA_FROM_DEVICE synchronisation must be done before the driver | |
255 | accesses data that may be changed by the device. This memory should | |
a12e2c6c | 256 | be treated as read-only by the driver. If the driver needs to write |
1da177e4 LT |
257 | to it at any point, it should be DMA_BIDIRECTIONAL (see below). |
258 | ||
259 | DMA_BIDIRECTIONAL requires special handling: it means that the driver | |
260 | isn't sure if the memory was modified before being handed off to the | |
261 | device and also isn't sure if the device will also modify it. Thus, | |
262 | you must always sync bidirectional memory twice: once before the | |
263 | memory is handed off to the device (to make sure all memory changes | |
264 | are flushed from the processor) and once before the data may be | |
265 | accessed after being used by the device (to make sure any processor | |
a12e2c6c | 266 | cache lines are updated with data that the device may have changed). |
1da177e4 LT |
267 | |
268 | void | |
269 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | |
270 | enum dma_data_direction direction) | |
271 | void | |
272 | pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, | |
273 | size_t size, int direction) | |
274 | ||
275 | Unmaps the region previously mapped. All the parameters passed in | |
276 | must be identical to those passed in (and returned) by the mapping | |
277 | API. | |
278 | ||
279 | dma_addr_t | |
280 | dma_map_page(struct device *dev, struct page *page, | |
281 | unsigned long offset, size_t size, | |
282 | enum dma_data_direction direction) | |
283 | dma_addr_t | |
284 | pci_map_page(struct pci_dev *hwdev, struct page *page, | |
285 | unsigned long offset, size_t size, int direction) | |
286 | void | |
287 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | |
288 | enum dma_data_direction direction) | |
289 | void | |
290 | pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address, | |
291 | size_t size, int direction) | |
292 | ||
293 | API for mapping and unmapping for pages. All the notes and warnings | |
294 | for the other mapping APIs apply here. Also, although the <offset> | |
295 | and <size> parameters are provided to do partial page mapping, it is | |
296 | recommended that you never use these unless you really know what the | |
297 | cache width is. | |
298 | ||
299 | int | |
8d8bb39b | 300 | dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
1da177e4 LT |
301 | |
302 | int | |
8d8bb39b | 303 | pci_dma_mapping_error(struct pci_dev *hwdev, dma_addr_t dma_addr) |
1da177e4 LT |
304 | |
305 | In some circumstances dma_map_single and dma_map_page will fail to create | |
306 | a mapping. A driver can check for these errors by testing the returned | |
a12e2c6c RD |
307 | dma address with dma_mapping_error(). A non-zero return value means the mapping |
308 | could not be created and the driver should take appropriate action (e.g. | |
1da177e4 LT |
309 | reduce current DMA mapping usage or delay and try again later). |
310 | ||
21440d31 DB |
311 | int |
312 | dma_map_sg(struct device *dev, struct scatterlist *sg, | |
313 | int nents, enum dma_data_direction direction) | |
314 | int | |
315 | pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, | |
316 | int nents, int direction) | |
1da177e4 | 317 | |
a12e2c6c | 318 | Returns: the number of physical segments mapped (this may be shorter |
1d678f36 FT |
319 | than <nents> passed in if some elements of the scatter/gather list are |
320 | physically or virtually adjacent and an IOMMU maps them with a single | |
321 | entry). | |
1da177e4 LT |
322 | |
323 | Please note that the sg cannot be mapped again if it has been mapped once. | |
324 | The mapping process is allowed to destroy information in the sg. | |
325 | ||
326 | As with the other mapping interfaces, dma_map_sg can fail. When it | |
327 | does, 0 is returned and a driver must take appropriate action. It is | |
328 | critical that the driver do something, in the case of a block driver | |
329 | aborting the request or even oopsing is better than doing nothing and | |
330 | corrupting the filesystem. | |
331 | ||
21440d31 DB |
332 | With scatterlists, you use the resulting mapping like this: |
333 | ||
334 | int i, count = dma_map_sg(dev, sglist, nents, direction); | |
335 | struct scatterlist *sg; | |
336 | ||
79eb0145 | 337 | for_each_sg(sglist, sg, count, i) { |
21440d31 DB |
338 | hw_address[i] = sg_dma_address(sg); |
339 | hw_len[i] = sg_dma_len(sg); | |
340 | } | |
341 | ||
342 | where nents is the number of entries in the sglist. | |
343 | ||
344 | The implementation is free to merge several consecutive sglist entries | |
345 | into one (e.g. with an IOMMU, or if several pages just happen to be | |
346 | physically contiguous) and returns the actual number of sg entries it | |
347 | mapped them to. On failure 0, is returned. | |
348 | ||
349 | Then you should loop count times (note: this can be less than nents times) | |
350 | and use sg_dma_address() and sg_dma_len() macros where you previously | |
351 | accessed sg->address and sg->length as shown above. | |
352 | ||
353 | void | |
354 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, | |
355 | int nhwentries, enum dma_data_direction direction) | |
356 | void | |
357 | pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, | |
358 | int nents, int direction) | |
1da177e4 | 359 | |
a12e2c6c | 360 | Unmap the previously mapped scatter/gather list. All the parameters |
1da177e4 LT |
361 | must be the same as those and passed in to the scatter/gather mapping |
362 | API. | |
363 | ||
364 | Note: <nents> must be the number you passed in, *not* the number of | |
365 | physical entries returned. | |
366 | ||
9705ef7e FT |
367 | void |
368 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, | |
369 | enum dma_data_direction direction) | |
370 | void | |
371 | pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, | |
372 | size_t size, int direction) | |
373 | void | |
374 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, | |
375 | enum dma_data_direction direction) | |
376 | void | |
377 | pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, | |
378 | size_t size, int direction) | |
379 | void | |
380 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | |
381 | enum dma_data_direction direction) | |
382 | void | |
383 | pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, | |
384 | int nelems, int direction) | |
385 | void | |
386 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | |
387 | enum dma_data_direction direction) | |
388 | void | |
389 | pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, | |
390 | int nelems, int direction) | |
391 | ||
392 | Synchronise a single contiguous or scatter/gather mapping for the cpu | |
393 | and device. With the sync_sg API, all the parameters must be the same | |
394 | as those passed into the single mapping API. With the sync_single API, | |
395 | you can use dma_handle and size parameters that aren't identical to | |
396 | those passed into the single mapping API to do a partial sync. | |
397 | ||
398 | Notes: You must do this: | |
399 | ||
400 | - Before reading values that have been written by DMA from the device | |
401 | (use the DMA_FROM_DEVICE direction) | |
402 | - After writing values that will be written to the device using DMA | |
403 | (use the DMA_TO_DEVICE) direction | |
404 | - before *and* after handing memory to the device if the memory is | |
405 | DMA_BIDIRECTIONAL | |
406 | ||
407 | See also dma_map_single(). | |
408 | ||
a75b0a2f AK |
409 | dma_addr_t |
410 | dma_map_single_attrs(struct device *dev, void *cpu_addr, size_t size, | |
411 | enum dma_data_direction dir, | |
412 | struct dma_attrs *attrs) | |
413 | ||
414 | void | |
415 | dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr, | |
416 | size_t size, enum dma_data_direction dir, | |
417 | struct dma_attrs *attrs) | |
418 | ||
419 | int | |
420 | dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl, | |
421 | int nents, enum dma_data_direction dir, | |
422 | struct dma_attrs *attrs) | |
423 | ||
424 | void | |
425 | dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl, | |
426 | int nents, enum dma_data_direction dir, | |
427 | struct dma_attrs *attrs) | |
428 | ||
429 | The four functions above are just like the counterpart functions | |
430 | without the _attrs suffixes, except that they pass an optional | |
431 | struct dma_attrs*. | |
432 | ||
433 | struct dma_attrs encapsulates a set of "dma attributes". For the | |
434 | definition of struct dma_attrs see linux/dma-attrs.h. | |
435 | ||
436 | The interpretation of dma attributes is architecture-specific, and | |
437 | each attribute should be documented in Documentation/DMA-attributes.txt. | |
438 | ||
439 | If struct dma_attrs* is NULL, the semantics of each of these | |
440 | functions is identical to those of the corresponding function | |
441 | without the _attrs suffix. As a result dma_map_single_attrs() | |
442 | can generally replace dma_map_single(), etc. | |
443 | ||
444 | As an example of the use of the *_attrs functions, here's how | |
445 | you could pass an attribute DMA_ATTR_FOO when mapping memory | |
446 | for DMA: | |
447 | ||
448 | #include <linux/dma-attrs.h> | |
449 | /* DMA_ATTR_FOO should be defined in linux/dma-attrs.h and | |
450 | * documented in Documentation/DMA-attributes.txt */ | |
451 | ... | |
452 | ||
453 | DEFINE_DMA_ATTRS(attrs); | |
454 | dma_set_attr(DMA_ATTR_FOO, &attrs); | |
455 | .... | |
456 | n = dma_map_sg_attrs(dev, sg, nents, DMA_TO_DEVICE, &attr); | |
457 | .... | |
458 | ||
459 | Architectures that care about DMA_ATTR_FOO would check for its | |
460 | presence in their implementations of the mapping and unmapping | |
461 | routines, e.g.: | |
462 | ||
463 | void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr, | |
464 | size_t size, enum dma_data_direction dir, | |
465 | struct dma_attrs *attrs) | |
466 | { | |
467 | .... | |
468 | int foo = dma_get_attr(DMA_ATTR_FOO, attrs); | |
469 | .... | |
470 | if (foo) | |
471 | /* twizzle the frobnozzle */ | |
472 | .... | |
473 | ||
1da177e4 | 474 | |
0acedc12 FT |
475 | Part Ie - Optimizing Unmap State Space Consumption |
476 | -------------------------------- | |
477 | ||
478 | On some platforms, dma_unmap_{single,page}() is simply a nop. | |
479 | Therefore, keeping track of the mapping address and length is a waste | |
480 | of space. Instead of filling your drivers up with ifdefs and the like | |
481 | to "work around" this (which would defeat the whole purpose of a | |
482 | portable API) the following facilities are provided. | |
483 | ||
484 | Actually, instead of describing the macros one by one, we'll | |
485 | transform some example code. | |
486 | ||
487 | 1) Use DEFINE_DMA_UNMAP_{ADDR,LEN} in state saving structures. | |
488 | Example, before: | |
489 | ||
490 | struct ring_state { | |
491 | struct sk_buff *skb; | |
492 | dma_addr_t mapping; | |
493 | __u32 len; | |
494 | }; | |
495 | ||
496 | after: | |
497 | ||
498 | struct ring_state { | |
499 | struct sk_buff *skb; | |
500 | DEFINE_DMA_UNMAP_ADDR(mapping); | |
501 | DEFINE_DMA_UNMAP_LEN(len); | |
502 | }; | |
503 | ||
504 | 2) Use dma_unmap_{addr,len}_set to set these values. | |
505 | Example, before: | |
506 | ||
507 | ringp->mapping = FOO; | |
508 | ringp->len = BAR; | |
509 | ||
510 | after: | |
511 | ||
512 | dma_unmap_addr_set(ringp, mapping, FOO); | |
513 | dma_unmap_len_set(ringp, len, BAR); | |
514 | ||
515 | 3) Use dma_unmap_{addr,len} to access these values. | |
516 | Example, before: | |
517 | ||
518 | dma_unmap_single(dev, ringp->mapping, ringp->len, | |
519 | DMA_FROM_DEVICE); | |
520 | ||
521 | after: | |
522 | ||
523 | dma_unmap_single(dev, | |
524 | dma_unmap_addr(ringp, mapping), | |
525 | dma_unmap_len(ringp, len), | |
526 | DMA_FROM_DEVICE); | |
527 | ||
528 | It really should be self-explanatory. We treat the ADDR and LEN | |
529 | separately, because it is possible for an implementation to only | |
530 | need the address in order to perform the unmap operation. | |
531 | ||
532 | ||
1da177e4 LT |
533 | Part II - Advanced dma_ usage |
534 | ----------------------------- | |
535 | ||
536 | Warning: These pieces of the DMA API have no PCI equivalent. They | |
537 | should also not be used in the majority of cases, since they cater for | |
538 | unlikely corner cases that don't belong in usual drivers. | |
539 | ||
540 | If you don't understand how cache line coherency works between a | |
541 | processor and an I/O device, you should not be using this part of the | |
542 | API at all. | |
543 | ||
544 | void * | |
545 | dma_alloc_noncoherent(struct device *dev, size_t size, | |
a12e2c6c | 546 | dma_addr_t *dma_handle, gfp_t flag) |
1da177e4 LT |
547 | |
548 | Identical to dma_alloc_coherent() except that the platform will | |
549 | choose to return either consistent or non-consistent memory as it sees | |
550 | fit. By using this API, you are guaranteeing to the platform that you | |
551 | have all the correct and necessary sync points for this memory in the | |
552 | driver should it choose to return non-consistent memory. | |
553 | ||
554 | Note: where the platform can return consistent memory, it will | |
555 | guarantee that the sync points become nops. | |
556 | ||
557 | Warning: Handling non-consistent memory is a real pain. You should | |
558 | only ever use this API if you positively know your driver will be | |
559 | required to work on one of the rare (usually non-PCI) architectures | |
560 | that simply cannot make consistent memory. | |
561 | ||
562 | void | |
563 | dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, | |
564 | dma_addr_t dma_handle) | |
565 | ||
a12e2c6c | 566 | Free memory allocated by the nonconsistent API. All parameters must |
1da177e4 LT |
567 | be identical to those passed in (and returned by |
568 | dma_alloc_noncoherent()). | |
569 | ||
570 | int | |
f67637ee | 571 | dma_is_consistent(struct device *dev, dma_addr_t dma_handle) |
1da177e4 | 572 | |
a12e2c6c | 573 | Returns true if the device dev is performing consistent DMA on the memory |
f67637ee | 574 | area pointed to by the dma_handle. |
1da177e4 LT |
575 | |
576 | int | |
577 | dma_get_cache_alignment(void) | |
578 | ||
a12e2c6c | 579 | Returns the processor cache alignment. This is the absolute minimum |
1da177e4 LT |
580 | alignment *and* width that you must observe when either mapping |
581 | memory or doing partial flushes. | |
582 | ||
583 | Notes: This API may return a number *larger* than the actual cache | |
584 | line, but it will guarantee that one or more cache lines fit exactly | |
585 | into the width returned by this call. It will also always be a power | |
a12e2c6c | 586 | of two for easy alignment. |
1da177e4 | 587 | |
1da177e4 | 588 | void |
d3fa72e4 | 589 | dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
1da177e4 LT |
590 | enum dma_data_direction direction) |
591 | ||
592 | Do a partial sync of memory that was allocated by | |
593 | dma_alloc_noncoherent(), starting at virtual address vaddr and | |
594 | continuing on for size. Again, you *must* observe the cache line | |
595 | boundaries when doing this. | |
596 | ||
597 | int | |
598 | dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | |
599 | dma_addr_t device_addr, size_t size, int | |
600 | flags) | |
601 | ||
1da177e4 LT |
602 | Declare region of memory to be handed out by dma_alloc_coherent when |
603 | it's asked for coherent memory for this device. | |
604 | ||
605 | bus_addr is the physical address to which the memory is currently | |
606 | assigned in the bus responding region (this will be used by the | |
a12e2c6c | 607 | platform to perform the mapping). |
1da177e4 LT |
608 | |
609 | device_addr is the physical address the device needs to be programmed | |
610 | with actually to address this memory (this will be handed out as the | |
a12e2c6c | 611 | dma_addr_t in dma_alloc_coherent()). |
1da177e4 LT |
612 | |
613 | size is the size of the area (must be multiples of PAGE_SIZE). | |
614 | ||
a12e2c6c | 615 | flags can be or'd together and are: |
1da177e4 LT |
616 | |
617 | DMA_MEMORY_MAP - request that the memory returned from | |
4ae0edc2 | 618 | dma_alloc_coherent() be directly writable. |
1da177e4 LT |
619 | |
620 | DMA_MEMORY_IO - request that the memory returned from | |
621 | dma_alloc_coherent() be addressable using read/write/memcpy_toio etc. | |
622 | ||
a12e2c6c | 623 | One or both of these flags must be present. |
1da177e4 LT |
624 | |
625 | DMA_MEMORY_INCLUDES_CHILDREN - make the declared memory be allocated by | |
626 | dma_alloc_coherent of any child devices of this one (for memory residing | |
627 | on a bridge). | |
628 | ||
629 | DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions. | |
630 | Do not allow dma_alloc_coherent() to fall back to system memory when | |
631 | it's out of memory in the declared region. | |
632 | ||
633 | The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and | |
634 | must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO | |
635 | if only DMA_MEMORY_MAP were passed in) for success or zero for | |
636 | failure. | |
637 | ||
638 | Note, for DMA_MEMORY_IO returns, all subsequent memory returned by | |
639 | dma_alloc_coherent() may no longer be accessed directly, but instead | |
640 | must be accessed using the correct bus functions. If your driver | |
641 | isn't prepared to handle this contingency, it should not specify | |
642 | DMA_MEMORY_IO in the input flags. | |
643 | ||
644 | As a simplification for the platforms, only *one* such region of | |
645 | memory may be declared per device. | |
646 | ||
647 | For reasons of efficiency, most platforms choose to track the declared | |
648 | region only at the granularity of a page. For smaller allocations, | |
649 | you should use the dma_pool() API. | |
650 | ||
651 | void | |
652 | dma_release_declared_memory(struct device *dev) | |
653 | ||
654 | Remove the memory region previously declared from the system. This | |
655 | API performs *no* in-use checking for this region and will return | |
656 | unconditionally having removed all the required structures. It is the | |
a12e2c6c | 657 | driver's job to ensure that no parts of this memory region are |
1da177e4 LT |
658 | currently in use. |
659 | ||
660 | void * | |
661 | dma_mark_declared_memory_occupied(struct device *dev, | |
662 | dma_addr_t device_addr, size_t size) | |
663 | ||
664 | This is used to occupy specific regions of the declared space | |
665 | (dma_alloc_coherent() will hand out the first free region it finds). | |
666 | ||
a12e2c6c | 667 | device_addr is the *device* address of the region requested. |
1da177e4 | 668 | |
a12e2c6c | 669 | size is the size (and should be a page-sized multiple). |
1da177e4 LT |
670 | |
671 | The return value will be either a pointer to the processor virtual | |
672 | address of the memory, or an error (via PTR_ERR()) if any part of the | |
673 | region is occupied. | |
187f9c3f JR |
674 | |
675 | Part III - Debug drivers use of the DMA-API | |
676 | ------------------------------------------- | |
677 | ||
678 | The DMA-API as described above as some constraints. DMA addresses must be | |
679 | released with the corresponding function with the same size for example. With | |
680 | the advent of hardware IOMMUs it becomes more and more important that drivers | |
681 | do not violate those constraints. In the worst case such a violation can | |
682 | result in data corruption up to destroyed filesystems. | |
683 | ||
684 | To debug drivers and find bugs in the usage of the DMA-API checking code can | |
685 | be compiled into the kernel which will tell the developer about those | |
686 | violations. If your architecture supports it you can select the "Enable | |
687 | debugging of DMA-API usage" option in your kernel configuration. Enabling this | |
688 | option has a performance impact. Do not enable it in production kernels. | |
689 | ||
690 | If you boot the resulting kernel will contain code which does some bookkeeping | |
691 | about what DMA memory was allocated for which device. If this code detects an | |
692 | error it prints a warning message with some details into your kernel log. An | |
693 | example warning message may look like this: | |
694 | ||
695 | ------------[ cut here ]------------ | |
696 | WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448 | |
697 | check_unmap+0x203/0x490() | |
698 | Hardware name: | |
699 | forcedeth 0000:00:08.0: DMA-API: device driver frees DMA memory with wrong | |
700 | function [device address=0x00000000640444be] [size=66 bytes] [mapped as | |
701 | single] [unmapped as page] | |
702 | Modules linked in: nfsd exportfs bridge stp llc r8169 | |
703 | Pid: 0, comm: swapper Tainted: G W 2.6.28-dmatest-09289-g8bb99c0 #1 | |
704 | Call Trace: | |
705 | <IRQ> [<ffffffff80240b22>] warn_slowpath+0xf2/0x130 | |
706 | [<ffffffff80647b70>] _spin_unlock+0x10/0x30 | |
707 | [<ffffffff80537e75>] usb_hcd_link_urb_to_ep+0x75/0xc0 | |
708 | [<ffffffff80647c22>] _spin_unlock_irqrestore+0x12/0x40 | |
709 | [<ffffffff8055347f>] ohci_urb_enqueue+0x19f/0x7c0 | |
710 | [<ffffffff80252f96>] queue_work+0x56/0x60 | |
711 | [<ffffffff80237e10>] enqueue_task_fair+0x20/0x50 | |
712 | [<ffffffff80539279>] usb_hcd_submit_urb+0x379/0xbc0 | |
713 | [<ffffffff803b78c3>] cpumask_next_and+0x23/0x40 | |
714 | [<ffffffff80235177>] find_busiest_group+0x207/0x8a0 | |
715 | [<ffffffff8064784f>] _spin_lock_irqsave+0x1f/0x50 | |
716 | [<ffffffff803c7ea3>] check_unmap+0x203/0x490 | |
717 | [<ffffffff803c8259>] debug_dma_unmap_page+0x49/0x50 | |
718 | [<ffffffff80485f26>] nv_tx_done_optimized+0xc6/0x2c0 | |
719 | [<ffffffff80486c13>] nv_nic_irq_optimized+0x73/0x2b0 | |
720 | [<ffffffff8026df84>] handle_IRQ_event+0x34/0x70 | |
721 | [<ffffffff8026ffe9>] handle_edge_irq+0xc9/0x150 | |
722 | [<ffffffff8020e3ab>] do_IRQ+0xcb/0x1c0 | |
723 | [<ffffffff8020c093>] ret_from_intr+0x0/0xa | |
724 | <EOI> <4>---[ end trace f6435a98e2a38c0e ]--- | |
725 | ||
726 | The driver developer can find the driver and the device including a stacktrace | |
727 | of the DMA-API call which caused this warning. | |
728 | ||
729 | Per default only the first error will result in a warning message. All other | |
730 | errors will only silently counted. This limitation exist to prevent the code | |
731 | from flooding your kernel log. To support debugging a device driver this can | |
732 | be disabled via debugfs. See the debugfs interface documentation below for | |
733 | details. | |
734 | ||
735 | The debugfs directory for the DMA-API debugging code is called dma-api/. In | |
736 | this directory the following files can currently be found: | |
737 | ||
738 | dma-api/all_errors This file contains a numeric value. If this | |
739 | value is not equal to zero the debugging code | |
740 | will print a warning for every error it finds | |
19f59460 ML |
741 | into the kernel log. Be careful with this |
742 | option, as it can easily flood your logs. | |
187f9c3f JR |
743 | |
744 | dma-api/disabled This read-only file contains the character 'Y' | |
745 | if the debugging code is disabled. This can | |
746 | happen when it runs out of memory or if it was | |
747 | disabled at boot time | |
748 | ||
749 | dma-api/error_count This file is read-only and shows the total | |
750 | numbers of errors found. | |
751 | ||
752 | dma-api/num_errors The number in this file shows how many | |
753 | warnings will be printed to the kernel log | |
754 | before it stops. This number is initialized to | |
755 | one at system boot and be set by writing into | |
756 | this file | |
757 | ||
758 | dma-api/min_free_entries | |
759 | This read-only file can be read to get the | |
760 | minimum number of free dma_debug_entries the | |
761 | allocator has ever seen. If this value goes | |
762 | down to zero the code will disable itself | |
763 | because it is not longer reliable. | |
764 | ||
765 | dma-api/num_free_entries | |
766 | The current number of free dma_debug_entries | |
767 | in the allocator. | |
768 | ||
016ea687 JR |
769 | dma-api/driver-filter |
770 | You can write a name of a driver into this file | |
771 | to limit the debug output to requests from that | |
772 | particular driver. Write an empty string to | |
773 | that file to disable the filter and see | |
774 | all errors again. | |
775 | ||
187f9c3f JR |
776 | If you have this code compiled into your kernel it will be enabled by default. |
777 | If you want to boot without the bookkeeping anyway you can provide | |
778 | 'dma_debug=off' as a boot parameter. This will disable DMA-API debugging. | |
779 | Notice that you can not enable it again at runtime. You have to reboot to do | |
780 | so. | |
781 | ||
016ea687 JR |
782 | If you want to see debug messages only for a special device driver you can |
783 | specify the dma_debug_driver=<drivername> parameter. This will enable the | |
784 | driver filter at boot time. The debug code will only print errors for that | |
785 | driver afterwards. This filter can be disabled or changed later using debugfs. | |
786 | ||
187f9c3f JR |
787 | When the code disables itself at runtime this is most likely because it ran |
788 | out of dma_debug_entries. These entries are preallocated at boot. The number | |
789 | of preallocated entries is defined per architecture. If it is too low for you | |
790 | boot with 'dma_debug_entries=<your_desired_number>' to overwrite the | |
791 | architectural default. |