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1<?xml version="1.0" encoding="UTF-8"?>
2<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
4
7f817074 5<book id="gpuDevelopersGuide">
2d2ef822 6 <bookinfo>
3a4579b4 7 <title>Linux GPU Driver Developer's Guide</title>
2d2ef822 8
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9 <authorgroup>
10 <author>
11 <firstname>Jesse</firstname>
12 <surname>Barnes</surname>
13 <contrib>Initial version</contrib>
14 <affiliation>
15 <orgname>Intel Corporation</orgname>
16 <address>
17 <email>jesse.barnes@intel.com</email>
18 </address>
19 </affiliation>
20 </author>
21 <author>
22 <firstname>Laurent</firstname>
23 <surname>Pinchart</surname>
24 <contrib>Driver internals</contrib>
25 <affiliation>
26 <orgname>Ideas on board SPRL</orgname>
27 <address>
28 <email>laurent.pinchart@ideasonboard.com</email>
29 </address>
30 </affiliation>
31 </author>
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32 <author>
33 <firstname>Daniel</firstname>
34 <surname>Vetter</surname>
35 <contrib>Contributions all over the place</contrib>
36 <affiliation>
37 <orgname>Intel Corporation</orgname>
38 <address>
39 <email>daniel.vetter@ffwll.ch</email>
40 </address>
41 </affiliation>
42 </author>
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43 </authorgroup>
44
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45 <copyright>
46 <year>2008-2009</year>
3a05700d 47 <year>2013-2014</year>
9cad9c95 48 <holder>Intel Corporation</holder>
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49 </copyright>
50 <copyright>
51 <year>2012</year>
9cad9c95 52 <holder>Laurent Pinchart</holder>
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53 </copyright>
54
55 <legalnotice>
56 <para>
57 The contents of this file may be used under the terms of the GNU
58 General Public License version 2 (the "GPL") as distributed in
59 the kernel source COPYING file.
60 </para>
61 </legalnotice>
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62
63 <revhistory>
64 <!-- Put document revisions here, newest first. -->
65 <revision>
66 <revnumber>1.0</revnumber>
67 <date>2012-07-13</date>
68 <authorinitials>LP</authorinitials>
69 <revremark>Added extensive documentation about driver internals.
70 </revremark>
71 </revision>
72 </revhistory>
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73 </bookinfo>
74
75<toc></toc>
76
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77<part id="drmCore">
78 <title>DRM Core</title>
79 <partintro>
80 <para>
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81 This first part of the GPU Driver Developer's Guide documents core DRM
82 code, helper libraries for writing drivers and generic userspace
83 interfaces exposed by DRM drivers.
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84 </para>
85 </partintro>
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86
87 <chapter id="drmIntroduction">
88 <title>Introduction</title>
89 <para>
90 The Linux DRM layer contains code intended to support the needs
91 of complex graphics devices, usually containing programmable
92 pipelines well suited to 3D graphics acceleration. Graphics
f11aca04 93 drivers in the kernel may make use of DRM functions to make
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94 tasks like memory management, interrupt handling and DMA easier,
95 and provide a uniform interface to applications.
96 </para>
97 <para>
98 A note on versions: this guide covers features found in the DRM
99 tree, including the TTM memory manager, output configuration and
100 mode setting, and the new vblank internals, in addition to all
101 the regular features found in current kernels.
102 </para>
103 <para>
104 [Insert diagram of typical DRM stack here]
105 </para>
106 </chapter>
107
108 <!-- Internals -->
109
110 <chapter id="drmInternals">
111 <title>DRM Internals</title>
112 <para>
113 This chapter documents DRM internals relevant to driver authors
114 and developers working to add support for the latest features to
115 existing drivers.
116 </para>
117 <para>
a78f6787 118 First, we go over some typical driver initialization
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119 requirements, like setting up command buffers, creating an
120 initial output configuration, and initializing core services.
a78f6787 121 Subsequent sections cover core internals in more detail,
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122 providing implementation notes and examples.
123 </para>
124 <para>
125 The DRM layer provides several services to graphics drivers,
126 many of them driven by the application interfaces it provides
127 through libdrm, the library that wraps most of the DRM ioctls.
128 These include vblank event handling, memory
129 management, output management, framebuffer management, command
130 submission &amp; fencing, suspend/resume support, and DMA
131 services.
132 </para>
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133
134 <!-- Internals: driver init -->
135
136 <sect1>
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137 <title>Driver Initialization</title>
138 <para>
139 At the core of every DRM driver is a <structname>drm_driver</structname>
140 structure. Drivers typically statically initialize a drm_driver structure,
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141 and then pass it to <function>drm_dev_alloc()</function> to allocate a
142 device instance. After the device instance is fully initialized it can be
143 registered (which makes it accessible from userspace) using
144 <function>drm_dev_register()</function>.
b528ae71 145 </para>
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146 <para>
147 The <structname>drm_driver</structname> structure contains static
148 information that describes the driver and features it supports, and
149 pointers to methods that the DRM core will call to implement the DRM API.
150 We will first go through the <structname>drm_driver</structname> static
151 information fields, and will then describe individual operations in
152 details as they get used in later sections.
2d2ef822 153 </para>
2d2ef822 154 <sect2>
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155 <title>Driver Information</title>
156 <sect3>
157 <title>Driver Features</title>
158 <para>
159 Drivers inform the DRM core about their requirements and supported
160 features by setting appropriate flags in the
161 <structfield>driver_features</structfield> field. Since those flags
162 influence the DRM core behaviour since registration time, most of them
163 must be set to registering the <structname>drm_driver</structname>
164 instance.
165 </para>
166 <synopsis>u32 driver_features;</synopsis>
167 <variablelist>
168 <title>Driver Feature Flags</title>
169 <varlistentry>
170 <term>DRIVER_USE_AGP</term>
171 <listitem><para>
172 Driver uses AGP interface, the DRM core will manage AGP resources.
173 </para></listitem>
174 </varlistentry>
175 <varlistentry>
176 <term>DRIVER_REQUIRE_AGP</term>
177 <listitem><para>
178 Driver needs AGP interface to function. AGP initialization failure
179 will become a fatal error.
180 </para></listitem>
181 </varlistentry>
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182 <varlistentry>
183 <term>DRIVER_PCI_DMA</term>
184 <listitem><para>
185 Driver is capable of PCI DMA, mapping of PCI DMA buffers to
186 userspace will be enabled. Deprecated.
187 </para></listitem>
188 </varlistentry>
189 <varlistentry>
190 <term>DRIVER_SG</term>
191 <listitem><para>
192 Driver can perform scatter/gather DMA, allocation and mapping of
193 scatter/gather buffers will be enabled. Deprecated.
194 </para></listitem>
195 </varlistentry>
196 <varlistentry>
197 <term>DRIVER_HAVE_DMA</term>
198 <listitem><para>
199 Driver supports DMA, the userspace DMA API will be supported.
200 Deprecated.
201 </para></listitem>
202 </varlistentry>
203 <varlistentry>
204 <term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
205 <listitem><para>
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206 DRIVER_HAVE_IRQ indicates whether the driver has an IRQ handler
207 managed by the DRM Core. The core will support simple IRQ handler
208 installation when the flag is set. The installation process is
209 described in <xref linkend="drm-irq-registration"/>.</para>
210 <para>DRIVER_IRQ_SHARED indicates whether the device &amp; handler
211 support shared IRQs (note that this is required of PCI drivers).
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212 </para></listitem>
213 </varlistentry>
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214 <varlistentry>
215 <term>DRIVER_GEM</term>
216 <listitem><para>
217 Driver use the GEM memory manager.
218 </para></listitem>
219 </varlistentry>
220 <varlistentry>
221 <term>DRIVER_MODESET</term>
222 <listitem><para>
223 Driver supports mode setting interfaces (KMS).
224 </para></listitem>
225 </varlistentry>
226 <varlistentry>
227 <term>DRIVER_PRIME</term>
228 <listitem><para>
229 Driver implements DRM PRIME buffer sharing.
230 </para></listitem>
231 </varlistentry>
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232 <varlistentry>
233 <term>DRIVER_RENDER</term>
234 <listitem><para>
235 Driver supports dedicated render nodes.
236 </para></listitem>
237 </varlistentry>
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238 <varlistentry>
239 <term>DRIVER_ATOMIC</term>
240 <listitem><para>
241 Driver supports atomic properties. In this case the driver
242 must implement appropriate obj->atomic_get_property() vfuncs
243 for any modeset objects with driver specific properties.
244 </para></listitem>
245 </varlistentry>
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246 </variablelist>
247 </sect3>
248 <sect3>
249 <title>Major, Minor and Patchlevel</title>
250 <synopsis>int major;
251int minor;
252int patchlevel;</synopsis>
253 <para>
254 The DRM core identifies driver versions by a major, minor and patch
255 level triplet. The information is printed to the kernel log at
256 initialization time and passed to userspace through the
257 DRM_IOCTL_VERSION ioctl.
258 </para>
259 <para>
260 The major and minor numbers are also used to verify the requested driver
261 API version passed to DRM_IOCTL_SET_VERSION. When the driver API changes
262 between minor versions, applications can call DRM_IOCTL_SET_VERSION to
263 select a specific version of the API. If the requested major isn't equal
264 to the driver major, or the requested minor is larger than the driver
265 minor, the DRM_IOCTL_SET_VERSION call will return an error. Otherwise
266 the driver's set_version() method will be called with the requested
267 version.
268 </para>
269 </sect3>
270 <sect3>
271 <title>Name, Description and Date</title>
272 <synopsis>char *name;
273char *desc;
274char *date;</synopsis>
275 <para>
276 The driver name is printed to the kernel log at initialization time,
277 used for IRQ registration and passed to userspace through
278 DRM_IOCTL_VERSION.
279 </para>
280 <para>
281 The driver description is a purely informative string passed to
282 userspace through the DRM_IOCTL_VERSION ioctl and otherwise unused by
283 the kernel.
284 </para>
285 <para>
286 The driver date, formatted as YYYYMMDD, is meant to identify the date of
287 the latest modification to the driver. However, as most drivers fail to
288 update it, its value is mostly useless. The DRM core prints it to the
289 kernel log at initialization time and passes it to userspace through the
290 DRM_IOCTL_VERSION ioctl.
291 </para>
292 </sect3>
293 </sect2>
c6a1af8a 294 <sect2>
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295 <title>Device Instance and Driver Handling</title>
296!Pdrivers/gpu/drm/drm_drv.c driver instance overview
25196484 297!Edrivers/gpu/drm/drm_drv.c
c6a1af8a 298 </sect2>
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299 <sect2>
300 <title>Driver Load</title>
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301 <sect3 id="drm-irq-registration">
302 <title>IRQ Registration</title>
303 <para>
304 The DRM core tries to facilitate IRQ handler registration and
305 unregistration by providing <function>drm_irq_install</function> and
306 <function>drm_irq_uninstall</function> functions. Those functions only
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307 support a single interrupt per device, devices that use more than one
308 IRQs need to be handled manually.
9cad9c95 309 </para>
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310 <sect4>
311 <title>Managed IRQ Registration</title>
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312 <para>
313 <function>drm_irq_install</function> starts by calling the
314 <methodname>irq_preinstall</methodname> driver operation. The operation
315 is optional and must make sure that the interrupt will not get fired by
316 clearing all pending interrupt flags or disabling the interrupt.
317 </para>
318 <para>
bb0f1b5c 319 The passed-in IRQ will then be requested by a call to
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320 <function>request_irq</function>. If the DRIVER_IRQ_SHARED driver
321 feature flag is set, a shared (IRQF_SHARED) IRQ handler will be
322 requested.
323 </para>
324 <para>
325 The IRQ handler function must be provided as the mandatory irq_handler
326 driver operation. It will get passed directly to
327 <function>request_irq</function> and thus has the same prototype as all
328 IRQ handlers. It will get called with a pointer to the DRM device as the
329 second argument.
330 </para>
331 <para>
332 Finally the function calls the optional
333 <methodname>irq_postinstall</methodname> driver operation. The operation
334 usually enables interrupts (excluding the vblank interrupt, which is
335 enabled separately), but drivers may choose to enable/disable interrupts
336 at a different time.
337 </para>
338 <para>
339 <function>drm_irq_uninstall</function> is similarly used to uninstall an
340 IRQ handler. It starts by waking up all processes waiting on a vblank
341 interrupt to make sure they don't hang, and then calls the optional
342 <methodname>irq_uninstall</methodname> driver operation. The operation
343 must disable all hardware interrupts. Finally the function frees the IRQ
344 by calling <function>free_irq</function>.
345 </para>
346 </sect4>
347 <sect4>
348 <title>Manual IRQ Registration</title>
349 <para>
350 Drivers that require multiple interrupt handlers can't use the managed
351 IRQ registration functions. In that case IRQs must be registered and
352 unregistered manually (usually with the <function>request_irq</function>
353 and <function>free_irq</function> functions, or their devm_* equivalent).
354 </para>
355 <para>
356 When manually registering IRQs, drivers must not set the DRIVER_HAVE_IRQ
357 driver feature flag, and must not provide the
358 <methodname>irq_handler</methodname> driver operation. They must set the
359 <structname>drm_device</structname> <structfield>irq_enabled</structfield>
360 field to 1 upon registration of the IRQs, and clear it to 0 after
361 unregistering the IRQs.
362 </para>
363 </sect4>
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364 </sect3>
365 <sect3>
366 <title>Memory Manager Initialization</title>
367 <para>
368 Every DRM driver requires a memory manager which must be initialized at
369 load time. DRM currently contains two memory managers, the Translation
370 Table Manager (TTM) and the Graphics Execution Manager (GEM).
371 This document describes the use of the GEM memory manager only. See
372 <xref linkend="drm-memory-management"/> for details.
373 </para>
374 </sect3>
375 <sect3>
376 <title>Miscellaneous Device Configuration</title>
377 <para>
378 Another task that may be necessary for PCI devices during configuration
379 is mapping the video BIOS. On many devices, the VBIOS describes device
380 configuration, LCD panel timings (if any), and contains flags indicating
381 device state. Mapping the BIOS can be done using the pci_map_rom() call,
382 a convenience function that takes care of mapping the actual ROM,
383 whether it has been shadowed into memory (typically at address 0xc0000)
384 or exists on the PCI device in the ROM BAR. Note that after the ROM has
385 been mapped and any necessary information has been extracted, it should
386 be unmapped; on many devices, the ROM address decoder is shared with
387 other BARs, so leaving it mapped could cause undesired behaviour like
388 hangs or memory corruption.
389 <!--!Fdrivers/pci/rom.c pci_map_rom-->
390 </para>
391 </sect3>
2d2ef822 392 </sect2>
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393 <sect2>
394 <title>Bus-specific Device Registration and PCI Support</title>
395 <para>
396 A number of functions are provided to help with device registration.
397 The functions deal with PCI and platform devices respectively and are
398 only provided for historical reasons. These are all deprecated and
399 shouldn't be used in new drivers. Besides that there's a few
400 helpers for pci drivers.
401 </para>
402!Edrivers/gpu/drm/drm_pci.c
403!Edrivers/gpu/drm/drm_platform.c
404 </sect2>
9cad9c95 405 </sect1>
2d2ef822 406
9cad9c95 407 <!-- Internals: memory management -->
2d2ef822 408
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409 <sect1 id="drm-memory-management">
410 <title>Memory management</title>
411 <para>
412 Modern Linux systems require large amount of graphics memory to store
413 frame buffers, textures, vertices and other graphics-related data. Given
414 the very dynamic nature of many of that data, managing graphics memory
415 efficiently is thus crucial for the graphics stack and plays a central
416 role in the DRM infrastructure.
417 </para>
418 <para>
419 The DRM core includes two memory managers, namely Translation Table Maps
420 (TTM) and Graphics Execution Manager (GEM). TTM was the first DRM memory
421 manager to be developed and tried to be a one-size-fits-them all
f884ab15 422 solution. It provides a single userspace API to accommodate the need of
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423 all hardware, supporting both Unified Memory Architecture (UMA) devices
424 and devices with dedicated video RAM (i.e. most discrete video cards).
425 This resulted in a large, complex piece of code that turned out to be
426 hard to use for driver development.
427 </para>
428 <para>
429 GEM started as an Intel-sponsored project in reaction to TTM's
430 complexity. Its design philosophy is completely different: instead of
431 providing a solution to every graphics memory-related problems, GEM
432 identified common code between drivers and created a support library to
433 share it. GEM has simpler initialization and execution requirements than
9a6594fc 434 TTM, but has no video RAM management capabilities and is thus limited to
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435 UMA devices.
436 </para>
2d2ef822 437 <sect2>
9cad9c95 438 <title>The Translation Table Manager (TTM)</title>
2d2ef822 439 <para>
79058100 440 TTM design background and information belongs here.
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441 </para>
442 <sect3>
79058100 443 <title>TTM initialization</title>
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444 <warning><para>This section is outdated.</para></warning>
445 <para>
446 Drivers wishing to support TTM must fill out a drm_bo_driver
447 structure. The structure contains several fields with function
448 pointers for initializing the TTM, allocating and freeing memory,
449 waiting for command completion and fence synchronization, and memory
450 migration. See the radeon_ttm.c file for an example of usage.
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451 </para>
452 <para>
453 The ttm_global_reference structure is made up of several fields:
454 </para>
455 <programlisting>
456 struct ttm_global_reference {
457 enum ttm_global_types global_type;
458 size_t size;
459 void *object;
460 int (*init) (struct ttm_global_reference *);
461 void (*release) (struct ttm_global_reference *);
462 };
463 </programlisting>
464 <para>
465 There should be one global reference structure for your memory
466 manager as a whole, and there will be others for each object
467 created by the memory manager at runtime. Your global TTM should
468 have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
469 object should be sizeof(struct ttm_mem_global), and the init and
470 release hooks should point at your driver-specific init and
471 release routines, which probably eventually call
472 ttm_mem_global_init and ttm_mem_global_release, respectively.
473 </para>
474 <para>
475 Once your global TTM accounting structure is set up and initialized
476 by calling ttm_global_item_ref() on it,
477 you need to create a buffer object TTM to
478 provide a pool for buffer object allocation by clients and the
479 kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
480 and its size should be sizeof(struct ttm_bo_global). Again,
481 driver-specific init and release functions may be provided,
482 likely eventually calling ttm_bo_global_init() and
483 ttm_bo_global_release(), respectively. Also, like the previous
484 object, ttm_global_item_ref() is used to create an initial reference
485 count for the TTM, which will call your initialization function.
486 </para>
2d2ef822 487 </sect3>
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488 </sect2>
489 <sect2 id="drm-gem">
490 <title>The Graphics Execution Manager (GEM)</title>
491 <para>
492 The GEM design approach has resulted in a memory manager that doesn't
493 provide full coverage of all (or even all common) use cases in its
494 userspace or kernel API. GEM exposes a set of standard memory-related
495 operations to userspace and a set of helper functions to drivers, and let
496 drivers implement hardware-specific operations with their own private API.
497 </para>
498 <para>
499 The GEM userspace API is described in the
500 <ulink url="http://lwn.net/Articles/283798/"><citetitle>GEM - the Graphics
501 Execution Manager</citetitle></ulink> article on LWN. While slightly
502 outdated, the document provides a good overview of the GEM API principles.
503 Buffer allocation and read and write operations, described as part of the
504 common GEM API, are currently implemented using driver-specific ioctls.
505 </para>
506 <para>
507 GEM is data-agnostic. It manages abstract buffer objects without knowing
508 what individual buffers contain. APIs that require knowledge of buffer
509 contents or purpose, such as buffer allocation or synchronization
510 primitives, are thus outside of the scope of GEM and must be implemented
511 using driver-specific ioctls.
512 </para>
513 <para>
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514 On a fundamental level, GEM involves several operations:
515 <itemizedlist>
516 <listitem>Memory allocation and freeing</listitem>
517 <listitem>Command execution</listitem>
518 <listitem>Aperture management at command execution time</listitem>
519 </itemizedlist>
520 Buffer object allocation is relatively straightforward and largely
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521 provided by Linux's shmem layer, which provides memory to back each
522 object.
523 </para>
524 <para>
525 Device-specific operations, such as command execution, pinning, buffer
79058100 526 read &amp; write, mapping, and domain ownership transfers are left to
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527 driver-specific ioctls.
528 </para>
529 <sect3>
530 <title>GEM Initialization</title>
531 <para>
532 Drivers that use GEM must set the DRIVER_GEM bit in the struct
533 <structname>drm_driver</structname>
534 <structfield>driver_features</structfield> field. The DRM core will
535 then automatically initialize the GEM core before calling the
536 <methodname>load</methodname> operation. Behind the scene, this will
537 create a DRM Memory Manager object which provides an address space
538 pool for object allocation.
539 </para>
540 <para>
541 In a KMS configuration, drivers need to allocate and initialize a
542 command ring buffer following core GEM initialization if required by
543 the hardware. UMA devices usually have what is called a "stolen"
544 memory region, which provides space for the initial framebuffer and
545 large, contiguous memory regions required by the device. This space is
546 typically not managed by GEM, and must be initialized separately into
547 its own DRM MM object.
548 </para>
549 </sect3>
2d2ef822 550 <sect3>
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551 <title>GEM Objects Creation</title>
552 <para>
553 GEM splits creation of GEM objects and allocation of the memory that
554 backs them in two distinct operations.
555 </para>
556 <para>
557 GEM objects are represented by an instance of struct
558 <structname>drm_gem_object</structname>. Drivers usually need to extend
559 GEM objects with private information and thus create a driver-specific
560 GEM object structure type that embeds an instance of struct
561 <structname>drm_gem_object</structname>.
562 </para>
563 <para>
564 To create a GEM object, a driver allocates memory for an instance of its
565 specific GEM object type and initializes the embedded struct
566 <structname>drm_gem_object</structname> with a call to
567 <function>drm_gem_object_init</function>. The function takes a pointer to
568 the DRM device, a pointer to the GEM object and the buffer object size
569 in bytes.
570 </para>
571 <para>
572 GEM uses shmem to allocate anonymous pageable memory.
573 <function>drm_gem_object_init</function> will create an shmfs file of
574 the requested size and store it into the struct
575 <structname>drm_gem_object</structname> <structfield>filp</structfield>
576 field. The memory is used as either main storage for the object when the
577 graphics hardware uses system memory directly or as a backing store
578 otherwise.
579 </para>
580 <para>
581 Drivers are responsible for the actual physical pages allocation by
582 calling <function>shmem_read_mapping_page_gfp</function> for each page.
583 Note that they can decide to allocate pages when initializing the GEM
584 object, or to delay allocation until the memory is needed (for instance
585 when a page fault occurs as a result of a userspace memory access or
586 when the driver needs to start a DMA transfer involving the memory).
587 </para>
588 <para>
589 Anonymous pageable memory allocation is not always desired, for instance
590 when the hardware requires physically contiguous system memory as is
591 often the case in embedded devices. Drivers can create GEM objects with
592 no shmfs backing (called private GEM objects) by initializing them with
593 a call to <function>drm_gem_private_object_init</function> instead of
594 <function>drm_gem_object_init</function>. Storage for private GEM
595 objects must be managed by drivers.
596 </para>
597 <para>
598 Drivers that do not need to extend GEM objects with private information
599 can call the <function>drm_gem_object_alloc</function> function to
600 allocate and initialize a struct <structname>drm_gem_object</structname>
601 instance. The GEM core will call the optional driver
602 <methodname>gem_init_object</methodname> operation after initializing
603 the GEM object with <function>drm_gem_object_init</function>.
604 <synopsis>int (*gem_init_object) (struct drm_gem_object *obj);</synopsis>
605 </para>
606 <para>
607 No alloc-and-init function exists for private GEM objects.
608 </para>
609 </sect3>
610 <sect3>
611 <title>GEM Objects Lifetime</title>
612 <para>
613 All GEM objects are reference-counted by the GEM core. References can be
614 acquired and release by <function>calling drm_gem_object_reference</function>
615 and <function>drm_gem_object_unreference</function> respectively. The
616 caller must hold the <structname>drm_device</structname>
617 <structfield>struct_mutex</structfield> lock. As a convenience, GEM
618 provides the <function>drm_gem_object_reference_unlocked</function> and
619 <function>drm_gem_object_unreference_unlocked</function> functions that
620 can be called without holding the lock.
621 </para>
622 <para>
623 When the last reference to a GEM object is released the GEM core calls
624 the <structname>drm_driver</structname>
625 <methodname>gem_free_object</methodname> operation. That operation is
626 mandatory for GEM-enabled drivers and must free the GEM object and all
627 associated resources.
628 </para>
629 <para>
630 <synopsis>void (*gem_free_object) (struct drm_gem_object *obj);</synopsis>
631 Drivers are responsible for freeing all GEM object resources, including
632 the resources created by the GEM core. If an mmap offset has been
633 created for the object (in which case
634 <structname>drm_gem_object</structname>::<structfield>map_list</structfield>::<structfield>map</structfield>
635 is not NULL) it must be freed by a call to
636 <function>drm_gem_free_mmap_offset</function>. The shmfs backing store
637 must be released by calling <function>drm_gem_object_release</function>
638 (that function can safely be called if no shmfs backing store has been
639 created).
640 </para>
641 </sect3>
642 <sect3>
643 <title>GEM Objects Naming</title>
644 <para>
645 Communication between userspace and the kernel refers to GEM objects
646 using local handles, global names or, more recently, file descriptors.
647 All of those are 32-bit integer values; the usual Linux kernel limits
648 apply to the file descriptors.
649 </para>
650 <para>
651 GEM handles are local to a DRM file. Applications get a handle to a GEM
652 object through a driver-specific ioctl, and can use that handle to refer
653 to the GEM object in other standard or driver-specific ioctls. Closing a
654 DRM file handle frees all its GEM handles and dereferences the
655 associated GEM objects.
656 </para>
657 <para>
658 To create a handle for a GEM object drivers call
659 <function>drm_gem_handle_create</function>. The function takes a pointer
660 to the DRM file and the GEM object and returns a locally unique handle.
661 When the handle is no longer needed drivers delete it with a call to
662 <function>drm_gem_handle_delete</function>. Finally the GEM object
663 associated with a handle can be retrieved by a call to
664 <function>drm_gem_object_lookup</function>.
665 </para>
666 <para>
667 Handles don't take ownership of GEM objects, they only take a reference
668 to the object that will be dropped when the handle is destroyed. To
669 avoid leaking GEM objects, drivers must make sure they drop the
670 reference(s) they own (such as the initial reference taken at object
671 creation time) as appropriate, without any special consideration for the
672 handle. For example, in the particular case of combined GEM object and
673 handle creation in the implementation of the
674 <methodname>dumb_create</methodname> operation, drivers must drop the
675 initial reference to the GEM object before returning the handle.
676 </para>
677 <para>
678 GEM names are similar in purpose to handles but are not local to DRM
679 files. They can be passed between processes to reference a GEM object
680 globally. Names can't be used directly to refer to objects in the DRM
681 API, applications must convert handles to names and names to handles
682 using the DRM_IOCTL_GEM_FLINK and DRM_IOCTL_GEM_OPEN ioctls
683 respectively. The conversion is handled by the DRM core without any
684 driver-specific support.
685 </para>
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686 <para>
687 GEM also supports buffer sharing with dma-buf file descriptors through
688 PRIME. GEM-based drivers must use the provided helpers functions to
689 implement the exporting and importing correctly. See <xref linkend="drm-prime-support" />.
690 Since sharing file descriptors is inherently more secure than the
691 easily guessable and global GEM names it is the preferred buffer
692 sharing mechanism. Sharing buffers through GEM names is only supported
693 for legacy userspace. Furthermore PRIME also allows cross-device
694 buffer sharing since it is based on dma-bufs.
695 </para>
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696 </sect3>
697 <sect3 id="drm-gem-objects-mapping">
698 <title>GEM Objects Mapping</title>
699 <para>
700 Because mapping operations are fairly heavyweight GEM favours
701 read/write-like access to buffers, implemented through driver-specific
702 ioctls, over mapping buffers to userspace. However, when random access
703 to the buffer is needed (to perform software rendering for instance),
704 direct access to the object can be more efficient.
705 </para>
706 <para>
707 The mmap system call can't be used directly to map GEM objects, as they
708 don't have their own file handle. Two alternative methods currently
709 co-exist to map GEM objects to userspace. The first method uses a
710 driver-specific ioctl to perform the mapping operation, calling
711 <function>do_mmap</function> under the hood. This is often considered
712 dubious, seems to be discouraged for new GEM-enabled drivers, and will
713 thus not be described here.
714 </para>
715 <para>
716 The second method uses the mmap system call on the DRM file handle.
717 <synopsis>void *mmap(void *addr, size_t length, int prot, int flags, int fd,
718 off_t offset);</synopsis>
719 DRM identifies the GEM object to be mapped by a fake offset passed
720 through the mmap offset argument. Prior to being mapped, a GEM object
721 must thus be associated with a fake offset. To do so, drivers must call
722 <function>drm_gem_create_mmap_offset</function> on the object. The
723 function allocates a fake offset range from a pool and stores the
724 offset divided by PAGE_SIZE in
725 <literal>obj-&gt;map_list.hash.key</literal>. Care must be taken not to
726 call <function>drm_gem_create_mmap_offset</function> if a fake offset
727 has already been allocated for the object. This can be tested by
728 <literal>obj-&gt;map_list.map</literal> being non-NULL.
729 </para>
730 <para>
731 Once allocated, the fake offset value
732 (<literal>obj-&gt;map_list.hash.key &lt;&lt; PAGE_SHIFT</literal>)
733 must be passed to the application in a driver-specific way and can then
734 be used as the mmap offset argument.
735 </para>
736 <para>
737 The GEM core provides a helper method <function>drm_gem_mmap</function>
738 to handle object mapping. The method can be set directly as the mmap
739 file operation handler. It will look up the GEM object based on the
740 offset value and set the VMA operations to the
741 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
742 field. Note that <function>drm_gem_mmap</function> doesn't map memory to
743 userspace, but relies on the driver-provided fault handler to map pages
744 individually.
745 </para>
746 <para>
747 To use <function>drm_gem_mmap</function>, drivers must fill the struct
748 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
749 field with a pointer to VM operations.
750 </para>
751 <para>
752 <synopsis>struct vm_operations_struct *gem_vm_ops
753
754 struct vm_operations_struct {
755 void (*open)(struct vm_area_struct * area);
756 void (*close)(struct vm_area_struct * area);
757 int (*fault)(struct vm_area_struct *vma, struct vm_fault *vmf);
758 };</synopsis>
759 </para>
760 <para>
761 The <methodname>open</methodname> and <methodname>close</methodname>
762 operations must update the GEM object reference count. Drivers can use
763 the <function>drm_gem_vm_open</function> and
764 <function>drm_gem_vm_close</function> helper functions directly as open
765 and close handlers.
766 </para>
767 <para>
768 The fault operation handler is responsible for mapping individual pages
769 to userspace when a page fault occurs. Depending on the memory
770 allocation scheme, drivers can allocate pages at fault time, or can
771 decide to allocate memory for the GEM object at the time the object is
772 created.
773 </para>
774 <para>
775 Drivers that want to map the GEM object upfront instead of handling page
776 faults can implement their own mmap file operation handler.
777 </para>
778 </sect3>
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779 <sect3>
780 <title>Memory Coherency</title>
781 <para>
782 When mapped to the device or used in a command buffer, backing pages
783 for an object are flushed to memory and marked write combined so as to
784 be coherent with the GPU. Likewise, if the CPU accesses an object
785 after the GPU has finished rendering to the object, then the object
786 must be made coherent with the CPU's view of memory, usually involving
787 GPU cache flushing of various kinds. This core CPU&lt;-&gt;GPU
788 coherency management is provided by a device-specific ioctl, which
789 evaluates an object's current domain and performs any necessary
790 flushing or synchronization to put the object into the desired
791 coherency domain (note that the object may be busy, i.e. an active
792 render target; in that case, setting the domain blocks the client and
793 waits for rendering to complete before performing any necessary
794 flushing operations).
795 </para>
796 </sect3>
797 <sect3>
798 <title>Command Execution</title>
799 <para>
79058100 800 Perhaps the most important GEM function for GPU devices is providing a
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801 command execution interface to clients. Client programs construct
802 command buffers containing references to previously allocated memory
803 objects, and then submit them to GEM. At that point, GEM takes care to
804 bind all the objects into the GTT, execute the buffer, and provide
805 necessary synchronization between clients accessing the same buffers.
806 This often involves evicting some objects from the GTT and re-binding
807 others (a fairly expensive operation), and providing relocation
808 support which hides fixed GTT offsets from clients. Clients must take
809 care not to submit command buffers that reference more objects than
810 can fit in the GTT; otherwise, GEM will reject them and no rendering
811 will occur. Similarly, if several objects in the buffer require fence
812 registers to be allocated for correct rendering (e.g. 2D blits on
813 pre-965 chips), care must be taken not to require more fence registers
814 than are available to the client. Such resource management should be
815 abstracted from the client in libdrm.
816 </para>
2d2ef822 817 </sect3>
251261db 818 <sect3>
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819 <title>GEM Function Reference</title>
820!Edrivers/gpu/drm/drm_gem.c
251261db 821 </sect3>
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822 </sect2>
823 <sect2>
824 <title>VMA Offset Manager</title>
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825!Pdrivers/gpu/drm/drm_vma_manager.c vma offset manager
826!Edrivers/gpu/drm/drm_vma_manager.c
827!Iinclude/drm/drm_vma_manager.h
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828 </sect2>
829 <sect2 id="drm-prime-support">
830 <title>PRIME Buffer Sharing</title>
831 <para>
832 PRIME is the cross device buffer sharing framework in drm, originally
833 created for the OPTIMUS range of multi-gpu platforms. To userspace
834 PRIME buffers are dma-buf based file descriptors.
835 </para>
836 <sect3>
837 <title>Overview and Driver Interface</title>
838 <para>
839 Similar to GEM global names, PRIME file descriptors are
840 also used to share buffer objects across processes. They offer
841 additional security: as file descriptors must be explicitly sent over
842 UNIX domain sockets to be shared between applications, they can't be
843 guessed like the globally unique GEM names.
844 </para>
845 <para>
846 Drivers that support the PRIME
847 API must set the DRIVER_PRIME bit in the struct
848 <structname>drm_driver</structname>
849 <structfield>driver_features</structfield> field, and implement the
850 <methodname>prime_handle_to_fd</methodname> and
851 <methodname>prime_fd_to_handle</methodname> operations.
852 </para>
853 <para>
854 <synopsis>int (*prime_handle_to_fd)(struct drm_device *dev,
855 struct drm_file *file_priv, uint32_t handle,
856 uint32_t flags, int *prime_fd);
251261db 857int (*prime_fd_to_handle)(struct drm_device *dev,
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858 struct drm_file *file_priv, int prime_fd,
859 uint32_t *handle);</synopsis>
860 Those two operations convert a handle to a PRIME file descriptor and
861 vice versa. Drivers must use the kernel dma-buf buffer sharing framework
862 to manage the PRIME file descriptors. Similar to the mode setting
863 API PRIME is agnostic to the underlying buffer object manager, as
864 long as handles are 32bit unsigned integers.
865 </para>
866 <para>
867 While non-GEM drivers must implement the operations themselves, GEM
868 drivers must use the <function>drm_gem_prime_handle_to_fd</function>
869 and <function>drm_gem_prime_fd_to_handle</function> helper functions.
870 Those helpers rely on the driver
871 <methodname>gem_prime_export</methodname> and
872 <methodname>gem_prime_import</methodname> operations to create a dma-buf
873 instance from a GEM object (dma-buf exporter role) and to create a GEM
874 object from a dma-buf instance (dma-buf importer role).
875 </para>
876 <para>
877 <synopsis>struct dma_buf * (*gem_prime_export)(struct drm_device *dev,
878 struct drm_gem_object *obj,
879 int flags);
251261db 880struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev,
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881 struct dma_buf *dma_buf);</synopsis>
882 These two operations are mandatory for GEM drivers that support
883 PRIME.
884 </para>
251261db 885 </sect3>
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886 <sect3>
887 <title>PRIME Helper Functions</title>
888!Pdrivers/gpu/drm/drm_prime.c PRIME Helpers
889 </sect3>
890 </sect2>
891 <sect2>
892 <title>PRIME Function References</title>
39cc344a 893!Edrivers/gpu/drm/drm_prime.c
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894 </sect2>
895 <sect2>
896 <title>DRM MM Range Allocator</title>
897 <sect3>
898 <title>Overview</title>
93110be6 899!Pdrivers/gpu/drm/drm_mm.c Overview
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900 </sect3>
901 <sect3>
902 <title>LRU Scan/Eviction Support</title>
93110be6 903!Pdrivers/gpu/drm/drm_mm.c lru scan roaster
79058100 904 </sect3>
93110be6 905 </sect2>
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906 <sect2>
907 <title>DRM MM Range Allocator Function References</title>
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908!Edrivers/gpu/drm/drm_mm.c
909!Iinclude/drm/drm_mm.h
79058100 910 </sect2>
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911 <sect2>
912 <title>CMA Helper Functions Reference</title>
913!Pdrivers/gpu/drm/drm_gem_cma_helper.c cma helpers
914!Edrivers/gpu/drm/drm_gem_cma_helper.c
915!Iinclude/drm/drm_gem_cma_helper.h
916 </sect2>
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917 </sect1>
918
919 <!-- Internals: mode setting -->
2d2ef822 920
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921 <sect1 id="drm-mode-setting">
922 <title>Mode Setting</title>
923 <para>
924 Drivers must initialize the mode setting core by calling
925 <function>drm_mode_config_init</function> on the DRM device. The function
926 initializes the <structname>drm_device</structname>
927 <structfield>mode_config</structfield> field and never fails. Once done,
928 mode configuration must be setup by initializing the following fields.
929 </para>
930 <itemizedlist>
931 <listitem>
932 <synopsis>int min_width, min_height;
933int max_width, max_height;</synopsis>
934 <para>
935 Minimum and maximum width and height of the frame buffers in pixel
936 units.
937 </para>
938 </listitem>
939 <listitem>
940 <synopsis>struct drm_mode_config_funcs *funcs;</synopsis>
941 <para>Mode setting functions.</para>
942 </listitem>
943 </itemizedlist>
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944 <sect2>
945 <title>Display Modes Function Reference</title>
f5aabb97 946!Iinclude/drm/drm_modes.h
3ec0db81 947!Edrivers/gpu/drm/drm_modes.c
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948 </sect2>
949 <sect2>
950 <title>Atomic Mode Setting Function Reference</title>
951!Edrivers/gpu/drm/drm_atomic.c
3ec0db81 952 </sect2>
2d2ef822 953 <sect2>
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954 <title>Frame Buffer Creation</title>
955 <synopsis>struct drm_framebuffer *(*fb_create)(struct drm_device *dev,
956 struct drm_file *file_priv,
957 struct drm_mode_fb_cmd2 *mode_cmd);</synopsis>
2d2ef822 958 <para>
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959 Frame buffers are abstract memory objects that provide a source of
960 pixels to scanout to a CRTC. Applications explicitly request the
961 creation of frame buffers through the DRM_IOCTL_MODE_ADDFB(2) ioctls and
962 receive an opaque handle that can be passed to the KMS CRTC control,
963 plane configuration and page flip functions.
964 </para>
965 <para>
966 Frame buffers rely on the underneath memory manager for low-level memory
967 operations. When creating a frame buffer applications pass a memory
968 handle (or a list of memory handles for multi-planar formats) through
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969 the <parameter>drm_mode_fb_cmd2</parameter> argument. For drivers using
970 GEM as their userspace buffer management interface this would be a GEM
971 handle. Drivers are however free to use their own backing storage object
972 handles, e.g. vmwgfx directly exposes special TTM handles to userspace
973 and so expects TTM handles in the create ioctl and not GEM handles.
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974 </para>
975 <para>
976 Drivers must first validate the requested frame buffer parameters passed
977 through the mode_cmd argument. In particular this is where invalid
978 sizes, pixel formats or pitches can be caught.
979 </para>
980 <para>
981 If the parameters are deemed valid, drivers then create, initialize and
982 return an instance of struct <structname>drm_framebuffer</structname>.
983 If desired the instance can be embedded in a larger driver-specific
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984 structure. Drivers must fill its <structfield>width</structfield>,
985 <structfield>height</structfield>, <structfield>pitches</structfield>,
986 <structfield>offsets</structfield>, <structfield>depth</structfield>,
987 <structfield>bits_per_pixel</structfield> and
988 <structfield>pixel_format</structfield> fields from the values passed
989 through the <parameter>drm_mode_fb_cmd2</parameter> argument. They
990 should call the <function>drm_helper_mode_fill_fb_struct</function>
991 helper function to do so.
992 </para>
993
994 <para>
065a5027 995 The initialization of the new framebuffer instance is finalized with a
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996 call to <function>drm_framebuffer_init</function> which takes a pointer
997 to DRM frame buffer operations (struct
998 <structname>drm_framebuffer_funcs</structname>). Note that this function
999 publishes the framebuffer and so from this point on it can be accessed
1000 concurrently from other threads. Hence it must be the last step in the
1001 driver's framebuffer initialization sequence. Frame buffer operations
1002 are
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1003 <itemizedlist>
1004 <listitem>
1005 <synopsis>int (*create_handle)(struct drm_framebuffer *fb,
1006 struct drm_file *file_priv, unsigned int *handle);</synopsis>
1007 <para>
1008 Create a handle to the frame buffer underlying memory object. If
1009 the frame buffer uses a multi-plane format, the handle will
1010 reference the memory object associated with the first plane.
1011 </para>
1012 <para>
1013 Drivers call <function>drm_gem_handle_create</function> to create
1014 the handle.
1015 </para>
1016 </listitem>
1017 <listitem>
1018 <synopsis>void (*destroy)(struct drm_framebuffer *framebuffer);</synopsis>
1019 <para>
1020 Destroy the frame buffer object and frees all associated
1021 resources. Drivers must call
1022 <function>drm_framebuffer_cleanup</function> to free resources
1023 allocated by the DRM core for the frame buffer object, and must
1024 make sure to unreference all memory objects associated with the
1025 frame buffer. Handles created by the
1026 <methodname>create_handle</methodname> operation are released by
1027 the DRM core.
1028 </para>
1029 </listitem>
1030 <listitem>
1031 <synopsis>int (*dirty)(struct drm_framebuffer *framebuffer,
1032 struct drm_file *file_priv, unsigned flags, unsigned color,
1033 struct drm_clip_rect *clips, unsigned num_clips);</synopsis>
1034 <para>
1035 This optional operation notifies the driver that a region of the
1036 frame buffer has changed in response to a DRM_IOCTL_MODE_DIRTYFB
1037 ioctl call.
1038 </para>
1039 </listitem>
1040 </itemizedlist>
1041 </para>
1042 <para>
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1043 The lifetime of a drm framebuffer is controlled with a reference count,
1044 drivers can grab additional references with
9ee984a5 1045 <function>drm_framebuffer_reference</function>and drop them
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1046 again with <function>drm_framebuffer_unreference</function>. For
1047 driver-private framebuffers for which the last reference is never
1048 dropped (e.g. for the fbdev framebuffer when the struct
1049 <structname>drm_framebuffer</structname> is embedded into the fbdev
1050 helper struct) drivers can manually clean up a framebuffer at module
1051 unload time with
1052 <function>drm_framebuffer_unregister_private</function>.
9ee984a5 1053 </para>
9cad9c95 1054 </sect2>
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1055 <sect2>
1056 <title>Dumb Buffer Objects</title>
1057 <para>
1058 The KMS API doesn't standardize backing storage object creation and
1059 leaves it to driver-specific ioctls. Furthermore actually creating a
1060 buffer object even for GEM-based drivers is done through a
1061 driver-specific ioctl - GEM only has a common userspace interface for
1062 sharing and destroying objects. While not an issue for full-fledged
1063 graphics stacks that include device-specific userspace components (in
1064 libdrm for instance), this limit makes DRM-based early boot graphics
1065 unnecessarily complex.
1066 </para>
1067 <para>
1068 Dumb objects partly alleviate the problem by providing a standard
1069 API to create dumb buffers suitable for scanout, which can then be used
1070 to create KMS frame buffers.
1071 </para>
1072 <para>
1073 To support dumb objects drivers must implement the
1074 <methodname>dumb_create</methodname>,
1075 <methodname>dumb_destroy</methodname> and
1076 <methodname>dumb_map_offset</methodname> operations.
1077 </para>
1078 <itemizedlist>
1079 <listitem>
1080 <synopsis>int (*dumb_create)(struct drm_file *file_priv, struct drm_device *dev,
1081 struct drm_mode_create_dumb *args);</synopsis>
1082 <para>
1083 The <methodname>dumb_create</methodname> operation creates a driver
1084 object (GEM or TTM handle) suitable for scanout based on the
1085 width, height and depth from the struct
1086 <structname>drm_mode_create_dumb</structname> argument. It fills the
1087 argument's <structfield>handle</structfield>,
1088 <structfield>pitch</structfield> and <structfield>size</structfield>
1089 fields with a handle for the newly created object and its line
1090 pitch and size in bytes.
1091 </para>
1092 </listitem>
1093 <listitem>
1094 <synopsis>int (*dumb_destroy)(struct drm_file *file_priv, struct drm_device *dev,
1095 uint32_t handle);</synopsis>
1096 <para>
1097 The <methodname>dumb_destroy</methodname> operation destroys a dumb
1098 object created by <methodname>dumb_create</methodname>.
1099 </para>
1100 </listitem>
1101 <listitem>
1102 <synopsis>int (*dumb_map_offset)(struct drm_file *file_priv, struct drm_device *dev,
1103 uint32_t handle, uint64_t *offset);</synopsis>
1104 <para>
1105 The <methodname>dumb_map_offset</methodname> operation associates an
1106 mmap fake offset with the object given by the handle and returns
1107 it. Drivers must use the
1108 <function>drm_gem_create_mmap_offset</function> function to
1109 associate the fake offset as described in
1110 <xref linkend="drm-gem-objects-mapping"/>.
1111 </para>
1112 </listitem>
1113 </itemizedlist>
1114 <para>
1115 Note that dumb objects may not be used for gpu acceleration, as has been
1116 attempted on some ARM embedded platforms. Such drivers really must have
1117 a hardware-specific ioctl to allocate suitable buffer objects.
1118 </para>
1119 </sect2>
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1120 <sect2>
1121 <title>Output Polling</title>
1122 <synopsis>void (*output_poll_changed)(struct drm_device *dev);</synopsis>
1123 <para>
1124 This operation notifies the driver that the status of one or more
1125 connectors has changed. Drivers that use the fb helper can just call the
1126 <function>drm_fb_helper_hotplug_event</function> function to handle this
1127 operation.
1128 </para>
1129 </sect2>
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1130 <sect2>
1131 <title>Locking</title>
1132 <para>
1133 Beside some lookup structures with their own locking (which is hidden
1134 behind the interface functions) most of the modeset state is protected
1135 by the <code>dev-&lt;mode_config.lock</code> mutex and additionally
1136 per-crtc locks to allow cursor updates, pageflips and similar operations
1137 to occur concurrently with background tasks like output detection.
1138 Operations which cross domains like a full modeset always grab all
1139 locks. Drivers there need to protect resources shared between crtcs with
1140 additional locking. They also need to be careful to always grab the
1141 relevant crtc locks if a modset functions touches crtc state, e.g. for
1142 load detection (which does only grab the <code>mode_config.lock</code>
1143 to allow concurrent screen updates on live crtcs).
1144 </para>
1145 </sect2>
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1146 </sect1>
1147
1148 <!-- Internals: kms initialization and cleanup -->
1149
1150 <sect1 id="drm-kms-init">
1151 <title>KMS Initialization and Cleanup</title>
1152 <para>
1153 A KMS device is abstracted and exposed as a set of planes, CRTCs, encoders
1154 and connectors. KMS drivers must thus create and initialize all those
1155 objects at load time after initializing mode setting.
1156 </para>
1157 <sect2>
1158 <title>CRTCs (struct <structname>drm_crtc</structname>)</title>
1159 <para>
1160 A CRTC is an abstraction representing a part of the chip that contains a
1161 pointer to a scanout buffer. Therefore, the number of CRTCs available
1162 determines how many independent scanout buffers can be active at any
1163 given time. The CRTC structure contains several fields to support this:
1164 a pointer to some video memory (abstracted as a frame buffer object), a
1165 display mode, and an (x, y) offset into the video memory to support
1166 panning or configurations where one piece of video memory spans multiple
1167 CRTCs.
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1168 </para>
1169 <sect3>
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1170 <title>CRTC Initialization</title>
1171 <para>
1172 A KMS device must create and register at least one struct
1173 <structname>drm_crtc</structname> instance. The instance is allocated
1174 and zeroed by the driver, possibly as part of a larger structure, and
1175 registered with a call to <function>drm_crtc_init</function> with a
1176 pointer to CRTC functions.
1177 </para>
1178 </sect3>
6efa1f2f 1179 <sect3 id="drm-kms-crtcops">
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1180 <title>CRTC Operations</title>
1181 <sect4>
1182 <title>Set Configuration</title>
1183 <synopsis>int (*set_config)(struct drm_mode_set *set);</synopsis>
1184 <para>
1185 Apply a new CRTC configuration to the device. The configuration
1186 specifies a CRTC, a frame buffer to scan out from, a (x,y) position in
1187 the frame buffer, a display mode and an array of connectors to drive
1188 with the CRTC if possible.
1189 </para>
1190 <para>
1191 If the frame buffer specified in the configuration is NULL, the driver
1192 must detach all encoders connected to the CRTC and all connectors
1193 attached to those encoders and disable them.
1194 </para>
1195 <para>
1196 This operation is called with the mode config lock held.
1197 </para>
1198 <note><para>
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1199 Note that the drm core has no notion of restoring the mode setting
1200 state after resume, since all resume handling is in the full
1201 responsibility of the driver. The common mode setting helper library
1202 though provides a helper which can be used for this:
1203 <function>drm_helper_resume_force_mode</function>.
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1204 </para></note>
1205 </sect4>
1206 <sect4>
1207 <title>Page Flipping</title>
1208 <synopsis>int (*page_flip)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
1209 struct drm_pending_vblank_event *event);</synopsis>
1210 <para>
1211 Schedule a page flip to the given frame buffer for the CRTC. This
1212 operation is called with the mode config mutex held.
1213 </para>
1214 <para>
1215 Page flipping is a synchronization mechanism that replaces the frame
1216 buffer being scanned out by the CRTC with a new frame buffer during
1217 vertical blanking, avoiding tearing. When an application requests a page
1218 flip the DRM core verifies that the new frame buffer is large enough to
1219 be scanned out by the CRTC in the currently configured mode and then
1220 calls the CRTC <methodname>page_flip</methodname> operation with a
1221 pointer to the new frame buffer.
1222 </para>
1223 <para>
1224 The <methodname>page_flip</methodname> operation schedules a page flip.
f884ab15 1225 Once any pending rendering targeting the new frame buffer has
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1226 completed, the CRTC will be reprogrammed to display that frame buffer
1227 after the next vertical refresh. The operation must return immediately
1228 without waiting for rendering or page flip to complete and must block
1229 any new rendering to the frame buffer until the page flip completes.
1230 </para>
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1231 <para>
1232 If a page flip can be successfully scheduled the driver must set the
9ceae1da 1233 <code>drm_crtc-&gt;fb</code> field to the new framebuffer pointed to
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1234 by <code>fb</code>. This is important so that the reference counting
1235 on framebuffers stays balanced.
1236 </para>
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1237 <para>
1238 If a page flip is already pending, the
1239 <methodname>page_flip</methodname> operation must return
1240 -<errorname>EBUSY</errorname>.
1241 </para>
1242 <para>
1243 To synchronize page flip to vertical blanking the driver will likely
1244 need to enable vertical blanking interrupts. It should call
1245 <function>drm_vblank_get</function> for that purpose, and call
1246 <function>drm_vblank_put</function> after the page flip completes.
1247 </para>
1248 <para>
1249 If the application has requested to be notified when page flip completes
1250 the <methodname>page_flip</methodname> operation will be called with a
1251 non-NULL <parameter>event</parameter> argument pointing to a
1252 <structname>drm_pending_vblank_event</structname> instance. Upon page
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1253 flip completion the driver must call <methodname>drm_send_vblank_event</methodname>
1254 to fill in the event and send to wake up any waiting processes.
1255 This can be performed with
9cad9c95 1256 <programlisting><![CDATA[
9cad9c95 1257 spin_lock_irqsave(&dev->event_lock, flags);
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1258 ...
1259 drm_send_vblank_event(dev, pipe, event);
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1260 spin_unlock_irqrestore(&dev->event_lock, flags);
1261 ]]></programlisting>
1262 </para>
1263 <note><para>
1264 FIXME: Could drivers that don't need to wait for rendering to complete
1265 just add the event to <literal>dev-&gt;vblank_event_list</literal> and
1266 let the DRM core handle everything, as for "normal" vertical blanking
1267 events?
1268 </para></note>
1269 <para>
1270 While waiting for the page flip to complete, the
1271 <literal>event-&gt;base.link</literal> list head can be used freely by
1272 the driver to store the pending event in a driver-specific list.
1273 </para>
1274 <para>
1275 If the file handle is closed before the event is signaled, drivers must
1276 take care to destroy the event in their
1277 <methodname>preclose</methodname> operation (and, if needed, call
1278 <function>drm_vblank_put</function>).
1279 </para>
1280 </sect4>
1281 <sect4>
1282 <title>Miscellaneous</title>
1283 <itemizedlist>
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1284 <listitem>
1285 <synopsis>void (*set_property)(struct drm_crtc *crtc,
1286 struct drm_property *property, uint64_t value);</synopsis>
1287 <para>
1288 Set the value of the given CRTC property to
1289 <parameter>value</parameter>. See <xref linkend="drm-kms-properties"/>
1290 for more information about properties.
1291 </para>
1292 </listitem>
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1293 <listitem>
1294 <synopsis>void (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
1295 uint32_t start, uint32_t size);</synopsis>
1296 <para>
1297 Apply a gamma table to the device. The operation is optional.
1298 </para>
1299 </listitem>
1300 <listitem>
1301 <synopsis>void (*destroy)(struct drm_crtc *crtc);</synopsis>
1302 <para>
1303 Destroy the CRTC when not needed anymore. See
1304 <xref linkend="drm-kms-init"/>.
1305 </para>
1306 </listitem>
1307 </itemizedlist>
1308 </sect4>
1309 </sect3>
1310 </sect2>
1311 <sect2>
1312 <title>Planes (struct <structname>drm_plane</structname>)</title>
1313 <para>
1314 A plane represents an image source that can be blended with or overlayed
1315 on top of a CRTC during the scanout process. Planes are associated with
1316 a frame buffer to crop a portion of the image memory (source) and
1317 optionally scale it to a destination size. The result is then blended
1318 with or overlayed on top of a CRTC.
1319 </para>
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1320 <para>
1321 The DRM core recognizes three types of planes:
1322 <itemizedlist>
1323 <listitem>
1324 DRM_PLANE_TYPE_PRIMARY represents a "main" plane for a CRTC. Primary
ef21bf73 1325 planes are the planes operated upon by CRTC modesetting and flipping
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1326 operations described in <xref linkend="drm-kms-crtcops"/>.
1327 </listitem>
1328 <listitem>
1329 DRM_PLANE_TYPE_CURSOR represents a "cursor" plane for a CRTC. Cursor
1330 planes are the planes operated upon by the DRM_IOCTL_MODE_CURSOR and
1331 DRM_IOCTL_MODE_CURSOR2 ioctls.
1332 </listitem>
1333 <listitem>
1334 DRM_PLANE_TYPE_OVERLAY represents all non-primary, non-cursor planes.
1335 Some drivers refer to these types of planes as "sprites" internally.
1336 </listitem>
1337 </itemizedlist>
1338 For compatibility with legacy userspace, only overlay planes are made
1339 available to userspace by default. Userspace clients may set the
1340 DRM_CLIENT_CAP_UNIVERSAL_PLANES client capability bit to indicate that
1341 they wish to receive a universal plane list containing all plane types.
1342 </para>
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1343 <sect3>
1344 <title>Plane Initialization</title>
1345 <para>
6efa1f2f 1346 To create a plane, a KMS drivers allocates and
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1347 zeroes an instances of struct <structname>drm_plane</structname>
1348 (possibly as part of a larger structure) and registers it with a call
6efa1f2f 1349 to <function>drm_universal_plane_init</function>. The function takes a bitmask
9cad9c95 1350 of the CRTCs that can be associated with the plane, a pointer to the
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1351 plane functions, a list of format supported formats, and the type of
1352 plane (primary, cursor, or overlay) being initialized.
1353 </para>
1354 <para>
1355 Cursor and overlay planes are optional. All drivers should provide
1356 one primary plane per CRTC (although this requirement may change in
1357 the future); drivers that do not wish to provide special handling for
1358 primary planes may make use of the helper functions described in
1359 <xref linkend="drm-kms-planehelpers"/> to create and register a
1360 primary plane with standard capabilities.
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1361 </para>
1362 </sect3>
1363 <sect3>
1364 <title>Plane Operations</title>
1365 <itemizedlist>
1366 <listitem>
1367 <synopsis>int (*update_plane)(struct drm_plane *plane, struct drm_crtc *crtc,
1368 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
1369 unsigned int crtc_w, unsigned int crtc_h,
1370 uint32_t src_x, uint32_t src_y,
1371 uint32_t src_w, uint32_t src_h);</synopsis>
1372 <para>
1373 Enable and configure the plane to use the given CRTC and frame buffer.
1374 </para>
1375 <para>
1376 The source rectangle in frame buffer memory coordinates is given by
1377 the <parameter>src_x</parameter>, <parameter>src_y</parameter>,
1378 <parameter>src_w</parameter> and <parameter>src_h</parameter>
1379 parameters (as 16.16 fixed point values). Devices that don't support
1380 subpixel plane coordinates can ignore the fractional part.
1381 </para>
1382 <para>
1383 The destination rectangle in CRTC coordinates is given by the
1384 <parameter>crtc_x</parameter>, <parameter>crtc_y</parameter>,
1385 <parameter>crtc_w</parameter> and <parameter>crtc_h</parameter>
1386 parameters (as integer values). Devices scale the source rectangle to
1387 the destination rectangle. If scaling is not supported, and the source
1388 rectangle size doesn't match the destination rectangle size, the
1389 driver must return a -<errorname>EINVAL</errorname> error.
1390 </para>
1391 </listitem>
1392 <listitem>
1393 <synopsis>int (*disable_plane)(struct drm_plane *plane);</synopsis>
1394 <para>
1395 Disable the plane. The DRM core calls this method in response to a
1396 DRM_IOCTL_MODE_SETPLANE ioctl call with the frame buffer ID set to 0.
1397 Disabled planes must not be processed by the CRTC.
1398 </para>
1399 </listitem>
1400 <listitem>
1401 <synopsis>void (*destroy)(struct drm_plane *plane);</synopsis>
1402 <para>
1403 Destroy the plane when not needed anymore. See
1404 <xref linkend="drm-kms-init"/>.
1405 </para>
1406 </listitem>
1407 </itemizedlist>
1408 </sect3>
1409 </sect2>
1410 <sect2>
1411 <title>Encoders (struct <structname>drm_encoder</structname>)</title>
1412 <para>
1413 An encoder takes pixel data from a CRTC and converts it to a format
1414 suitable for any attached connectors. On some devices, it may be
1415 possible to have a CRTC send data to more than one encoder. In that
1416 case, both encoders would receive data from the same scanout buffer,
1417 resulting in a "cloned" display configuration across the connectors
1418 attached to each encoder.
1419 </para>
1420 <sect3>
1421 <title>Encoder Initialization</title>
1422 <para>
1423 As for CRTCs, a KMS driver must create, initialize and register at
1424 least one struct <structname>drm_encoder</structname> instance. The
1425 instance is allocated and zeroed by the driver, possibly as part of a
1426 larger structure.
1427 </para>
1428 <para>
1429 Drivers must initialize the struct <structname>drm_encoder</structname>
1430 <structfield>possible_crtcs</structfield> and
1431 <structfield>possible_clones</structfield> fields before registering the
1432 encoder. Both fields are bitmasks of respectively the CRTCs that the
1433 encoder can be connected to, and sibling encoders candidate for cloning.
1434 </para>
1435 <para>
1436 After being initialized, the encoder must be registered with a call to
1437 <function>drm_encoder_init</function>. The function takes a pointer to
1438 the encoder functions and an encoder type. Supported types are
1439 <itemizedlist>
1440 <listitem>
1441 DRM_MODE_ENCODER_DAC for VGA and analog on DVI-I/DVI-A
1442 </listitem>
1443 <listitem>
1444 DRM_MODE_ENCODER_TMDS for DVI, HDMI and (embedded) DisplayPort
1445 </listitem>
1446 <listitem>
1447 DRM_MODE_ENCODER_LVDS for display panels
1448 </listitem>
1449 <listitem>
1450 DRM_MODE_ENCODER_TVDAC for TV output (Composite, S-Video, Component,
1451 SCART)
1452 </listitem>
1453 <listitem>
1454 DRM_MODE_ENCODER_VIRTUAL for virtual machine displays
1455 </listitem>
1456 </itemizedlist>
1457 </para>
1458 <para>
1459 Encoders must be attached to a CRTC to be used. DRM drivers leave
1460 encoders unattached at initialization time. Applications (or the fbdev
1461 compatibility layer when implemented) are responsible for attaching the
1462 encoders they want to use to a CRTC.
1463 </para>
1464 </sect3>
1465 <sect3>
1466 <title>Encoder Operations</title>
1467 <itemizedlist>
1468 <listitem>
1469 <synopsis>void (*destroy)(struct drm_encoder *encoder);</synopsis>
1470 <para>
1471 Called to destroy the encoder when not needed anymore. See
1472 <xref linkend="drm-kms-init"/>.
1473 </para>
1474 </listitem>
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1475 <listitem>
1476 <synopsis>void (*set_property)(struct drm_plane *plane,
1477 struct drm_property *property, uint64_t value);</synopsis>
1478 <para>
1479 Set the value of the given plane property to
1480 <parameter>value</parameter>. See <xref linkend="drm-kms-properties"/>
1481 for more information about properties.
1482 </para>
1483 </listitem>
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1484 </itemizedlist>
1485 </sect3>
1486 </sect2>
1487 <sect2>
1488 <title>Connectors (struct <structname>drm_connector</structname>)</title>
1489 <para>
1490 A connector is the final destination for pixel data on a device, and
1491 usually connects directly to an external display device like a monitor
1492 or laptop panel. A connector can only be attached to one encoder at a
1493 time. The connector is also the structure where information about the
1494 attached display is kept, so it contains fields for display data, EDID
1495 data, DPMS &amp; connection status, and information about modes
1496 supported on the attached displays.
1497 </para>
1498 <sect3>
1499 <title>Connector Initialization</title>
1500 <para>
1501 Finally a KMS driver must create, initialize, register and attach at
1502 least one struct <structname>drm_connector</structname> instance. The
1503 instance is created as other KMS objects and initialized by setting the
1504 following fields.
1505 </para>
1506 <variablelist>
1507 <varlistentry>
1508 <term><structfield>interlace_allowed</structfield></term>
1509 <listitem><para>
1510 Whether the connector can handle interlaced modes.
1511 </para></listitem>
1512 </varlistentry>
1513 <varlistentry>
1514 <term><structfield>doublescan_allowed</structfield></term>
1515 <listitem><para>
1516 Whether the connector can handle doublescan.
1517 </para></listitem>
1518 </varlistentry>
1519 <varlistentry>
1520 <term><structfield>display_info
1521 </structfield></term>
1522 <listitem><para>
1523 Display information is filled from EDID information when a display
1524 is detected. For non hot-pluggable displays such as flat panels in
1525 embedded systems, the driver should initialize the
1526 <structfield>display_info</structfield>.<structfield>width_mm</structfield>
1527 and
1528 <structfield>display_info</structfield>.<structfield>height_mm</structfield>
1529 fields with the physical size of the display.
1530 </para></listitem>
1531 </varlistentry>
1532 <varlistentry>
1533 <term id="drm-kms-connector-polled"><structfield>polled</structfield></term>
1534 <listitem><para>
1535 Connector polling mode, a combination of
1536 <variablelist>
1537 <varlistentry>
1538 <term>DRM_CONNECTOR_POLL_HPD</term>
1539 <listitem><para>
1540 The connector generates hotplug events and doesn't need to be
1541 periodically polled. The CONNECT and DISCONNECT flags must not
1542 be set together with the HPD flag.
1543 </para></listitem>
1544 </varlistentry>
1545 <varlistentry>
1546 <term>DRM_CONNECTOR_POLL_CONNECT</term>
1547 <listitem><para>
1548 Periodically poll the connector for connection.
1549 </para></listitem>
1550 </varlistentry>
1551 <varlistentry>
1552 <term>DRM_CONNECTOR_POLL_DISCONNECT</term>
1553 <listitem><para>
1554 Periodically poll the connector for disconnection.
1555 </para></listitem>
1556 </varlistentry>
1557 </variablelist>
1558 Set to 0 for connectors that don't support connection status
1559 discovery.
1560 </para></listitem>
1561 </varlistentry>
1562 </variablelist>
1563 <para>
1564 The connector is then registered with a call to
1565 <function>drm_connector_init</function> with a pointer to the connector
1566 functions and a connector type, and exposed through sysfs with a call to
34ea3d38 1567 <function>drm_connector_register</function>.
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1568 </para>
1569 <para>
1570 Supported connector types are
1571 <itemizedlist>
1572 <listitem>DRM_MODE_CONNECTOR_VGA</listitem>
1573 <listitem>DRM_MODE_CONNECTOR_DVII</listitem>
1574 <listitem>DRM_MODE_CONNECTOR_DVID</listitem>
1575 <listitem>DRM_MODE_CONNECTOR_DVIA</listitem>
1576 <listitem>DRM_MODE_CONNECTOR_Composite</listitem>
1577 <listitem>DRM_MODE_CONNECTOR_SVIDEO</listitem>
1578 <listitem>DRM_MODE_CONNECTOR_LVDS</listitem>
1579 <listitem>DRM_MODE_CONNECTOR_Component</listitem>
1580 <listitem>DRM_MODE_CONNECTOR_9PinDIN</listitem>
1581 <listitem>DRM_MODE_CONNECTOR_DisplayPort</listitem>
1582 <listitem>DRM_MODE_CONNECTOR_HDMIA</listitem>
1583 <listitem>DRM_MODE_CONNECTOR_HDMIB</listitem>
1584 <listitem>DRM_MODE_CONNECTOR_TV</listitem>
1585 <listitem>DRM_MODE_CONNECTOR_eDP</listitem>
1586 <listitem>DRM_MODE_CONNECTOR_VIRTUAL</listitem>
1587 </itemizedlist>
1588 </para>
1589 <para>
1590 Connectors must be attached to an encoder to be used. For devices that
1591 map connectors to encoders 1:1, the connector should be attached at
1592 initialization time with a call to
1593 <function>drm_mode_connector_attach_encoder</function>. The driver must
1594 also set the <structname>drm_connector</structname>
1595 <structfield>encoder</structfield> field to point to the attached
1596 encoder.
1597 </para>
1598 <para>
1599 Finally, drivers must initialize the connectors state change detection
1600 with a call to <function>drm_kms_helper_poll_init</function>. If at
1601 least one connector is pollable but can't generate hotplug interrupts
1602 (indicated by the DRM_CONNECTOR_POLL_CONNECT and
1603 DRM_CONNECTOR_POLL_DISCONNECT connector flags), a delayed work will
1604 automatically be queued to periodically poll for changes. Connectors
1605 that can generate hotplug interrupts must be marked with the
1606 DRM_CONNECTOR_POLL_HPD flag instead, and their interrupt handler must
1607 call <function>drm_helper_hpd_irq_event</function>. The function will
1608 queue a delayed work to check the state of all connectors, but no
1609 periodic polling will be done.
1610 </para>
1611 </sect3>
1612 <sect3>
1613 <title>Connector Operations</title>
1614 <note><para>
1615 Unless otherwise state, all operations are mandatory.
1616 </para></note>
1617 <sect4>
1618 <title>DPMS</title>
1619 <synopsis>void (*dpms)(struct drm_connector *connector, int mode);</synopsis>
1620 <para>
1621 The DPMS operation sets the power state of a connector. The mode
1622 argument is one of
1623 <itemizedlist>
1624 <listitem><para>DRM_MODE_DPMS_ON</para></listitem>
1625 <listitem><para>DRM_MODE_DPMS_STANDBY</para></listitem>
1626 <listitem><para>DRM_MODE_DPMS_SUSPEND</para></listitem>
1627 <listitem><para>DRM_MODE_DPMS_OFF</para></listitem>
1628 </itemizedlist>
1629 </para>
1630 <para>
1631 In all but DPMS_ON mode the encoder to which the connector is attached
1632 should put the display in low-power mode by driving its signals
1633 appropriately. If more than one connector is attached to the encoder
1634 care should be taken not to change the power state of other displays as
1635 a side effect. Low-power mode should be propagated to the encoders and
1636 CRTCs when all related connectors are put in low-power mode.
1637 </para>
1638 </sect4>
1639 <sect4>
1640 <title>Modes</title>
1641 <synopsis>int (*fill_modes)(struct drm_connector *connector, uint32_t max_width,
1642 uint32_t max_height);</synopsis>
1643 <para>
1644 Fill the mode list with all supported modes for the connector. If the
1645 <parameter>max_width</parameter> and <parameter>max_height</parameter>
1646 arguments are non-zero, the implementation must ignore all modes wider
1647 than <parameter>max_width</parameter> or higher than
1648 <parameter>max_height</parameter>.
1649 </para>
1650 <para>
1651 The connector must also fill in this operation its
1652 <structfield>display_info</structfield>
1653 <structfield>width_mm</structfield> and
1654 <structfield>height_mm</structfield> fields with the connected display
1655 physical size in millimeters. The fields should be set to 0 if the value
1656 isn't known or is not applicable (for instance for projector devices).
1657 </para>
1658 </sect4>
1659 <sect4>
1660 <title>Connection Status</title>
1661 <para>
1662 The connection status is updated through polling or hotplug events when
1663 supported (see <xref linkend="drm-kms-connector-polled"/>). The status
1664 value is reported to userspace through ioctls and must not be used
1665 inside the driver, as it only gets initialized by a call to
1666 <function>drm_mode_getconnector</function> from userspace.
1667 </para>
1668 <synopsis>enum drm_connector_status (*detect)(struct drm_connector *connector,
1669 bool force);</synopsis>
1670 <para>
1671 Check to see if anything is attached to the connector. The
1672 <parameter>force</parameter> parameter is set to false whilst polling or
1673 to true when checking the connector due to user request.
1674 <parameter>force</parameter> can be used by the driver to avoid
1675 expensive, destructive operations during automated probing.
1676 </para>
1677 <para>
1678 Return connector_status_connected if something is connected to the
1679 connector, connector_status_disconnected if nothing is connected and
1680 connector_status_unknown if the connection state isn't known.
1681 </para>
1682 <para>
1683 Drivers should only return connector_status_connected if the connection
1684 status has really been probed as connected. Connectors that can't detect
1685 the connection status, or failed connection status probes, should return
1686 connector_status_unknown.
1687 </para>
1688 </sect4>
1689 <sect4>
1690 <title>Miscellaneous</title>
1691 <itemizedlist>
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1692 <listitem>
1693 <synopsis>void (*set_property)(struct drm_connector *connector,
1694 struct drm_property *property, uint64_t value);</synopsis>
1695 <para>
1696 Set the value of the given connector property to
1697 <parameter>value</parameter>. See <xref linkend="drm-kms-properties"/>
1698 for more information about properties.
1699 </para>
1700 </listitem>
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1701 <listitem>
1702 <synopsis>void (*destroy)(struct drm_connector *connector);</synopsis>
1703 <para>
1704 Destroy the connector when not needed anymore. See
1705 <xref linkend="drm-kms-init"/>.
1706 </para>
1707 </listitem>
1708 </itemizedlist>
1709 </sect4>
1710 </sect3>
1711 </sect2>
1712 <sect2>
1713 <title>Cleanup</title>
1714 <para>
1715 The DRM core manages its objects' lifetime. When an object is not needed
1716 anymore the core calls its destroy function, which must clean up and
1717 free every resource allocated for the object. Every
1718 <function>drm_*_init</function> call must be matched with a
1719 corresponding <function>drm_*_cleanup</function> call to cleanup CRTCs
1720 (<function>drm_crtc_cleanup</function>), planes
1721 (<function>drm_plane_cleanup</function>), encoders
1722 (<function>drm_encoder_cleanup</function>) and connectors
1723 (<function>drm_connector_cleanup</function>). Furthermore, connectors
1724 that have been added to sysfs must be removed by a call to
34ea3d38 1725 <function>drm_connector_unregister</function> before calling
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1726 <function>drm_connector_cleanup</function>.
1727 </para>
1728 <para>
1729 Connectors state change detection must be cleanup up with a call to
1730 <function>drm_kms_helper_poll_fini</function>.
1731 </para>
1732 </sect2>
1733 <sect2>
1734 <title>Output discovery and initialization example</title>
1735 <programlisting><![CDATA[
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1736void intel_crt_init(struct drm_device *dev)
1737{
1738 struct drm_connector *connector;
1739 struct intel_output *intel_output;
1740
1741 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
1742 if (!intel_output)
1743 return;
1744
1745 connector = &intel_output->base;
1746 drm_connector_init(dev, &intel_output->base,
1747 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
1748
1749 drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
1750 DRM_MODE_ENCODER_DAC);
1751
1752 drm_mode_connector_attach_encoder(&intel_output->base,
1753 &intel_output->enc);
1754
1755 /* Set up the DDC bus. */
1756 intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
1757 if (!intel_output->ddc_bus) {
1758 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1759 "failed.\n");
1760 return;
1761 }
1762
1763 intel_output->type = INTEL_OUTPUT_ANALOG;
1764 connector->interlace_allowed = 0;
1765 connector->doublescan_allowed = 0;
1766
1767 drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
1768 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
1769
34ea3d38 1770 drm_connector_register(connector);
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1771}]]></programlisting>
1772 <para>
1773 In the example above (taken from the i915 driver), a CRTC, connector and
1774 encoder combination is created. A device-specific i2c bus is also
1775 created for fetching EDID data and performing monitor detection. Once
1776 the process is complete, the new connector is registered with sysfs to
1777 make its properties available to applications.
1778 </para>
2d2ef822 1779 </sect2>
065a50ed
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1780 <sect2>
1781 <title>KMS API Functions</title>
1782!Edrivers/gpu/drm/drm_crtc.c
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1783 </sect2>
1784 <sect2>
1785 <title>KMS Data Structures</title>
1786!Iinclude/drm/drm_crtc.h
065a50ed 1787 </sect2>
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1788 <sect2>
1789 <title>KMS Locking</title>
1790!Pdrivers/gpu/drm/drm_modeset_lock.c kms locking
1791!Iinclude/drm/drm_modeset_lock.h
1792!Edrivers/gpu/drm/drm_modeset_lock.c
1793 </sect2>
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1794 </sect1>
1795
e4949f29 1796 <!-- Internals: kms helper functions -->
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1797
1798 <sect1>
e4949f29 1799 <title>Mode Setting Helper Functions</title>
2d2ef822 1800 <para>
6efa1f2f 1801 The plane, CRTC, encoder and connector functions provided by the drivers
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1802 implement the DRM API. They're called by the DRM core and ioctl handlers
1803 to handle device state changes and configuration request. As implementing
1804 those functions often requires logic not specific to drivers, mid-layer
1805 helper functions are available to avoid duplicating boilerplate code.
1806 </para>
1807 <para>
1808 The DRM core contains one mid-layer implementation. The mid-layer provides
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1809 implementations of several plane, CRTC, encoder and connector functions
1810 (called from the top of the mid-layer) that pre-process requests and call
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1811 lower-level functions provided by the driver (at the bottom of the
1812 mid-layer). For instance, the
1813 <function>drm_crtc_helper_set_config</function> function can be used to
1814 fill the struct <structname>drm_crtc_funcs</structname>
1815 <structfield>set_config</structfield> field. When called, it will split
1816 the <methodname>set_config</methodname> operation in smaller, simpler
1817 operations and call the driver to handle them.
2d2ef822 1818 </para>
2d2ef822 1819 <para>
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1820 To use the mid-layer, drivers call <function>drm_crtc_helper_add</function>,
1821 <function>drm_encoder_helper_add</function> and
1822 <function>drm_connector_helper_add</function> functions to install their
1823 mid-layer bottom operations handlers, and fill the
1824 <structname>drm_crtc_funcs</structname>,
1825 <structname>drm_encoder_funcs</structname> and
1826 <structname>drm_connector_funcs</structname> structures with pointers to
1827 the mid-layer top API functions. Installing the mid-layer bottom operation
1828 handlers is best done right after registering the corresponding KMS object.
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1829 </para>
1830 <para>
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1831 The mid-layer is not split between CRTC, encoder and connector operations.
1832 To use it, a driver must provide bottom functions for all of the three KMS
1833 entities.
2d2ef822 1834 </para>
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1835 <sect2>
1836 <title>Helper Functions</title>
1837 <itemizedlist>
1838 <listitem>
1839 <synopsis>int drm_crtc_helper_set_config(struct drm_mode_set *set);</synopsis>
1840 <para>
1841 The <function>drm_crtc_helper_set_config</function> helper function
1842 is a CRTC <methodname>set_config</methodname> implementation. It
1843 first tries to locate the best encoder for each connector by calling
1844 the connector <methodname>best_encoder</methodname> helper
1845 operation.
1846 </para>
1847 <para>
1848 After locating the appropriate encoders, the helper function will
1849 call the <methodname>mode_fixup</methodname> encoder and CRTC helper
1850 operations to adjust the requested mode, or reject it completely in
1851 which case an error will be returned to the application. If the new
1852 configuration after mode adjustment is identical to the current
1853 configuration the helper function will return without performing any
1854 other operation.
1855 </para>
1856 <para>
1857 If the adjusted mode is identical to the current mode but changes to
1858 the frame buffer need to be applied, the
1859 <function>drm_crtc_helper_set_config</function> function will call
1860 the CRTC <methodname>mode_set_base</methodname> helper operation. If
1861 the adjusted mode differs from the current mode, or if the
1862 <methodname>mode_set_base</methodname> helper operation is not
1863 provided, the helper function performs a full mode set sequence by
1864 calling the <methodname>prepare</methodname>,
1865 <methodname>mode_set</methodname> and
1866 <methodname>commit</methodname> CRTC and encoder helper operations,
1867 in that order.
1868 </para>
1869 </listitem>
1870 <listitem>
1871 <synopsis>void drm_helper_connector_dpms(struct drm_connector *connector, int mode);</synopsis>
1872 <para>
1873 The <function>drm_helper_connector_dpms</function> helper function
1874 is a connector <methodname>dpms</methodname> implementation that
1875 tracks power state of connectors. To use the function, drivers must
1876 provide <methodname>dpms</methodname> helper operations for CRTCs
1877 and encoders to apply the DPMS state to the device.
1878 </para>
1879 <para>
1880 The mid-layer doesn't track the power state of CRTCs and encoders.
1881 The <methodname>dpms</methodname> helper operations can thus be
1882 called with a mode identical to the currently active mode.
1883 </para>
1884 </listitem>
1885 <listitem>
1886 <synopsis>int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
1887 uint32_t maxX, uint32_t maxY);</synopsis>
1888 <para>
1889 The <function>drm_helper_probe_single_connector_modes</function> helper
1890 function is a connector <methodname>fill_modes</methodname>
1891 implementation that updates the connection status for the connector
1892 and then retrieves a list of modes by calling the connector
1893 <methodname>get_modes</methodname> helper operation.
1894 </para>
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1895 <para>
1896 If the helper operation returns no mode, and if the connector status
1897 is connector_status_connected, standard VESA DMT modes up to
1898 1024x768 are automatically added to the modes list by a call to
1899 <function>drm_add_modes_noedid</function>.
1900 </para>
9cad9c95 1901 <para>
f41c2581 1902 The function then filters out modes larger than
9cad9c95 1903 <parameter>max_width</parameter> and <parameter>max_height</parameter>
f41c2581 1904 if specified. It finally calls the optional connector
f9b0e251 1905 <methodname>mode_valid</methodname> helper operation for each mode in
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1906 the probed list to check whether the mode is valid for the connector.
1907 </para>
1908 </listitem>
1909 </itemizedlist>
1910 </sect2>
1911 <sect2>
1912 <title>CRTC Helper Operations</title>
1913 <itemizedlist>
1914 <listitem id="drm-helper-crtc-mode-fixup">
1915 <synopsis>bool (*mode_fixup)(struct drm_crtc *crtc,
1916 const struct drm_display_mode *mode,
1917 struct drm_display_mode *adjusted_mode);</synopsis>
1918 <para>
1919 Let CRTCs adjust the requested mode or reject it completely. This
1920 operation returns true if the mode is accepted (possibly after being
1921 adjusted) or false if it is rejected.
1922 </para>
1923 <para>
1924 The <methodname>mode_fixup</methodname> operation should reject the
1925 mode if it can't reasonably use it. The definition of "reasonable"
1926 is currently fuzzy in this context. One possible behaviour would be
1927 to set the adjusted mode to the panel timings when a fixed-mode
1928 panel is used with hardware capable of scaling. Another behaviour
1929 would be to accept any input mode and adjust it to the closest mode
1930 supported by the hardware (FIXME: This needs to be clarified).
1931 </para>
1932 </listitem>
1933 <listitem>
1934 <synopsis>int (*mode_set_base)(struct drm_crtc *crtc, int x, int y,
1935 struct drm_framebuffer *old_fb)</synopsis>
1936 <para>
1937 Move the CRTC on the current frame buffer (stored in
1938 <literal>crtc-&gt;fb</literal>) to position (x,y). Any of the frame
1939 buffer, x position or y position may have been modified.
1940 </para>
1941 <para>
1942 This helper operation is optional. If not provided, the
1943 <function>drm_crtc_helper_set_config</function> function will fall
1944 back to the <methodname>mode_set</methodname> helper operation.
1945 </para>
1946 <note><para>
1947 FIXME: Why are x and y passed as arguments, as they can be accessed
1948 through <literal>crtc-&gt;x</literal> and
1949 <literal>crtc-&gt;y</literal>?
1950 </para></note>
1951 </listitem>
1952 <listitem>
1953 <synopsis>void (*prepare)(struct drm_crtc *crtc);</synopsis>
1954 <para>
1955 Prepare the CRTC for mode setting. This operation is called after
1956 validating the requested mode. Drivers use it to perform
1957 device-specific operations required before setting the new mode.
1958 </para>
1959 </listitem>
1960 <listitem>
1961 <synopsis>int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode,
1962 struct drm_display_mode *adjusted_mode, int x, int y,
1963 struct drm_framebuffer *old_fb);</synopsis>
1964 <para>
1965 Set a new mode, position and frame buffer. Depending on the device
1966 requirements, the mode can be stored internally by the driver and
1967 applied in the <methodname>commit</methodname> operation, or
1968 programmed to the hardware immediately.
1969 </para>
1970 <para>
1971 The <methodname>mode_set</methodname> operation returns 0 on success
1972 or a negative error code if an error occurs.
1973 </para>
1974 </listitem>
1975 <listitem>
1976 <synopsis>void (*commit)(struct drm_crtc *crtc);</synopsis>
1977 <para>
1978 Commit a mode. This operation is called after setting the new mode.
1979 Upon return the device must use the new mode and be fully
1980 operational.
1981 </para>
1982 </listitem>
1983 </itemizedlist>
1984 </sect2>
1985 <sect2>
1986 <title>Encoder Helper Operations</title>
1987 <itemizedlist>
1988 <listitem>
1989 <synopsis>bool (*mode_fixup)(struct drm_encoder *encoder,
1990 const struct drm_display_mode *mode,
1991 struct drm_display_mode *adjusted_mode);</synopsis>
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1992 <para>
1993 Let encoders adjust the requested mode or reject it completely. This
1994 operation returns true if the mode is accepted (possibly after being
1995 adjusted) or false if it is rejected. See the
1996 <link linkend="drm-helper-crtc-mode-fixup">mode_fixup CRTC helper
1997 operation</link> for an explanation of the allowed adjustments.
1998 </para>
1999 </listitem>
2000 <listitem>
2001 <synopsis>void (*prepare)(struct drm_encoder *encoder);</synopsis>
2002 <para>
2003 Prepare the encoder for mode setting. This operation is called after
2004 validating the requested mode. Drivers use it to perform
2005 device-specific operations required before setting the new mode.
2006 </para>
2007 </listitem>
2008 <listitem>
2009 <synopsis>void (*mode_set)(struct drm_encoder *encoder,
2010 struct drm_display_mode *mode,
2011 struct drm_display_mode *adjusted_mode);</synopsis>
2012 <para>
2013 Set a new mode. Depending on the device requirements, the mode can
2014 be stored internally by the driver and applied in the
2015 <methodname>commit</methodname> operation, or programmed to the
2016 hardware immediately.
2017 </para>
2018 </listitem>
2019 <listitem>
2020 <synopsis>void (*commit)(struct drm_encoder *encoder);</synopsis>
2021 <para>
2022 Commit a mode. This operation is called after setting the new mode.
2023 Upon return the device must use the new mode and be fully
2024 operational.
2025 </para>
2026 </listitem>
2027 </itemizedlist>
2028 </sect2>
2029 <sect2>
2030 <title>Connector Helper Operations</title>
2031 <itemizedlist>
2032 <listitem>
2033 <synopsis>struct drm_encoder *(*best_encoder)(struct drm_connector *connector);</synopsis>
2034 <para>
2035 Return a pointer to the best encoder for the connecter. Device that
2036 map connectors to encoders 1:1 simply return the pointer to the
2037 associated encoder. This operation is mandatory.
2038 </para>
2039 </listitem>
2040 <listitem>
2041 <synopsis>int (*get_modes)(struct drm_connector *connector);</synopsis>
2042 <para>
2043 Fill the connector's <structfield>probed_modes</structfield> list
f41c2581
LP
2044 by parsing EDID data with <function>drm_add_edid_modes</function>,
2045 adding standard VESA DMT modes with <function>drm_add_modes_noedid</function>,
2046 or calling <function>drm_mode_probed_add</function> directly for every
9cad9c95
LP
2047 supported mode and return the number of modes it has detected. This
2048 operation is mandatory.
2049 </para>
f41c2581
LP
2050 <para>
2051 Note that the caller function will automatically add standard VESA
2052 DMT modes up to 1024x768 if the <methodname>get_modes</methodname>
2053 helper operation returns no mode and if the connector status is
2054 connector_status_connected. There is no need to call
2055 <function>drm_add_edid_modes</function> manually in that case.
2056 </para>
9cad9c95
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2057 <para>
2058 When adding modes manually the driver creates each mode with a call to
2059 <function>drm_mode_create</function> and must fill the following fields.
2060 <itemizedlist>
2061 <listitem>
2062 <synopsis>__u32 type;</synopsis>
2063 <para>
2064 Mode type bitmask, a combination of
2065 <variablelist>
2066 <varlistentry>
2067 <term>DRM_MODE_TYPE_BUILTIN</term>
2068 <listitem><para>not used?</para></listitem>
2069 </varlistentry>
2070 <varlistentry>
2071 <term>DRM_MODE_TYPE_CLOCK_C</term>
2072 <listitem><para>not used?</para></listitem>
2073 </varlistentry>
2074 <varlistentry>
2075 <term>DRM_MODE_TYPE_CRTC_C</term>
2076 <listitem><para>not used?</para></listitem>
2077 </varlistentry>
2078 <varlistentry>
2079 <term>
2080 DRM_MODE_TYPE_PREFERRED - The preferred mode for the connector
2081 </term>
2082 <listitem>
2083 <para>not used?</para>
2084 </listitem>
2085 </varlistentry>
2086 <varlistentry>
2087 <term>DRM_MODE_TYPE_DEFAULT</term>
2088 <listitem><para>not used?</para></listitem>
2089 </varlistentry>
2090 <varlistentry>
2091 <term>DRM_MODE_TYPE_USERDEF</term>
2092 <listitem><para>not used?</para></listitem>
2093 </varlistentry>
2094 <varlistentry>
2095 <term>DRM_MODE_TYPE_DRIVER</term>
2096 <listitem>
2097 <para>
2098 The mode has been created by the driver (as opposed to
2099 to user-created modes).
2100 </para>
2101 </listitem>
2102 </varlistentry>
2103 </variablelist>
2104 Drivers must set the DRM_MODE_TYPE_DRIVER bit for all modes they
2105 create, and set the DRM_MODE_TYPE_PREFERRED bit for the preferred
2106 mode.
2107 </para>
2108 </listitem>
2109 <listitem>
2110 <synopsis>__u32 clock;</synopsis>
2111 <para>Pixel clock frequency in kHz unit</para>
2112 </listitem>
2113 <listitem>
2114 <synopsis>__u16 hdisplay, hsync_start, hsync_end, htotal;
2115 __u16 vdisplay, vsync_start, vsync_end, vtotal;</synopsis>
2116 <para>Horizontal and vertical timing information</para>
2117 <screen><![CDATA[
2118 Active Front Sync Back
2119 Region Porch Porch
2120 <-----------------------><----------------><-------------><-------------->
2121
2122 //////////////////////|
2123 ////////////////////// |
2124 ////////////////////// |.................. ................
2125 _______________
2126
2127 <----- [hv]display ----->
2128 <------------- [hv]sync_start ------------>
2129 <--------------------- [hv]sync_end --------------------->
2130 <-------------------------------- [hv]total ----------------------------->
2131]]></screen>
2132 </listitem>
2133 <listitem>
2134 <synopsis>__u16 hskew;
2135 __u16 vscan;</synopsis>
2136 <para>Unknown</para>
2137 </listitem>
2138 <listitem>
2139 <synopsis>__u32 flags;</synopsis>
2140 <para>
2141 Mode flags, a combination of
2142 <variablelist>
2143 <varlistentry>
2144 <term>DRM_MODE_FLAG_PHSYNC</term>
2145 <listitem><para>
2146 Horizontal sync is active high
2147 </para></listitem>
2148 </varlistentry>
2149 <varlistentry>
2150 <term>DRM_MODE_FLAG_NHSYNC</term>
2151 <listitem><para>
2152 Horizontal sync is active low
2153 </para></listitem>
2154 </varlistentry>
2155 <varlistentry>
2156 <term>DRM_MODE_FLAG_PVSYNC</term>
2157 <listitem><para>
2158 Vertical sync is active high
2159 </para></listitem>
2160 </varlistentry>
2161 <varlistentry>
2162 <term>DRM_MODE_FLAG_NVSYNC</term>
2163 <listitem><para>
2164 Vertical sync is active low
2165 </para></listitem>
2166 </varlistentry>
2167 <varlistentry>
2168 <term>DRM_MODE_FLAG_INTERLACE</term>
2169 <listitem><para>
2170 Mode is interlaced
2171 </para></listitem>
2172 </varlistentry>
2173 <varlistentry>
2174 <term>DRM_MODE_FLAG_DBLSCAN</term>
2175 <listitem><para>
2176 Mode uses doublescan
2177 </para></listitem>
2178 </varlistentry>
2179 <varlistentry>
2180 <term>DRM_MODE_FLAG_CSYNC</term>
2181 <listitem><para>
2182 Mode uses composite sync
2183 </para></listitem>
2184 </varlistentry>
2185 <varlistentry>
2186 <term>DRM_MODE_FLAG_PCSYNC</term>
2187 <listitem><para>
2188 Composite sync is active high
2189 </para></listitem>
2190 </varlistentry>
2191 <varlistentry>
2192 <term>DRM_MODE_FLAG_NCSYNC</term>
2193 <listitem><para>
2194 Composite sync is active low
2195 </para></listitem>
2196 </varlistentry>
2197 <varlistentry>
2198 <term>DRM_MODE_FLAG_HSKEW</term>
2199 <listitem><para>
2200 hskew provided (not used?)
2201 </para></listitem>
2202 </varlistentry>
2203 <varlistentry>
2204 <term>DRM_MODE_FLAG_BCAST</term>
2205 <listitem><para>
2206 not used?
2207 </para></listitem>
2208 </varlistentry>
2209 <varlistentry>
2210 <term>DRM_MODE_FLAG_PIXMUX</term>
2211 <listitem><para>
2212 not used?
2213 </para></listitem>
2214 </varlistentry>
2215 <varlistentry>
2216 <term>DRM_MODE_FLAG_DBLCLK</term>
2217 <listitem><para>
2218 not used?
2219 </para></listitem>
2220 </varlistentry>
2221 <varlistentry>
2222 <term>DRM_MODE_FLAG_CLKDIV2</term>
2223 <listitem><para>
2224 ?
2225 </para></listitem>
2226 </varlistentry>
2227 </variablelist>
2228 </para>
2229 <para>
2230 Note that modes marked with the INTERLACE or DBLSCAN flags will be
2231 filtered out by
2232 <function>drm_helper_probe_single_connector_modes</function> if
2233 the connector's <structfield>interlace_allowed</structfield> or
2234 <structfield>doublescan_allowed</structfield> field is set to 0.
2235 </para>
2236 </listitem>
2237 <listitem>
2238 <synopsis>char name[DRM_DISPLAY_MODE_LEN];</synopsis>
2239 <para>
2240 Mode name. The driver must call
2241 <function>drm_mode_set_name</function> to fill the mode name from
2242 <structfield>hdisplay</structfield>,
2243 <structfield>vdisplay</structfield> and interlace flag after
2244 filling the corresponding fields.
2245 </para>
2246 </listitem>
2247 </itemizedlist>
2248 </para>
2249 <para>
2250 The <structfield>vrefresh</structfield> value is computed by
2251 <function>drm_helper_probe_single_connector_modes</function>.
2252 </para>
2253 <para>
f41c2581 2254 When parsing EDID data, <function>drm_add_edid_modes</function> fills the
9cad9c95
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2255 connector <structfield>display_info</structfield>
2256 <structfield>width_mm</structfield> and
2257 <structfield>height_mm</structfield> fields. When creating modes
2258 manually the <methodname>get_modes</methodname> helper operation must
2259 set the <structfield>display_info</structfield>
2260 <structfield>width_mm</structfield> and
2261 <structfield>height_mm</structfield> fields if they haven't been set
065a5027 2262 already (for instance at initialization time when a fixed-size panel is
9cad9c95
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2263 attached to the connector). The mode <structfield>width_mm</structfield>
2264 and <structfield>height_mm</structfield> fields are only used internally
2265 during EDID parsing and should not be set when creating modes manually.
2266 </para>
2267 </listitem>
2268 <listitem>
2269 <synopsis>int (*mode_valid)(struct drm_connector *connector,
2270 struct drm_display_mode *mode);</synopsis>
2271 <para>
2272 Verify whether a mode is valid for the connector. Return MODE_OK for
2273 supported modes and one of the enum drm_mode_status values (MODE_*)
f9b0e251 2274 for unsupported modes. This operation is optional.
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2275 </para>
2276 <para>
2277 As the mode rejection reason is currently not used beside for
2278 immediately removing the unsupported mode, an implementation can
2279 return MODE_BAD regardless of the exact reason why the mode is not
2280 valid.
2281 </para>
2282 <note><para>
2283 Note that the <methodname>mode_valid</methodname> helper operation is
2284 only called for modes detected by the device, and
2285 <emphasis>not</emphasis> for modes set by the user through the CRTC
2286 <methodname>set_config</methodname> operation.
2287 </para></note>
2288 </listitem>
2289 </itemizedlist>
2290 </sect2>
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2291 <sect2>
2292 <title>Atomic Modeset Helper Functions Reference</title>
2293 <sect3>
2294 <title>Overview</title>
2295!Pdrivers/gpu/drm/drm_atomic_helper.c overview
2296 </sect3>
2297 <sect3>
2298 <title>Implementing Asynchronous Atomic Commit</title>
2299!Pdrivers/gpu/drm/drm_atomic_helper.c implementing async commit
2300 </sect3>
2301 <sect3>
2302 <title>Atomic State Reset and Initialization</title>
2303!Pdrivers/gpu/drm/drm_atomic_helper.c atomic state reset and initialization
2304 </sect3>
dd275956 2305!Iinclude/drm/drm_atomic_helper.h
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2306!Edrivers/gpu/drm/drm_atomic_helper.c
2307 </sect2>
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2308 <sect2>
2309 <title>Modeset Helper Functions Reference</title>
7552e7dd 2310!Iinclude/drm/drm_crtc_helper.h
0d4ed4c8 2311!Edrivers/gpu/drm/drm_crtc_helper.c
3150c7d0 2312!Pdrivers/gpu/drm/drm_crtc_helper.c overview
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2313 </sect2>
2314 <sect2>
2315 <title>Output Probing Helper Functions Reference</title>
2316!Pdrivers/gpu/drm/drm_probe_helper.c output probing helper overview
2317!Edrivers/gpu/drm/drm_probe_helper.c
0d4ed4c8 2318 </sect2>
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2319 <sect2>
2320 <title>fbdev Helper Functions Reference</title>
2321!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers
2322!Edrivers/gpu/drm/drm_fb_helper.c
207fd329 2323!Iinclude/drm/drm_fb_helper.h
d0ddc033 2324 </sect2>
28164fda
DV
2325 <sect2>
2326 <title>Display Port Helper Functions Reference</title>
2327!Pdrivers/gpu/drm/drm_dp_helper.c dp helpers
2328!Iinclude/drm/drm_dp_helper.h
2329!Edrivers/gpu/drm/drm_dp_helper.c
ad7f8a1f
DA
2330 </sect2>
2331 <sect2>
2332 <title>Display Port MST Helper Functions Reference</title>
2333!Pdrivers/gpu/drm/drm_dp_mst_topology.c dp mst helper
2334!Iinclude/drm/drm_dp_mst_helper.h
2335!Edrivers/gpu/drm/drm_dp_mst_topology.c
009081e0
TR
2336 </sect2>
2337 <sect2>
2338 <title>MIPI DSI Helper Functions Reference</title>
2339!Pdrivers/gpu/drm/drm_mipi_dsi.c dsi helpers
2340!Iinclude/drm/drm_mipi_dsi.h
2341!Edrivers/gpu/drm/drm_mipi_dsi.c
28164fda 2342 </sect2>
5e308591
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2343 <sect2>
2344 <title>EDID Helper Functions Reference</title>
2345!Edrivers/gpu/drm/drm_edid.c
2346 </sect2>
03973536
VS
2347 <sect2>
2348 <title>Rectangle Utilities Reference</title>
2349!Pinclude/drm/drm_rect.h rect utils
2350!Iinclude/drm/drm_rect.h
2351!Edrivers/gpu/drm/drm_rect.c
cabaafc7
RC
2352 </sect2>
2353 <sect2>
2354 <title>Flip-work Helper Reference</title>
2355!Pinclude/drm/drm_flip_work.h flip utils
2356!Iinclude/drm/drm_flip_work.h
2357!Edrivers/gpu/drm/drm_flip_work.c
03973536 2358 </sect2>
2d123f46
DV
2359 <sect2>
2360 <title>HDMI Infoframes Helper Reference</title>
2361 <para>
2362 Strictly speaking this is not a DRM helper library but generally useable
2363 by any driver interfacing with HDMI outputs like v4l or alsa drivers.
2364 But it nicely fits into the overall topic of mode setting helper
2365 libraries and hence is also included here.
2366 </para>
2367!Iinclude/linux/hdmi.h
2368!Edrivers/video/hdmi.c
2369 </sect2>
6efa1f2f
MR
2370 <sect2>
2371 <title id="drm-kms-planehelpers">Plane Helper Reference</title>
3150c7d0
DV
2372!Edrivers/gpu/drm/drm_plane_helper.c
2373!Pdrivers/gpu/drm/drm_plane_helper.c overview
6efa1f2f 2374 </sect2>
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DA
2375 <sect2>
2376 <title>Tile group</title>
2377!Pdrivers/gpu/drm/drm_crtc.c Tile group
2378 </sect2>
2331b4e4
AT
2379 <sect2>
2380 <title>Bridges</title>
2381 <sect3>
2382 <title>Overview</title>
2383!Pdrivers/gpu/drm/drm_bridge.c overview
2384 </sect3>
2385 <sect3>
2386 <title>Default bridge callback sequence</title>
2387!Pdrivers/gpu/drm/drm_bridge.c bridge callbacks
2388 </sect3>
2389!Edrivers/gpu/drm/drm_bridge.c
2390 </sect2>
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JB
2391 </sect1>
2392
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LP
2393 <!-- Internals: kms properties -->
2394
2395 <sect1 id="drm-kms-properties">
2396 <title>KMS Properties</title>
2397 <para>
2398 Drivers may need to expose additional parameters to applications than
2399 those described in the previous sections. KMS supports attaching
2400 properties to CRTCs, connectors and planes and offers a userspace API to
2401 list, get and set the property values.
2402 </para>
2403 <para>
2404 Properties are identified by a name that uniquely defines the property
2405 purpose, and store an associated value. For all property types except blob
2406 properties the value is a 64-bit unsigned integer.
2407 </para>
2408 <para>
2409 KMS differentiates between properties and property instances. Drivers
2410 first create properties and then create and associate individual instances
2411 of those properties to objects. A property can be instantiated multiple
2412 times and associated with different objects. Values are stored in property
9a6594fc 2413 instances, and all other property information are stored in the property
421cda3e
LP
2414 and shared between all instances of the property.
2415 </para>
2416 <para>
2417 Every property is created with a type that influences how the KMS core
2418 handles the property. Supported property types are
2419 <variablelist>
2420 <varlistentry>
2421 <term>DRM_MODE_PROP_RANGE</term>
2422 <listitem><para>Range properties report their minimum and maximum
2423 admissible values. The KMS core verifies that values set by
2424 application fit in that range.</para></listitem>
2425 </varlistentry>
2426 <varlistentry>
2427 <term>DRM_MODE_PROP_ENUM</term>
2428 <listitem><para>Enumerated properties take a numerical value that
2429 ranges from 0 to the number of enumerated values defined by the
2430 property minus one, and associate a free-formed string name to each
2431 value. Applications can retrieve the list of defined value-name pairs
2432 and use the numerical value to get and set property instance values.
2433 </para></listitem>
2434 </varlistentry>
2435 <varlistentry>
2436 <term>DRM_MODE_PROP_BITMASK</term>
2437 <listitem><para>Bitmask properties are enumeration properties that
2438 additionally restrict all enumerated values to the 0..63 range.
2439 Bitmask property instance values combine one or more of the
2440 enumerated bits defined by the property.</para></listitem>
2441 </varlistentry>
2442 <varlistentry>
2443 <term>DRM_MODE_PROP_BLOB</term>
2444 <listitem><para>Blob properties store a binary blob without any format
2445 restriction. The binary blobs are created as KMS standalone objects,
2446 and blob property instance values store the ID of their associated
2447 blob object.</para>
2448 <para>Blob properties are only used for the connector EDID property
2449 and cannot be created by drivers.</para></listitem>
2450 </varlistentry>
2451 </variablelist>
2452 </para>
2453 <para>
2454 To create a property drivers call one of the following functions depending
2455 on the property type. All property creation functions take property flags
2456 and name, as well as type-specific arguments.
2457 <itemizedlist>
2458 <listitem>
2459 <synopsis>struct drm_property *drm_property_create_range(struct drm_device *dev, int flags,
2460 const char *name,
2461 uint64_t min, uint64_t max);</synopsis>
2462 <para>Create a range property with the given minimum and maximum
2463 values.</para>
2464 </listitem>
2465 <listitem>
2466 <synopsis>struct drm_property *drm_property_create_enum(struct drm_device *dev, int flags,
2467 const char *name,
2468 const struct drm_prop_enum_list *props,
2469 int num_values);</synopsis>
2470 <para>Create an enumerated property. The <parameter>props</parameter>
2471 argument points to an array of <parameter>num_values</parameter>
2472 value-name pairs.</para>
2473 </listitem>
2474 <listitem>
2475 <synopsis>struct drm_property *drm_property_create_bitmask(struct drm_device *dev,
2476 int flags, const char *name,
2477 const struct drm_prop_enum_list *props,
2478 int num_values);</synopsis>
2479 <para>Create a bitmask property. The <parameter>props</parameter>
2480 argument points to an array of <parameter>num_values</parameter>
2481 value-name pairs.</para>
2482 </listitem>
2483 </itemizedlist>
2484 </para>
2485 <para>
2486 Properties can additionally be created as immutable, in which case they
2487 will be read-only for applications but can be modified by the driver. To
2488 create an immutable property drivers must set the DRM_MODE_PROP_IMMUTABLE
2489 flag at property creation time.
2490 </para>
2491 <para>
2492 When no array of value-name pairs is readily available at property
2493 creation time for enumerated or range properties, drivers can create
2494 the property using the <function>drm_property_create</function> function
2495 and manually add enumeration value-name pairs by calling the
2496 <function>drm_property_add_enum</function> function. Care must be taken to
2497 properly specify the property type through the <parameter>flags</parameter>
2498 argument.
2499 </para>
2500 <para>
2501 After creating properties drivers can attach property instances to CRTC,
2502 connector and plane objects by calling the
2503 <function>drm_object_attach_property</function>. The function takes a
2504 pointer to the target object, a pointer to the previously created property
2505 and an initial instance value.
2506 </para>
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SK
2507 <sect2>
2508 <title>Existing KMS Properties</title>
2509 <para>
2510 The following table gives description of drm properties exposed by various
2511 modules/drivers.
2512 </para>
2513 <table border="1" cellpadding="0" cellspacing="0">
2514 <tbody>
2515 <tr style="font-weight: bold;">
2516 <td valign="top" >Owner Module/Drivers</td>
2517 <td valign="top" >Group</td>
2518 <td valign="top" >Property Name</td>
2519 <td valign="top" >Type</td>
2520 <td valign="top" >Property Values</td>
2521 <td valign="top" >Object attached</td>
2522 <td valign="top" >Description/Restrictions</td>
2523 </tr>
2524 <tr>
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SJ
2525 <td rowspan="37" valign="top" >DRM</td>
2526 <td valign="top" >Generic</td>
2527 <td valign="top" >“rotation”</td>
2528 <td valign="top" >BITMASK</td>
2529 <td valign="top" >{ 0, "rotate-0" },
2530 { 1, "rotate-90" },
2531 { 2, "rotate-180" },
2532 { 3, "rotate-270" },
2533 { 4, "reflect-x" },
2534 { 5, "reflect-y" }</td>
2535 <td valign="top" >CRTC, Plane</td>
2536 <td valign="top" >rotate-(degrees) rotates the image by the specified amount in degrees
2537 in counter clockwise direction. reflect-x and reflect-y reflects the
2538 image along the specified axis prior to rotation</td>
2539 </tr>
2540 <tr>
ae16c597 2541 <td rowspan="5" valign="top" >Connector</td>
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SK
2542 <td valign="top" >“EDID”</td>
2543 <td valign="top" >BLOB | IMMUTABLE</td>
2544 <td valign="top" >0</td>
2545 <td valign="top" >Connector</td>
2546 <td valign="top" >Contains id of edid blob ptr object.</td>
2547 </tr>
2548 <tr>
2549 <td valign="top" >“DPMS”</td>
2550 <td valign="top" >ENUM</td>
2551 <td valign="top" >{ “On”, “Standby”, “Suspend”, “Off” }</td>
2552 <td valign="top" >Connector</td>
2553 <td valign="top" >Contains DPMS operation mode value.</td>
2554 </tr>
2555 <tr>
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DA
2556 <td valign="top" >“PATH”</td>
2557 <td valign="top" >BLOB | IMMUTABLE</td>
2558 <td valign="top" >0</td>
2559 <td valign="top" >Connector</td>
2560 <td valign="top" >Contains topology path to a connector.</td>
2561 </tr>
2562 <tr>
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DA
2563 <td valign="top" >“TILE”</td>
2564 <td valign="top" >BLOB | IMMUTABLE</td>
2565 <td valign="top" >0</td>
2566 <td valign="top" >Connector</td>
2567 <td valign="top" >Contains tiling information for a connector.</td>
2568 </tr>
2569 <tr>
ae16c597
RC
2570 <td valign="top" >“CRTC_ID”</td>
2571 <td valign="top" >OBJECT</td>
2572 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
2573 <td valign="top" >Connector</td>
2574 <td valign="top" >CRTC that connector is attached to (atomic)</td>
2575 </tr>
2576 <tr>
6b4959f4 2577 <td rowspan="11" valign="top" >Plane</td>
59748616
DL
2578 <td valign="top" >“type”</td>
2579 <td valign="top" >ENUM | IMMUTABLE</td>
2580 <td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
2581 <td valign="top" >Plane</td>
2582 <td valign="top" >Plane type</td>
2583 </tr>
2584 <tr>
6b4959f4
RC
2585 <td valign="top" >“SRC_X”</td>
2586 <td valign="top" >RANGE</td>
2587 <td valign="top" >Min=0, Max=UINT_MAX</td>
2588 <td valign="top" >Plane</td>
2589 <td valign="top" >Scanout source x coordinate in 16.16 fixed point (atomic)</td>
2590 </tr>
2591 <tr>
2592 <td valign="top" >“SRC_Y”</td>
2593 <td valign="top" >RANGE</td>
2594 <td valign="top" >Min=0, Max=UINT_MAX</td>
2595 <td valign="top" >Plane</td>
2596 <td valign="top" >Scanout source y coordinate in 16.16 fixed point (atomic)</td>
2597 </tr>
2598 <tr>
2599 <td valign="top" >“SRC_W”</td>
2600 <td valign="top" >RANGE</td>
2601 <td valign="top" >Min=0, Max=UINT_MAX</td>
2602 <td valign="top" >Plane</td>
2603 <td valign="top" >Scanout source width in 16.16 fixed point (atomic)</td>
2604 </tr>
2605 <tr>
2606 <td valign="top" >“SRC_H”</td>
2607 <td valign="top" >RANGE</td>
2608 <td valign="top" >Min=0, Max=UINT_MAX</td>
2609 <td valign="top" >Plane</td>
2610 <td valign="top" >Scanout source height in 16.16 fixed point (atomic)</td>
2611 </tr>
2612 <tr>
2613 <td valign="top" >“CRTC_X”</td>
2614 <td valign="top" >SIGNED_RANGE</td>
2615 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
2616 <td valign="top" >Plane</td>
2617 <td valign="top" >Scanout CRTC (destination) x coordinate (atomic)</td>
2618 </tr>
2619 <tr>
2620 <td valign="top" >“CRTC_Y”</td>
2621 <td valign="top" >SIGNED_RANGE</td>
2622 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
2623 <td valign="top" >Plane</td>
2624 <td valign="top" >Scanout CRTC (destination) y coordinate (atomic)</td>
2625 </tr>
2626 <tr>
2627 <td valign="top" >“CRTC_W”</td>
2628 <td valign="top" >RANGE</td>
2629 <td valign="top" >Min=0, Max=UINT_MAX</td>
2630 <td valign="top" >Plane</td>
2631 <td valign="top" >Scanout CRTC (destination) width (atomic)</td>
2632 </tr>
2633 <tr>
2634 <td valign="top" >“CRTC_H”</td>
2635 <td valign="top" >RANGE</td>
2636 <td valign="top" >Min=0, Max=UINT_MAX</td>
2637 <td valign="top" >Plane</td>
2638 <td valign="top" >Scanout CRTC (destination) height (atomic)</td>
2639 </tr>
2640 <tr>
2641 <td valign="top" >“FB_ID”</td>
2642 <td valign="top" >OBJECT</td>
2643 <td valign="top" >DRM_MODE_OBJECT_FB</td>
2644 <td valign="top" >Plane</td>
2645 <td valign="top" >Scanout framebuffer (atomic)</td>
2646 </tr>
2647 <tr>
2648 <td valign="top" >“CRTC_ID”</td>
2649 <td valign="top" >OBJECT</td>
2650 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
2651 <td valign="top" >Plane</td>
2652 <td valign="top" >CRTC that plane is attached to (atomic)</td>
2653 </tr>
2654 <tr>
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SK
2655 <td rowspan="2" valign="top" >DVI-I</td>
2656 <td valign="top" >“subconnector”</td>
2657 <td valign="top" >ENUM</td>
2658 <td valign="top" >{ “Unknown”, “DVI-D”, “DVI-A” }</td>
2659 <td valign="top" >Connector</td>
2660 <td valign="top" >TBD</td>
2661 </tr>
2662 <tr>
2663 <td valign="top" >“select subconnector”</td>
2664 <td valign="top" >ENUM</td>
2665 <td valign="top" >{ “Automatic”, “DVI-D”, “DVI-A” }</td>
2666 <td valign="top" >Connector</td>
2667 <td valign="top" >TBD</td>
2668 </tr>
2669 <tr>
2670 <td rowspan="13" valign="top" >TV</td>
2671 <td valign="top" >“subconnector”</td>
2672 <td valign="top" >ENUM</td>
2673 <td valign="top" >{ "Unknown", "Composite", "SVIDEO", "Component", "SCART" }</td>
2674 <td valign="top" >Connector</td>
2675 <td valign="top" >TBD</td>
2676 </tr>
2677 <tr>
2678 <td valign="top" >“select subconnector”</td>
2679 <td valign="top" >ENUM</td>
2680 <td valign="top" >{ "Automatic", "Composite", "SVIDEO", "Component", "SCART" }</td>
2681 <td valign="top" >Connector</td>
2682 <td valign="top" >TBD</td>
2683 </tr>
2684 <tr>
2685 <td valign="top" >“mode”</td>
2686 <td valign="top" >ENUM</td>
2687 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2688 <td valign="top" >Connector</td>
2689 <td valign="top" >TBD</td>
2690 </tr>
2691 <tr>
2692 <td valign="top" >“left margin”</td>
2693 <td valign="top" >RANGE</td>
2694 <td valign="top" >Min=0, Max=100</td>
2695 <td valign="top" >Connector</td>
2696 <td valign="top" >TBD</td>
2697 </tr>
2698 <tr>
2699 <td valign="top" >“right margin”</td>
2700 <td valign="top" >RANGE</td>
2701 <td valign="top" >Min=0, Max=100</td>
2702 <td valign="top" >Connector</td>
2703 <td valign="top" >TBD</td>
2704 </tr>
2705 <tr>
2706 <td valign="top" >“top margin”</td>
2707 <td valign="top" >RANGE</td>
2708 <td valign="top" >Min=0, Max=100</td>
2709 <td valign="top" >Connector</td>
2710 <td valign="top" >TBD</td>
2711 </tr>
2712 <tr>
2713 <td valign="top" >“bottom margin”</td>
2714 <td valign="top" >RANGE</td>
2715 <td valign="top" >Min=0, Max=100</td>
2716 <td valign="top" >Connector</td>
2717 <td valign="top" >TBD</td>
2718 </tr>
2719 <tr>
2720 <td valign="top" >“brightness”</td>
2721 <td valign="top" >RANGE</td>
2722 <td valign="top" >Min=0, Max=100</td>
2723 <td valign="top" >Connector</td>
2724 <td valign="top" >TBD</td>
2725 </tr>
2726 <tr>
2727 <td valign="top" >“contrast”</td>
2728 <td valign="top" >RANGE</td>
2729 <td valign="top" >Min=0, Max=100</td>
2730 <td valign="top" >Connector</td>
2731 <td valign="top" >TBD</td>
2732 </tr>
2733 <tr>
2734 <td valign="top" >“flicker reduction”</td>
2735 <td valign="top" >RANGE</td>
2736 <td valign="top" >Min=0, Max=100</td>
2737 <td valign="top" >Connector</td>
2738 <td valign="top" >TBD</td>
2739 </tr>
2740 <tr>
2741 <td valign="top" >“overscan”</td>
2742 <td valign="top" >RANGE</td>
2743 <td valign="top" >Min=0, Max=100</td>
2744 <td valign="top" >Connector</td>
2745 <td valign="top" >TBD</td>
2746 </tr>
2747 <tr>
2748 <td valign="top" >“saturation”</td>
2749 <td valign="top" >RANGE</td>
2750 <td valign="top" >Min=0, Max=100</td>
2751 <td valign="top" >Connector</td>
2752 <td valign="top" >TBD</td>
2753 </tr>
2754 <tr>
2755 <td valign="top" >“hue”</td>
2756 <td valign="top" >RANGE</td>
2757 <td valign="top" >Min=0, Max=100</td>
2758 <td valign="top" >Connector</td>
2759 <td valign="top" >TBD</td>
2760 </tr>
2761 <tr>
5bb2bbf5
DA
2762 <td rowspan="2" valign="top" >Virtual GPU</td>
2763 <td valign="top" >“suggested X”</td>
2764 <td valign="top" >RANGE</td>
2765 <td valign="top" >Min=0, Max=0xffffffff</td>
2766 <td valign="top" >Connector</td>
2767 <td valign="top" >property to suggest an X offset for a connector</td>
2768 </tr>
2769 <tr>
2770 <td valign="top" >“suggested Y”</td>
2771 <td valign="top" >RANGE</td>
2772 <td valign="top" >Min=0, Max=0xffffffff</td>
2773 <td valign="top" >Connector</td>
2774 <td valign="top" >property to suggest an Y offset for a connector</td>
2775 </tr>
2776 <tr>
726a280d 2777 <td rowspan="3" valign="top" >Optional</td>
6c6a3996
SK
2778 <td valign="top" >“scaling mode”</td>
2779 <td valign="top" >ENUM</td>
2780 <td valign="top" >{ "None", "Full", "Center", "Full aspect" }</td>
2781 <td valign="top" >Connector</td>
2782 <td valign="top" >TBD</td>
2783 </tr>
2784 <tr>
726a280d
VK
2785 <td valign="top" >"aspect ratio"</td>
2786 <td valign="top" >ENUM</td>
2787 <td valign="top" >{ "None", "4:3", "16:9" }</td>
2788 <td valign="top" >Connector</td>
2789 <td valign="top" >DRM property to set aspect ratio from user space app.
2790 This enum is made generic to allow addition of custom aspect
2791 ratios.</td>
2792 </tr>
2793 <tr>
6c6a3996
SK
2794 <td valign="top" >“dirty”</td>
2795 <td valign="top" >ENUM | IMMUTABLE</td>
2796 <td valign="top" >{ "Off", "On", "Annotate" }</td>
2797 <td valign="top" >Connector</td>
2798 <td valign="top" >TBD</td>
2799 </tr>
2800 <tr>
712a0dd9 2801 <td rowspan="20" valign="top" >i915</td>
4ba08faa 2802 <td rowspan="2" valign="top" >Generic</td>
6c6a3996
SK
2803 <td valign="top" >"Broadcast RGB"</td>
2804 <td valign="top" >ENUM</td>
2805 <td valign="top" >{ "Automatic", "Full", "Limited 16:235" }</td>
2806 <td valign="top" >Connector</td>
2807 <td valign="top" >TBD</td>
2808 </tr>
2809 <tr>
2810 <td valign="top" >“audio”</td>
2811 <td valign="top" >ENUM</td>
2812 <td valign="top" >{ "force-dvi", "off", "auto", "on" }</td>
2813 <td valign="top" >Connector</td>
2814 <td valign="top" >TBD</td>
2815 </tr>
2816 <tr>
6c6a3996
SK
2817 <td rowspan="17" valign="top" >SDVO-TV</td>
2818 <td valign="top" >“mode”</td>
2819 <td valign="top" >ENUM</td>
2820 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2821 <td valign="top" >Connector</td>
2822 <td valign="top" >TBD</td>
2823 </tr>
2824 <tr>
2825 <td valign="top" >"left_margin"</td>
2826 <td valign="top" >RANGE</td>
2827 <td valign="top" >Min=0, Max= SDVO dependent</td>
2828 <td valign="top" >Connector</td>
2829 <td valign="top" >TBD</td>
2830 </tr>
2831 <tr>
2832 <td valign="top" >"right_margin"</td>
2833 <td valign="top" >RANGE</td>
2834 <td valign="top" >Min=0, Max= SDVO dependent</td>
2835 <td valign="top" >Connector</td>
2836 <td valign="top" >TBD</td>
2837 </tr>
2838 <tr>
2839 <td valign="top" >"top_margin"</td>
2840 <td valign="top" >RANGE</td>
2841 <td valign="top" >Min=0, Max= SDVO dependent</td>
2842 <td valign="top" >Connector</td>
2843 <td valign="top" >TBD</td>
2844 </tr>
2845 <tr>
2846 <td valign="top" >"bottom_margin"</td>
2847 <td valign="top" >RANGE</td>
2848 <td valign="top" >Min=0, Max= SDVO dependent</td>
2849 <td valign="top" >Connector</td>
2850 <td valign="top" >TBD</td>
2851 </tr>
2852 <tr>
2853 <td valign="top" >“hpos”</td>
2854 <td valign="top" >RANGE</td>
2855 <td valign="top" >Min=0, Max= SDVO dependent</td>
2856 <td valign="top" >Connector</td>
2857 <td valign="top" >TBD</td>
2858 </tr>
2859 <tr>
2860 <td valign="top" >“vpos”</td>
2861 <td valign="top" >RANGE</td>
2862 <td valign="top" >Min=0, Max= SDVO dependent</td>
2863 <td valign="top" >Connector</td>
2864 <td valign="top" >TBD</td>
2865 </tr>
2866 <tr>
2867 <td valign="top" >“contrast”</td>
2868 <td valign="top" >RANGE</td>
2869 <td valign="top" >Min=0, Max= SDVO dependent</td>
2870 <td valign="top" >Connector</td>
2871 <td valign="top" >TBD</td>
2872 </tr>
2873 <tr>
2874 <td valign="top" >“saturation”</td>
2875 <td valign="top" >RANGE</td>
2876 <td valign="top" >Min=0, Max= SDVO dependent</td>
2877 <td valign="top" >Connector</td>
2878 <td valign="top" >TBD</td>
2879 </tr>
2880 <tr>
2881 <td valign="top" >“hue”</td>
2882 <td valign="top" >RANGE</td>
2883 <td valign="top" >Min=0, Max= SDVO dependent</td>
2884 <td valign="top" >Connector</td>
2885 <td valign="top" >TBD</td>
2886 </tr>
2887 <tr>
2888 <td valign="top" >“sharpness”</td>
2889 <td valign="top" >RANGE</td>
2890 <td valign="top" >Min=0, Max= SDVO dependent</td>
2891 <td valign="top" >Connector</td>
2892 <td valign="top" >TBD</td>
2893 </tr>
2894 <tr>
2895 <td valign="top" >“flicker_filter”</td>
2896 <td valign="top" >RANGE</td>
2897 <td valign="top" >Min=0, Max= SDVO dependent</td>
2898 <td valign="top" >Connector</td>
2899 <td valign="top" >TBD</td>
2900 </tr>
2901 <tr>
2902 <td valign="top" >“flicker_filter_adaptive”</td>
2903 <td valign="top" >RANGE</td>
2904 <td valign="top" >Min=0, Max= SDVO dependent</td>
2905 <td valign="top" >Connector</td>
2906 <td valign="top" >TBD</td>
2907 </tr>
2908 <tr>
2909 <td valign="top" >“flicker_filter_2d”</td>
2910 <td valign="top" >RANGE</td>
2911 <td valign="top" >Min=0, Max= SDVO dependent</td>
2912 <td valign="top" >Connector</td>
2913 <td valign="top" >TBD</td>
2914 </tr>
2915 <tr>
2916 <td valign="top" >“tv_chroma_filter”</td>
2917 <td valign="top" >RANGE</td>
2918 <td valign="top" >Min=0, Max= SDVO dependent</td>
2919 <td valign="top" >Connector</td>
2920 <td valign="top" >TBD</td>
2921 </tr>
2922 <tr>
2923 <td valign="top" >“tv_luma_filter”</td>
2924 <td valign="top" >RANGE</td>
2925 <td valign="top" >Min=0, Max= SDVO dependent</td>
2926 <td valign="top" >Connector</td>
2927 <td valign="top" >TBD</td>
2928 </tr>
2929 <tr>
2930 <td valign="top" >“dot_crawl”</td>
2931 <td valign="top" >RANGE</td>
2932 <td valign="top" >Min=0, Max=1</td>
2933 <td valign="top" >Connector</td>
2934 <td valign="top" >TBD</td>
2935 </tr>
2936 <tr>
2937 <td valign="top" >SDVO-TV/LVDS</td>
2938 <td valign="top" >“brightness”</td>
2939 <td valign="top" >RANGE</td>
2940 <td valign="top" >Min=0, Max= SDVO dependent</td>
2941 <td valign="top" >Connector</td>
2942 <td valign="top" >TBD</td>
2943 </tr>
2944 <tr>
4ba08faa
SK
2945 <td rowspan="2" valign="top" >CDV gma-500</td>
2946 <td rowspan="2" valign="top" >Generic</td>
6c6a3996
SK
2947 <td valign="top" >"Broadcast RGB"</td>
2948 <td valign="top" >ENUM</td>
2949 <td valign="top" >{ “Full”, “Limited 16:235” }</td>
2950 <td valign="top" >Connector</td>
2951 <td valign="top" >TBD</td>
2952 </tr>
2953 <tr>
2954 <td valign="top" >"Broadcast RGB"</td>
2955 <td valign="top" >ENUM</td>
2956 <td valign="top" >{ “off”, “auto”, “on” }</td>
2957 <td valign="top" >Connector</td>
2958 <td valign="top" >TBD</td>
2959 </tr>
2960 <tr>
4ba08faa
SK
2961 <td rowspan="19" valign="top" >Poulsbo</td>
2962 <td rowspan="1" valign="top" >Generic</td>
6c6a3996
SK
2963 <td valign="top" >“backlight”</td>
2964 <td valign="top" >RANGE</td>
2965 <td valign="top" >Min=0, Max=100</td>
2966 <td valign="top" >Connector</td>
2967 <td valign="top" >TBD</td>
2968 </tr>
2969 <tr>
6c6a3996
SK
2970 <td rowspan="17" valign="top" >SDVO-TV</td>
2971 <td valign="top" >“mode”</td>
2972 <td valign="top" >ENUM</td>
2973 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2974 <td valign="top" >Connector</td>
2975 <td valign="top" >TBD</td>
2976 </tr>
2977 <tr>
2978 <td valign="top" >"left_margin"</td>
2979 <td valign="top" >RANGE</td>
2980 <td valign="top" >Min=0, Max= SDVO dependent</td>
2981 <td valign="top" >Connector</td>
2982 <td valign="top" >TBD</td>
2983 </tr>
2984 <tr>
2985 <td valign="top" >"right_margin"</td>
2986 <td valign="top" >RANGE</td>
2987 <td valign="top" >Min=0, Max= SDVO dependent</td>
2988 <td valign="top" >Connector</td>
2989 <td valign="top" >TBD</td>
2990 </tr>
2991 <tr>
2992 <td valign="top" >"top_margin"</td>
2993 <td valign="top" >RANGE</td>
2994 <td valign="top" >Min=0, Max= SDVO dependent</td>
2995 <td valign="top" >Connector</td>
2996 <td valign="top" >TBD</td>
2997 </tr>
2998 <tr>
2999 <td valign="top" >"bottom_margin"</td>
3000 <td valign="top" >RANGE</td>
3001 <td valign="top" >Min=0, Max= SDVO dependent</td>
3002 <td valign="top" >Connector</td>
3003 <td valign="top" >TBD</td>
3004 </tr>
3005 <tr>
3006 <td valign="top" >“hpos”</td>
3007 <td valign="top" >RANGE</td>
3008 <td valign="top" >Min=0, Max= SDVO dependent</td>
3009 <td valign="top" >Connector</td>
3010 <td valign="top" >TBD</td>
3011 </tr>
3012 <tr>
3013 <td valign="top" >“vpos”</td>
3014 <td valign="top" >RANGE</td>
3015 <td valign="top" >Min=0, Max= SDVO dependent</td>
3016 <td valign="top" >Connector</td>
3017 <td valign="top" >TBD</td>
3018 </tr>
3019 <tr>
3020 <td valign="top" >“contrast”</td>
3021 <td valign="top" >RANGE</td>
3022 <td valign="top" >Min=0, Max= SDVO dependent</td>
3023 <td valign="top" >Connector</td>
3024 <td valign="top" >TBD</td>
3025 </tr>
3026 <tr>
3027 <td valign="top" >“saturation”</td>
3028 <td valign="top" >RANGE</td>
3029 <td valign="top" >Min=0, Max= SDVO dependent</td>
3030 <td valign="top" >Connector</td>
3031 <td valign="top" >TBD</td>
3032 </tr>
3033 <tr>
3034 <td valign="top" >“hue”</td>
3035 <td valign="top" >RANGE</td>
3036 <td valign="top" >Min=0, Max= SDVO dependent</td>
3037 <td valign="top" >Connector</td>
3038 <td valign="top" >TBD</td>
3039 </tr>
3040 <tr>
3041 <td valign="top" >“sharpness”</td>
3042 <td valign="top" >RANGE</td>
3043 <td valign="top" >Min=0, Max= SDVO dependent</td>
3044 <td valign="top" >Connector</td>
3045 <td valign="top" >TBD</td>
3046 </tr>
3047 <tr>
3048 <td valign="top" >“flicker_filter”</td>
3049 <td valign="top" >RANGE</td>
3050 <td valign="top" >Min=0, Max= SDVO dependent</td>
3051 <td valign="top" >Connector</td>
3052 <td valign="top" >TBD</td>
3053 </tr>
3054 <tr>
3055 <td valign="top" >“flicker_filter_adaptive”</td>
3056 <td valign="top" >RANGE</td>
3057 <td valign="top" >Min=0, Max= SDVO dependent</td>
3058 <td valign="top" >Connector</td>
3059 <td valign="top" >TBD</td>
3060 </tr>
3061 <tr>
3062 <td valign="top" >“flicker_filter_2d”</td>
3063 <td valign="top" >RANGE</td>
3064 <td valign="top" >Min=0, Max= SDVO dependent</td>
3065 <td valign="top" >Connector</td>
3066 <td valign="top" >TBD</td>
3067 </tr>
3068 <tr>
3069 <td valign="top" >“tv_chroma_filter”</td>
3070 <td valign="top" >RANGE</td>
3071 <td valign="top" >Min=0, Max= SDVO dependent</td>
3072 <td valign="top" >Connector</td>
3073 <td valign="top" >TBD</td>
3074 </tr>
3075 <tr>
3076 <td valign="top" >“tv_luma_filter”</td>
3077 <td valign="top" >RANGE</td>
3078 <td valign="top" >Min=0, Max= SDVO dependent</td>
3079 <td valign="top" >Connector</td>
3080 <td valign="top" >TBD</td>
3081 </tr>
3082 <tr>
3083 <td valign="top" >“dot_crawl”</td>
3084 <td valign="top" >RANGE</td>
3085 <td valign="top" >Min=0, Max=1</td>
3086 <td valign="top" >Connector</td>
3087 <td valign="top" >TBD</td>
3088 </tr>
3089 <tr>
3090 <td valign="top" >SDVO-TV/LVDS</td>
3091 <td valign="top" >“brightness”</td>
3092 <td valign="top" >RANGE</td>
3093 <td valign="top" >Min=0, Max= SDVO dependent</td>
3094 <td valign="top" >Connector</td>
3095 <td valign="top" >TBD</td>
3096 </tr>
3097 <tr>
3098 <td rowspan="11" valign="top" >armada</td>
3099 <td rowspan="2" valign="top" >CRTC</td>
3100 <td valign="top" >"CSC_YUV"</td>
3101 <td valign="top" >ENUM</td>
3102 <td valign="top" >{ "Auto" , "CCIR601", "CCIR709" }</td>
3103 <td valign="top" >CRTC</td>
3104 <td valign="top" >TBD</td>
3105 </tr>
3106 <tr>
3107 <td valign="top" >"CSC_RGB"</td>
3108 <td valign="top" >ENUM</td>
3109 <td valign="top" >{ "Auto", "Computer system", "Studio" }</td>
3110 <td valign="top" >CRTC</td>
3111 <td valign="top" >TBD</td>
3112 </tr>
3113 <tr>
3114 <td rowspan="9" valign="top" >Overlay</td>
3115 <td valign="top" >"colorkey"</td>
3116 <td valign="top" >RANGE</td>
3117 <td valign="top" >Min=0, Max=0xffffff</td>
3118 <td valign="top" >Plane</td>
3119 <td valign="top" >TBD</td>
3120 </tr>
3121 <tr>
3122 <td valign="top" >"colorkey_min"</td>
3123 <td valign="top" >RANGE</td>
3124 <td valign="top" >Min=0, Max=0xffffff</td>
3125 <td valign="top" >Plane</td>
3126 <td valign="top" >TBD</td>
3127 </tr>
3128 <tr>
3129 <td valign="top" >"colorkey_max"</td>
3130 <td valign="top" >RANGE</td>
3131 <td valign="top" >Min=0, Max=0xffffff</td>
3132 <td valign="top" >Plane</td>
3133 <td valign="top" >TBD</td>
3134 </tr>
3135 <tr>
3136 <td valign="top" >"colorkey_val"</td>
3137 <td valign="top" >RANGE</td>
3138 <td valign="top" >Min=0, Max=0xffffff</td>
3139 <td valign="top" >Plane</td>
3140 <td valign="top" >TBD</td>
3141 </tr>
3142 <tr>
3143 <td valign="top" >"colorkey_alpha"</td>
3144 <td valign="top" >RANGE</td>
3145 <td valign="top" >Min=0, Max=0xffffff</td>
3146 <td valign="top" >Plane</td>
3147 <td valign="top" >TBD</td>
3148 </tr>
3149 <tr>
3150 <td valign="top" >"colorkey_mode"</td>
3151 <td valign="top" >ENUM</td>
3152 <td valign="top" >{ "disabled", "Y component", "U component"
3153 , "V component", "RGB", “R component", "G component", "B component" }</td>
3154 <td valign="top" >Plane</td>
3155 <td valign="top" >TBD</td>
3156 </tr>
3157 <tr>
3158 <td valign="top" >"brightness"</td>
3159 <td valign="top" >RANGE</td>
3160 <td valign="top" >Min=0, Max=256 + 255</td>
3161 <td valign="top" >Plane</td>
3162 <td valign="top" >TBD</td>
3163 </tr>
3164 <tr>
3165 <td valign="top" >"contrast"</td>
3166 <td valign="top" >RANGE</td>
3167 <td valign="top" >Min=0, Max=0x7fff</td>
3168 <td valign="top" >Plane</td>
3169 <td valign="top" >TBD</td>
3170 </tr>
3171 <tr>
3172 <td valign="top" >"saturation"</td>
3173 <td valign="top" >RANGE</td>
3174 <td valign="top" >Min=0, Max=0x7fff</td>
3175 <td valign="top" >Plane</td>
3176 <td valign="top" >TBD</td>
3177 </tr>
3178 <tr>
3179 <td rowspan="2" valign="top" >exynos</td>
3180 <td valign="top" >CRTC</td>
3181 <td valign="top" >“mode”</td>
3182 <td valign="top" >ENUM</td>
3183 <td valign="top" >{ "normal", "blank" }</td>
3184 <td valign="top" >CRTC</td>
3185 <td valign="top" >TBD</td>
3186 </tr>
3187 <tr>
3188 <td valign="top" >Overlay</td>
3189 <td valign="top" >“zpos”</td>
3190 <td valign="top" >RANGE</td>
3191 <td valign="top" >Min=0, Max=MAX_PLANE-1</td>
3192 <td valign="top" >Plane</td>
3193 <td valign="top" >TBD</td>
3194 </tr>
3195 <tr>
4ba08faa 3196 <td rowspan="2" valign="top" >i2c/ch7006_drv</td>
6c6a3996
SK
3197 <td valign="top" >Generic</td>
3198 <td valign="top" >“scale”</td>
3199 <td valign="top" >RANGE</td>
3200 <td valign="top" >Min=0, Max=2</td>
3201 <td valign="top" >Connector</td>
3202 <td valign="top" >TBD</td>
3203 </tr>
3204 <tr>
4ba08faa 3205 <td rowspan="1" valign="top" >TV</td>
6c6a3996
SK
3206 <td valign="top" >“mode”</td>
3207 <td valign="top" >ENUM</td>
3208 <td valign="top" >{ "PAL", "PAL-M","PAL-N"}, ”PAL-Nc"
3209 , "PAL-60", "NTSC-M", "NTSC-J" }</td>
3210 <td valign="top" >Connector</td>
3211 <td valign="top" >TBD</td>
3212 </tr>
3213 <tr>
4ba08faa 3214 <td rowspan="15" valign="top" >nouveau</td>
6c6a3996
SK
3215 <td rowspan="6" valign="top" >NV10 Overlay</td>
3216 <td valign="top" >"colorkey"</td>
3217 <td valign="top" >RANGE</td>
3218 <td valign="top" >Min=0, Max=0x01ffffff</td>
3219 <td valign="top" >Plane</td>
3220 <td valign="top" >TBD</td>
3221 </tr>
3222 <tr>
3223 <td valign="top" >“contrast”</td>
3224 <td valign="top" >RANGE</td>
3225 <td valign="top" >Min=0, Max=8192-1</td>
3226 <td valign="top" >Plane</td>
3227 <td valign="top" >TBD</td>
3228 </tr>
3229 <tr>
3230 <td valign="top" >“brightness”</td>
3231 <td valign="top" >RANGE</td>
3232 <td valign="top" >Min=0, Max=1024</td>
3233 <td valign="top" >Plane</td>
3234 <td valign="top" >TBD</td>
3235 </tr>
3236 <tr>
3237 <td valign="top" >“hue”</td>
3238 <td valign="top" >RANGE</td>
3239 <td valign="top" >Min=0, Max=359</td>
3240 <td valign="top" >Plane</td>
3241 <td valign="top" >TBD</td>
3242 </tr>
3243 <tr>
3244 <td valign="top" >“saturation”</td>
3245 <td valign="top" >RANGE</td>
3246 <td valign="top" >Min=0, Max=8192-1</td>
3247 <td valign="top" >Plane</td>
3248 <td valign="top" >TBD</td>
3249 </tr>
3250 <tr>
3251 <td valign="top" >“iturbt_709”</td>
3252 <td valign="top" >RANGE</td>
3253 <td valign="top" >Min=0, Max=1</td>
3254 <td valign="top" >Plane</td>
3255 <td valign="top" >TBD</td>
3256 </tr>
3257 <tr>
3258 <td rowspan="2" valign="top" >Nv04 Overlay</td>
3259 <td valign="top" >“colorkey”</td>
3260 <td valign="top" >RANGE</td>
3261 <td valign="top" >Min=0, Max=0x01ffffff</td>
3262 <td valign="top" >Plane</td>
3263 <td valign="top" >TBD</td>
3264 </tr>
3265 <tr>
3266 <td valign="top" >“brightness”</td>
3267 <td valign="top" >RANGE</td>
3268 <td valign="top" >Min=0, Max=1024</td>
3269 <td valign="top" >Plane</td>
3270 <td valign="top" >TBD</td>
3271 </tr>
3272 <tr>
3273 <td rowspan="7" valign="top" >Display</td>
3274 <td valign="top" >“dithering mode”</td>
3275 <td valign="top" >ENUM</td>
3276 <td valign="top" >{ "auto", "off", "on" }</td>
3277 <td valign="top" >Connector</td>
3278 <td valign="top" >TBD</td>
3279 </tr>
3280 <tr>
3281 <td valign="top" >“dithering depth”</td>
3282 <td valign="top" >ENUM</td>
3283 <td valign="top" >{ "auto", "off", "on", "static 2x2", "dynamic 2x2", "temporal" }</td>
3284 <td valign="top" >Connector</td>
3285 <td valign="top" >TBD</td>
3286 </tr>
3287 <tr>
3288 <td valign="top" >“underscan”</td>
3289 <td valign="top" >ENUM</td>
3290 <td valign="top" >{ "auto", "6 bpc", "8 bpc" }</td>
3291 <td valign="top" >Connector</td>
3292 <td valign="top" >TBD</td>
3293 </tr>
3294 <tr>
3295 <td valign="top" >“underscan hborder”</td>
3296 <td valign="top" >RANGE</td>
3297 <td valign="top" >Min=0, Max=128</td>
3298 <td valign="top" >Connector</td>
3299 <td valign="top" >TBD</td>
3300 </tr>
3301 <tr>
3302 <td valign="top" >“underscan vborder”</td>
3303 <td valign="top" >RANGE</td>
3304 <td valign="top" >Min=0, Max=128</td>
3305 <td valign="top" >Connector</td>
3306 <td valign="top" >TBD</td>
3307 </tr>
3308 <tr>
3309 <td valign="top" >“vibrant hue”</td>
3310 <td valign="top" >RANGE</td>
3311 <td valign="top" >Min=0, Max=180</td>
3312 <td valign="top" >Connector</td>
3313 <td valign="top" >TBD</td>
3314 </tr>
3315 <tr>
3316 <td valign="top" >“color vibrance”</td>
3317 <td valign="top" >RANGE</td>
3318 <td valign="top" >Min=0, Max=200</td>
3319 <td valign="top" >Connector</td>
3320 <td valign="top" >TBD</td>
3321 </tr>
3322 <tr>
d4acc165 3323 <td valign="top" >omap</td>
712a0dd9 3324 <td valign="top" >Generic</td>
6c6a3996
SK
3325 <td valign="top" >“zorder”</td>
3326 <td valign="top" >RANGE</td>
3327 <td valign="top" >Min=0, Max=3</td>
3328 <td valign="top" >CRTC, Plane</td>
3329 <td valign="top" >TBD</td>
3330 </tr>
3331 <tr>
3332 <td valign="top" >qxl</td>
3333 <td valign="top" >Generic</td>
3334 <td valign="top" >“hotplug_mode_update"</td>
3335 <td valign="top" >RANGE</td>
3336 <td valign="top" >Min=0, Max=1</td>
3337 <td valign="top" >Connector</td>
3338 <td valign="top" >TBD</td>
3339 </tr>
3340 <tr>
4ba08faa 3341 <td rowspan="9" valign="top" >radeon</td>
6c6a3996
SK
3342 <td valign="top" >DVI-I</td>
3343 <td valign="top" >“coherent”</td>
3344 <td valign="top" >RANGE</td>
3345 <td valign="top" >Min=0, Max=1</td>
3346 <td valign="top" >Connector</td>
3347 <td valign="top" >TBD</td>
3348 </tr>
3349 <tr>
3350 <td valign="top" >DAC enable load detect</td>
3351 <td valign="top" >“load detection”</td>
3352 <td valign="top" >RANGE</td>
3353 <td valign="top" >Min=0, Max=1</td>
3354 <td valign="top" >Connector</td>
3355 <td valign="top" >TBD</td>
3356 </tr>
3357 <tr>
3358 <td valign="top" >TV Standard</td>
3359 <td valign="top" >"tv standard"</td>
3360 <td valign="top" >ENUM</td>
3361 <td valign="top" >{ "ntsc", "pal", "pal-m", "pal-60", "ntsc-j"
3362 , "scart-pal", "pal-cn", "secam" }</td>
3363 <td valign="top" >Connector</td>
3364 <td valign="top" >TBD</td>
3365 </tr>
3366 <tr>
3367 <td valign="top" >legacy TMDS PLL detect</td>
3368 <td valign="top" >"tmds_pll"</td>
3369 <td valign="top" >ENUM</td>
3370 <td valign="top" >{ "driver", "bios" }</td>
3371 <td valign="top" >-</td>
3372 <td valign="top" >TBD</td>
3373 </tr>
3374 <tr>
3375 <td rowspan="3" valign="top" >Underscan</td>
3376 <td valign="top" >"underscan"</td>
3377 <td valign="top" >ENUM</td>
3378 <td valign="top" >{ "off", "on", "auto" }</td>
3379 <td valign="top" >Connector</td>
3380 <td valign="top" >TBD</td>
3381 </tr>
3382 <tr>
3383 <td valign="top" >"underscan hborder"</td>
3384 <td valign="top" >RANGE</td>
3385 <td valign="top" >Min=0, Max=128</td>
3386 <td valign="top" >Connector</td>
3387 <td valign="top" >TBD</td>
3388 </tr>
3389 <tr>
3390 <td valign="top" >"underscan vborder"</td>
3391 <td valign="top" >RANGE</td>
3392 <td valign="top" >Min=0, Max=128</td>
3393 <td valign="top" >Connector</td>
3394 <td valign="top" >TBD</td>
3395 </tr>
3396 <tr>
3397 <td valign="top" >Audio</td>
3398 <td valign="top" >“audio”</td>
3399 <td valign="top" >ENUM</td>
3400 <td valign="top" >{ "off", "on", "auto" }</td>
3401 <td valign="top" >Connector</td>
3402 <td valign="top" >TBD</td>
3403 </tr>
3404 <tr>
3405 <td valign="top" >FMT Dithering</td>
3406 <td valign="top" >“dither”</td>
3407 <td valign="top" >ENUM</td>
3408 <td valign="top" >{ "off", "on" }</td>
3409 <td valign="top" >Connector</td>
3410 <td valign="top" >TBD</td>
3411 </tr>
3412 <tr>
6c6a3996
SK
3413 <td rowspan="3" valign="top" >rcar-du</td>
3414 <td rowspan="3" valign="top" >Generic</td>
3415 <td valign="top" >"alpha"</td>
3416 <td valign="top" >RANGE</td>
3417 <td valign="top" >Min=0, Max=255</td>
3418 <td valign="top" >Plane</td>
3419 <td valign="top" >TBD</td>
3420 </tr>
3421 <tr>
3422 <td valign="top" >"colorkey"</td>
3423 <td valign="top" >RANGE</td>
3424 <td valign="top" >Min=0, Max=0x01ffffff</td>
3425 <td valign="top" >Plane</td>
3426 <td valign="top" >TBD</td>
3427 </tr>
3428 <tr>
3429 <td valign="top" >"zpos"</td>
3430 <td valign="top" >RANGE</td>
3431 <td valign="top" >Min=1, Max=7</td>
3432 <td valign="top" >Plane</td>
3433 <td valign="top" >TBD</td>
3434 </tr>
3435 </tbody>
3436 </table>
3437 </sect2>
2d2ef822
JB
3438 </sect1>
3439
9cad9c95
LP
3440 <!-- Internals: vertical blanking -->
3441
3442 <sect1 id="drm-vertical-blank">
3443 <title>Vertical Blanking</title>
3444 <para>
3445 Vertical blanking plays a major role in graphics rendering. To achieve
3446 tear-free display, users must synchronize page flips and/or rendering to
3447 vertical blanking. The DRM API offers ioctls to perform page flips
3448 synchronized to vertical blanking and wait for vertical blanking.
3449 </para>
3450 <para>
3451 The DRM core handles most of the vertical blanking management logic, which
3452 involves filtering out spurious interrupts, keeping race-free blanking
3453 counters, coping with counter wrap-around and resets and keeping use
3454 counts. It relies on the driver to generate vertical blanking interrupts
3455 and optionally provide a hardware vertical blanking counter. Drivers must
3456 implement the following operations.
3457 </para>
3458 <itemizedlist>
3459 <listitem>
3460 <synopsis>int (*enable_vblank) (struct drm_device *dev, int crtc);
3461void (*disable_vblank) (struct drm_device *dev, int crtc);</synopsis>
3462 <para>
3463 Enable or disable vertical blanking interrupts for the given CRTC.
3464 </para>
3465 </listitem>
3466 <listitem>
3467 <synopsis>u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);</synopsis>
3468 <para>
3469 Retrieve the value of the vertical blanking counter for the given
3470 CRTC. If the hardware maintains a vertical blanking counter its value
3471 should be returned. Otherwise drivers can use the
3472 <function>drm_vblank_count</function> helper function to handle this
3473 operation.
3474 </para>
3475 </listitem>
3476 </itemizedlist>
2d2ef822 3477 <para>
9cad9c95
LP
3478 Drivers must initialize the vertical blanking handling core with a call to
3479 <function>drm_vblank_init</function> in their
3480 <methodname>load</methodname> operation. The function will set the struct
3481 <structname>drm_device</structname>
3482 <structfield>vblank_disable_allowed</structfield> field to 0. This will
3483 keep vertical blanking interrupts enabled permanently until the first mode
3484 set operation, where <structfield>vblank_disable_allowed</structfield> is
3485 set to 1. The reason behind this is not clear. Drivers can set the field
3486 to 1 after <function>calling drm_vblank_init</function> to make vertical
3487 blanking interrupts dynamically managed from the beginning.
2d2ef822 3488 </para>
9cad9c95
LP
3489 <para>
3490 Vertical blanking interrupts can be enabled by the DRM core or by drivers
3491 themselves (for instance to handle page flipping operations). The DRM core
3492 maintains a vertical blanking use count to ensure that the interrupts are
3493 not disabled while a user still needs them. To increment the use count,
3494 drivers call <function>drm_vblank_get</function>. Upon return vertical
3495 blanking interrupts are guaranteed to be enabled.
3496 </para>
3497 <para>
3498 To decrement the use count drivers call
3499 <function>drm_vblank_put</function>. Only when the use count drops to zero
3500 will the DRM core disable the vertical blanking interrupts after a delay
3501 by scheduling a timer. The delay is accessible through the vblankoffdelay
3502 module parameter or the <varname>drm_vblank_offdelay</varname> global
3503 variable and expressed in milliseconds. Its default value is 5000 ms.
4ed0ce3d 3504 Zero means never disable, and a negative value means disable immediately.
00185e66
VS
3505 Drivers may override the behaviour by setting the
3506 <structname>drm_device</structname>
3507 <structfield>vblank_disable_immediate</structfield> flag, which when set
3508 causes vblank interrupts to be disabled immediately regardless of the
3509 drm_vblank_offdelay value. The flag should only be set if there's a
3510 properly working hardware vblank counter present.
9cad9c95
LP
3511 </para>
3512 <para>
3513 When a vertical blanking interrupt occurs drivers only need to call the
3514 <function>drm_handle_vblank</function> function to account for the
3515 interrupt.
3516 </para>
3517 <para>
3518 Resources allocated by <function>drm_vblank_init</function> must be freed
3519 with a call to <function>drm_vblank_cleanup</function> in the driver
3520 <methodname>unload</methodname> operation handler.
3521 </para>
f5752b38
DV
3522 <sect2>
3523 <title>Vertical Blanking and Interrupt Handling Functions Reference</title>
3524!Edrivers/gpu/drm/drm_irq.c
d743ecf3 3525!Finclude/drm/drmP.h drm_crtc_vblank_waitqueue
f5752b38 3526 </sect2>
9cad9c95
LP
3527 </sect1>
3528
3529 <!-- Internals: open/close, file operations and ioctls -->
2d2ef822 3530
9cad9c95
LP
3531 <sect1>
3532 <title>Open/Close, File Operations and IOCTLs</title>
2d2ef822 3533 <sect2>
9cad9c95
LP
3534 <title>Open and Close</title>
3535 <synopsis>int (*firstopen) (struct drm_device *);
3536void (*lastclose) (struct drm_device *);
3537int (*open) (struct drm_device *, struct drm_file *);
3538void (*preclose) (struct drm_device *, struct drm_file *);
3539void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
3540 <abstract>Open and close handlers. None of those methods are mandatory.
3541 </abstract>
2d2ef822 3542 <para>
9cad9c95 3543 The <methodname>firstopen</methodname> method is called by the DRM core
7d14bb6b
DV
3544 for legacy UMS (User Mode Setting) drivers only when an application
3545 opens a device that has no other opened file handle. UMS drivers can
3546 implement it to acquire device resources. KMS drivers can't use the
3547 method and must acquire resources in the <methodname>load</methodname>
3548 method instead.
2d2ef822
JB
3549 </para>
3550 <para>
7d14bb6b
DV
3551 Similarly the <methodname>lastclose</methodname> method is called when
3552 the last application holding a file handle opened on the device closes
3553 it, for both UMS and KMS drivers. Additionally, the method is also
3554 called at module unload time or, for hot-pluggable devices, when the
3555 device is unplugged. The <methodname>firstopen</methodname> and
9cad9c95 3556 <methodname>lastclose</methodname> calls can thus be unbalanced.
2d2ef822
JB
3557 </para>
3558 <para>
9cad9c95
LP
3559 The <methodname>open</methodname> method is called every time the device
3560 is opened by an application. Drivers can allocate per-file private data
3561 in this method and store them in the struct
3562 <structname>drm_file</structname> <structfield>driver_priv</structfield>
3563 field. Note that the <methodname>open</methodname> method is called
3564 before <methodname>firstopen</methodname>.
3565 </para>
3566 <para>
3567 The close operation is split into <methodname>preclose</methodname> and
3568 <methodname>postclose</methodname> methods. Drivers must stop and
3569 cleanup all per-file operations in the <methodname>preclose</methodname>
3570 method. For instance pending vertical blanking and page flip events must
3571 be cancelled. No per-file operation is allowed on the file handle after
3572 returning from the <methodname>preclose</methodname> method.
3573 </para>
3574 <para>
3575 Finally the <methodname>postclose</methodname> method is called as the
3576 last step of the close operation, right before calling the
3577 <methodname>lastclose</methodname> method if no other open file handle
3578 exists for the device. Drivers that have allocated per-file private data
3579 in the <methodname>open</methodname> method should free it here.
3580 </para>
3581 <para>
3582 The <methodname>lastclose</methodname> method should restore CRTC and
3583 plane properties to default value, so that a subsequent open of the
7d14bb6b
DV
3584 device will not inherit state from the previous user. It can also be
3585 used to execute delayed power switching state changes, e.g. in
f15a66e6 3586 conjunction with the vga_switcheroo infrastructure. Beyond that KMS
7d14bb6b
DV
3587 drivers should not do any further cleanup. Only legacy UMS drivers might
3588 need to clean up device state so that the vga console or an independent
3589 fbdev driver could take over.
2d2ef822
JB
3590 </para>
3591 </sect2>
2d2ef822 3592 <sect2>
9cad9c95
LP
3593 <title>File Operations</title>
3594 <synopsis>const struct file_operations *fops</synopsis>
3595 <abstract>File operations for the DRM device node.</abstract>
2d2ef822 3596 <para>
9cad9c95
LP
3597 Drivers must define the file operations structure that forms the DRM
3598 userspace API entry point, even though most of those operations are
3599 implemented in the DRM core. The <methodname>open</methodname>,
3600 <methodname>release</methodname> and <methodname>ioctl</methodname>
3601 operations are handled by
3602 <programlisting>
3603 .owner = THIS_MODULE,
3604 .open = drm_open,
3605 .release = drm_release,
3606 .unlocked_ioctl = drm_ioctl,
3607 #ifdef CONFIG_COMPAT
3608 .compat_ioctl = drm_compat_ioctl,
3609 #endif
3610 </programlisting>
2d2ef822
JB
3611 </para>
3612 <para>
9cad9c95
LP
3613 Drivers that implement private ioctls that requires 32/64bit
3614 compatibility support must provide their own
3615 <methodname>compat_ioctl</methodname> handler that processes private
3616 ioctls and calls <function>drm_compat_ioctl</function> for core ioctls.
2d2ef822
JB
3617 </para>
3618 <para>
9cad9c95
LP
3619 The <methodname>read</methodname> and <methodname>poll</methodname>
3620 operations provide support for reading DRM events and polling them. They
3621 are implemented by
3622 <programlisting>
3623 .poll = drm_poll,
3624 .read = drm_read,
9cad9c95
LP
3625 .llseek = no_llseek,
3626 </programlisting>
3627 </para>
3628 <para>
3629 The memory mapping implementation varies depending on how the driver
3630 manages memory. Pre-GEM drivers will use <function>drm_mmap</function>,
3631 while GEM-aware drivers will use <function>drm_gem_mmap</function>. See
3632 <xref linkend="drm-gem"/>.
3633 <programlisting>
3634 .mmap = drm_gem_mmap,
3635 </programlisting>
3636 </para>
3637 <para>
3638 No other file operation is supported by the DRM API.
3639 </para>
3640 </sect2>
3641 <sect2>
3642 <title>IOCTLs</title>
3643 <synopsis>struct drm_ioctl_desc *ioctls;
3644int num_ioctls;</synopsis>
3645 <abstract>Driver-specific ioctls descriptors table.</abstract>
3646 <para>
3647 Driver-specific ioctls numbers start at DRM_COMMAND_BASE. The ioctls
3648 descriptors table is indexed by the ioctl number offset from the base
3649 value. Drivers can use the DRM_IOCTL_DEF_DRV() macro to initialize the
3650 table entries.
3651 </para>
3652 <para>
3653 <programlisting>DRM_IOCTL_DEF_DRV(ioctl, func, flags)</programlisting>
3654 <para>
3655 <parameter>ioctl</parameter> is the ioctl name. Drivers must define
3656 the DRM_##ioctl and DRM_IOCTL_##ioctl macros to the ioctl number
3657 offset from DRM_COMMAND_BASE and the ioctl number respectively. The
3658 first macro is private to the device while the second must be exposed
3659 to userspace in a public header.
3660 </para>
3661 <para>
3662 <parameter>func</parameter> is a pointer to the ioctl handler function
3663 compatible with the <type>drm_ioctl_t</type> type.
3664 <programlisting>typedef int drm_ioctl_t(struct drm_device *dev, void *data,
3665 struct drm_file *file_priv);</programlisting>
3666 </para>
3667 <para>
3668 <parameter>flags</parameter> is a bitmask combination of the following
3669 values. It restricts how the ioctl is allowed to be called.
3670 <itemizedlist>
3671 <listitem><para>
3672 DRM_AUTH - Only authenticated callers allowed
3673 </para></listitem>
3674 <listitem><para>
3675 DRM_MASTER - The ioctl can only be called on the master file
3676 handle
3677 </para></listitem>
3678 <listitem><para>
3679 DRM_ROOT_ONLY - Only callers with the SYSADMIN capability allowed
3680 </para></listitem>
3681 <listitem><para>
3682 DRM_CONTROL_ALLOW - The ioctl can only be called on a control
3683 device
3684 </para></listitem>
3685 <listitem><para>
3686 DRM_UNLOCKED - The ioctl handler will be called without locking
ea487835
DV
3687 the DRM global mutex. This is the enforced default for kms drivers
3688 (i.e. using the DRIVER_MODESET flag) and hence shouldn't be used
3689 any more for new drivers.
9cad9c95
LP
3690 </para></listitem>
3691 </itemizedlist>
3692 </para>
2d2ef822 3693 </para>
0aaf20cf 3694!Edrivers/gpu/drm/drm_ioctl.c
2d2ef822 3695 </sect2>
2d2ef822 3696 </sect1>
2d2ef822 3697 <sect1>
4c6e2dfe 3698 <title>Legacy Support Code</title>
2d2ef822 3699 <para>
9a6594fc 3700 The section very briefly covers some of the old legacy support code which
4c6e2dfe
DV
3701 is only used by old DRM drivers which have done a so-called shadow-attach
3702 to the underlying device instead of registering as a real driver. This
9a6594fc 3703 also includes some of the old generic buffer management and command
4c6e2dfe 3704 submission code. Do not use any of this in new and modern drivers.
2d2ef822 3705 </para>
2d2ef822 3706
4c6e2dfe
DV
3707 <sect2>
3708 <title>Legacy Suspend/Resume</title>
3709 <para>
3710 The DRM core provides some suspend/resume code, but drivers wanting full
3711 suspend/resume support should provide save() and restore() functions.
3712 These are called at suspend, hibernate, or resume time, and should perform
3713 any state save or restore required by your device across suspend or
3714 hibernate states.
3715 </para>
3716 <synopsis>int (*suspend) (struct drm_device *, pm_message_t state);
3717 int (*resume) (struct drm_device *);</synopsis>
3718 <para>
3719 Those are legacy suspend and resume methods which
3720 <emphasis>only</emphasis> work with the legacy shadow-attach driver
3721 registration functions. New driver should use the power management
3722 interface provided by their bus type (usually through
3723 the struct <structname>device_driver</structname> dev_pm_ops) and set
3724 these methods to NULL.
3725 </para>
3726 </sect2>
3727
3728 <sect2>
3729 <title>Legacy DMA Services</title>
3730 <para>
3731 This should cover how DMA mapping etc. is supported by the core.
3732 These functions are deprecated and should not be used.
3733 </para>
3734 </sect2>
2d2ef822
JB
3735 </sect1>
3736 </chapter>
3737
9cad9c95
LP
3738<!-- TODO
3739
3740- Add a glossary
3741- Document the struct_mutex catch-all lock
3742- Document connector properties
3743
3744- Why is the load method optional?
3745- What are drivers supposed to set the initial display state to, and how?
3746 Connector's DPMS states are not initialized and are thus equal to
3747 DRM_MODE_DPMS_ON. The fbcon compatibility layer calls
3748 drm_helper_disable_unused_functions(), which disables unused encoders and
3749 CRTCs, but doesn't touch the connectors' DPMS state, and
3750 drm_helper_connector_dpms() in reaction to fbdev blanking events. Do drivers
3751 that don't implement (or just don't use) fbcon compatibility need to call
3752 those functions themselves?
3753- KMS drivers must call drm_vblank_pre_modeset() and drm_vblank_post_modeset()
3754 around mode setting. Should this be done in the DRM core?
3755- vblank_disable_allowed is set to 1 in the first drm_vblank_post_modeset()
3756 call and never set back to 0. It seems to be safe to permanently set it to 1
3757 in drm_vblank_init() for KMS driver, and it might be safe for UMS drivers as
3758 well. This should be investigated.
3759- crtc and connector .save and .restore operations are only used internally in
3760 drivers, should they be removed from the core?
3761- encoder mid-layer .save and .restore operations are only used internally in
3762 drivers, should they be removed from the core?
3763- encoder mid-layer .detect operation is only used internally in drivers,
3764 should it be removed from the core?
3765-->
3766
2d2ef822
JB
3767 <!-- External interfaces -->
3768
3769 <chapter id="drmExternals">
3770 <title>Userland interfaces</title>
3771 <para>
3772 The DRM core exports several interfaces to applications,
3773 generally intended to be used through corresponding libdrm
a5294e01 3774 wrapper functions. In addition, drivers export device-specific
7f0925ac 3775 interfaces for use by userspace drivers &amp; device-aware
2d2ef822
JB
3776 applications through ioctls and sysfs files.
3777 </para>
3778 <para>
3779 External interfaces include: memory mapping, context management,
3780 DMA operations, AGP management, vblank control, fence
3781 management, memory management, and output management.
3782 </para>
3783 <para>
bcd3cfc1
MW
3784 Cover generic ioctls and sysfs layout here. We only need high-level
3785 info, since man pages should cover the rest.
2d2ef822 3786 </para>
9cad9c95 3787
1793126f
DH
3788 <!-- External: render nodes -->
3789
3790 <sect1>
3791 <title>Render nodes</title>
3792 <para>
3793 DRM core provides multiple character-devices for user-space to use.
3794 Depending on which device is opened, user-space can perform a different
3795 set of operations (mainly ioctls). The primary node is always created
00153aeb
DV
3796 and called card&lt;num&gt;. Additionally, a currently
3797 unused control node, called controlD&lt;num&gt; is also
1793126f
DH
3798 created. The primary node provides all legacy operations and
3799 historically was the only interface used by userspace. With KMS, the
3800 control node was introduced. However, the planned KMS control interface
3801 has never been written and so the control node stays unused to date.
3802 </para>
3803 <para>
3804 With the increased use of offscreen renderers and GPGPU applications,
3805 clients no longer require running compositors or graphics servers to
3806 make use of a GPU. But the DRM API required unprivileged clients to
3807 authenticate to a DRM-Master prior to getting GPU access. To avoid this
3808 step and to grant clients GPU access without authenticating, render
3809 nodes were introduced. Render nodes solely serve render clients, that
3810 is, no modesetting or privileged ioctls can be issued on render nodes.
3811 Only non-global rendering commands are allowed. If a driver supports
00153aeb 3812 render nodes, it must advertise it via the DRIVER_RENDER
1793126f
DH
3813 DRM driver capability. If not supported, the primary node must be used
3814 for render clients together with the legacy drmAuth authentication
3815 procedure.
3816 </para>
3817 <para>
3818 If a driver advertises render node support, DRM core will create a
00153aeb 3819 separate render node called renderD&lt;num&gt;. There will
1793126f 3820 be one render node per device. No ioctls except PRIME-related ioctls
00153aeb 3821 will be allowed on this node. Especially GEM_OPEN will be
1793126f
DH
3822 explicitly prohibited. Render nodes are designed to avoid the
3823 buffer-leaks, which occur if clients guess the flink names or mmap
3824 offsets on the legacy interface. Additionally to this basic interface,
3825 drivers must mark their driver-dependent render-only ioctls as
00153aeb 3826 DRM_RENDER_ALLOW so render clients can use them. Driver
1793126f
DH
3827 authors must be careful not to allow any privileged ioctls on render
3828 nodes.
3829 </para>
3830 <para>
3831 With render nodes, user-space can now control access to the render node
3832 via basic file-system access-modes. A running graphics server which
3833 authenticates clients on the privileged primary/legacy node is no longer
3834 required. Instead, a client can open the render node and is immediately
3835 granted GPU access. Communication between clients (or servers) is done
3836 via PRIME. FLINK from render node to legacy node is not supported. New
3837 clients must not use the insecure FLINK interface.
3838 </para>
3839 <para>
3840 Besides dropping all modeset/global ioctls, render nodes also drop the
3841 DRM-Master concept. There is no reason to associate render clients with
3842 a DRM-Master as they are independent of any graphics server. Besides,
3843 they must work without any running master, anyway.
3844 Drivers must be able to run without a master object if they support
3845 render nodes. If, on the other hand, a driver requires shared state
3846 between clients which is visible to user-space and accessible beyond
3847 open-file boundaries, they cannot support render nodes.
3848 </para>
3849 </sect1>
3850
9cad9c95
LP
3851 <!-- External: vblank handling -->
3852
3853 <sect1>
3854 <title>VBlank event handling</title>
3855 <para>
3856 The DRM core exposes two vertical blank related ioctls:
3857 <variablelist>
3858 <varlistentry>
3859 <term>DRM_IOCTL_WAIT_VBLANK</term>
3860 <listitem>
3861 <para>
3862 This takes a struct drm_wait_vblank structure as its argument,
3863 and it is used to block or request a signal when a specified
3864 vblank event occurs.
3865 </para>
3866 </listitem>
3867 </varlistentry>
3868 <varlistentry>
3869 <term>DRM_IOCTL_MODESET_CTL</term>
3870 <listitem>
3871 <para>
8edffbb9
DV
3872 This was only used for user-mode-settind drivers around
3873 modesetting changes to allow the kernel to update the vblank
3874 interrupt after mode setting, since on many devices the vertical
3875 blank counter is reset to 0 at some point during modeset. Modern
3876 drivers should not call this any more since with kernel mode
3877 setting it is a no-op.
9cad9c95
LP
3878 </para>
3879 </listitem>
3880 </varlistentry>
3881 </variablelist>
9cad9c95
LP
3882 </para>
3883 </sect1>
3884
2d2ef822 3885 </chapter>
3519f70e
DV
3886</part>
3887<part id="drmDrivers">
3888 <title>DRM Drivers</title>
2d2ef822 3889
3519f70e
DV
3890 <partintro>
3891 <para>
7f817074
LW
3892 This second part of the GPU Driver Developer's Guide documents driver
3893 code, implementation details and also all the driver-specific userspace
3519f70e
DV
3894 interfaces. Especially since all hardware-acceleration interfaces to
3895 userspace are driver specific for efficiency and other reasons these
3896 interfaces can be rather substantial. Hence every driver has its own
3897 chapter.
3898 </para>
3899 </partintro>
2d2ef822 3900
3519f70e
DV
3901 <chapter id="drmI915">
3902 <title>drm/i915 Intel GFX Driver</title>
2d2ef822 3903 <para>
3519f70e
DV
3904 The drm/i915 driver supports all (with the exception of some very early
3905 models) integrated GFX chipsets with both Intel display and rendering
3906 blocks. This excludes a set of SoC platforms with an SGX rendering unit,
3907 those have basic support through the gma500 drm driver.
2d2ef822 3908 </para>
e4e7684f
DV
3909 <sect1>
3910 <title>Core Driver Infrastructure</title>
3911 <para>
3912 This section covers core driver infrastructure used by both the display
3913 and the GEM parts of the driver.
3914 </para>
3915 <sect2>
3916 <title>Runtime Power Management</title>
3917!Pdrivers/gpu/drm/i915/intel_runtime_pm.c runtime pm
3918!Idrivers/gpu/drm/i915/intel_runtime_pm.c
397f6fa6 3919!Idrivers/gpu/drm/i915/intel_uncore.c
e4e7684f 3920 </sect2>
fca52a55
DV
3921 <sect2>
3922 <title>Interrupt Handling</title>
3923!Pdrivers/gpu/drm/i915/i915_irq.c interrupt handling
3924!Fdrivers/gpu/drm/i915/i915_irq.c intel_irq_init intel_irq_init_hw intel_hpd_init
fca52a55
DV
3925!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_disable_interrupts
3926!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_enable_interrupts
3927 </sect2>
cf9d2890
YZ
3928 <sect2>
3929 <title>Intel GVT-g Guest Support(vGPU)</title>
3930!Pdrivers/gpu/drm/i915/i915_vgpu.c Intel GVT-g guest support
3931!Idrivers/gpu/drm/i915/i915_vgpu.c
3932 </sect2>
e4e7684f 3933 </sect1>
3519f70e
DV
3934 <sect1>
3935 <title>Display Hardware Handling</title>
3936 <para>
3937 This section covers everything related to the display hardware including
3938 the mode setting infrastructure, plane, sprite and cursor handling and
3939 display, output probing and related topics.
3940 </para>
3941 <sect2>
3942 <title>Mode Setting Infrastructure</title>
3943 <para>
3944 The i915 driver is thus far the only DRM driver which doesn't use the
3945 common DRM helper code to implement mode setting sequences. Thus it
3946 has its own tailor-made infrastructure for executing a display
3947 configuration change.
3948 </para>
3949 </sect2>
b680c37a
DV
3950 <sect2>
3951 <title>Frontbuffer Tracking</title>
3952!Pdrivers/gpu/drm/i915/intel_frontbuffer.c frontbuffer tracking
3953!Idrivers/gpu/drm/i915/intel_frontbuffer.c
b680c37a 3954!Fdrivers/gpu/drm/i915/i915_gem.c i915_gem_track_fb
ef07388e
DV
3955 </sect2>
3956 <sect2>
3957 <title>Display FIFO Underrun Reporting</title>
3958!Pdrivers/gpu/drm/i915/intel_fifo_underrun.c fifo underrun handling
3959!Idrivers/gpu/drm/i915/intel_fifo_underrun.c
b680c37a 3960 </sect2>
3519f70e
DV
3961 <sect2>
3962 <title>Plane Configuration</title>
3963 <para>
3964 This section covers plane configuration and composition with the
3965 primary plane, sprites, cursors and overlays. This includes the
3966 infrastructure to do atomic vsync'ed updates of all this state and
3967 also tightly coupled topics like watermark setup and computation,
3968 framebuffer compression and panel self refresh.
3969 </para>
3970 </sect2>
ea2c67bb
MR
3971 <sect2>
3972 <title>Atomic Plane Helpers</title>
3973!Pdrivers/gpu/drm/i915/intel_atomic_plane.c atomic plane helpers
3974!Idrivers/gpu/drm/i915/intel_atomic_plane.c
3975 </sect2>
3519f70e
DV
3976 <sect2>
3977 <title>Output Probing</title>
3978 <para>
3979 This section covers output probing and related infrastructure like the
3980 hotplug interrupt storm detection and mitigation code. Note that the
3981 i915 driver still uses most of the common DRM helper code for output
3982 probing, so those sections fully apply.
3983 </para>
3984 </sect2>
856974a4
JN
3985 <sect2>
3986 <title>Hotplug</title>
3987!Pdrivers/gpu/drm/i915/intel_hotplug.c Hotplug
3988!Idrivers/gpu/drm/i915/intel_hotplug.c
3989 </sect2>
28855d2a
JN
3990 <sect2>
3991 <title>High Definition Audio</title>
3992!Pdrivers/gpu/drm/i915/intel_audio.c High Definition Audio over HDMI and Display Port
3993!Idrivers/gpu/drm/i915/intel_audio.c
b2b89f55
RV
3994 </sect2>
3995 <sect2>
3996 <title>Panel Self Refresh PSR (PSR/SRD)</title>
3997!Pdrivers/gpu/drm/i915/intel_psr.c Panel Self Refresh (PSR/SRD)
3998!Idrivers/gpu/drm/i915/intel_psr.c
94b83957
RV
3999 </sect2>
4000 <sect2>
4001 <title>Frame Buffer Compression (FBC)</title>
4002!Pdrivers/gpu/drm/i915/intel_fbc.c Frame Buffer Compression (FBC)
4003!Idrivers/gpu/drm/i915/intel_fbc.c
b33a2815
VK
4004 </sect2>
4005 <sect2>
4006 <title>Display Refresh Rate Switching (DRRS)</title>
4007!Pdrivers/gpu/drm/i915/intel_dp.c Display Refresh Rate Switching (DRRS)
4008!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_set_drrs_state
4009!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_enable
4010!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_disable
4011!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_invalidate
4012!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_flush
4013!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_drrs_init
4014
28855d2a 4015 </sect2>
0e767189
VS
4016 <sect2>
4017 <title>DPIO</title>
4018!Pdrivers/gpu/drm/i915/i915_reg.h DPIO
111a9c14 4019 <table id="dpiox2">
eee21566 4020 <title>Dual channel PHY (VLV/CHV/BXT)</title>
111a9c14
VS
4021 <tgroup cols="8">
4022 <colspec colname="c0" />
4023 <colspec colname="c1" />
4024 <colspec colname="c2" />
4025 <colspec colname="c3" />
4026 <colspec colname="c4" />
4027 <colspec colname="c5" />
4028 <colspec colname="c6" />
4029 <colspec colname="c7" />
4030 <spanspec spanname="ch0" namest="c0" nameend="c3" />
4031 <spanspec spanname="ch1" namest="c4" nameend="c7" />
4032 <spanspec spanname="ch0pcs01" namest="c0" nameend="c1" />
4033 <spanspec spanname="ch0pcs23" namest="c2" nameend="c3" />
4034 <spanspec spanname="ch1pcs01" namest="c4" nameend="c5" />
4035 <spanspec spanname="ch1pcs23" namest="c6" nameend="c7" />
4036 <thead>
4037 <row>
4038 <entry spanname="ch0">CH0</entry>
4039 <entry spanname="ch1">CH1</entry>
4040 </row>
4041 </thead>
4042 <tbody valign="top" align="center">
4043 <row>
4044 <entry spanname="ch0">CMN/PLL/REF</entry>
4045 <entry spanname="ch1">CMN/PLL/REF</entry>
4046 </row>
4047 <row>
4048 <entry spanname="ch0pcs01">PCS01</entry>
4049 <entry spanname="ch0pcs23">PCS23</entry>
4050 <entry spanname="ch1pcs01">PCS01</entry>
4051 <entry spanname="ch1pcs23">PCS23</entry>
4052 </row>
4053 <row>
4054 <entry>TX0</entry>
4055 <entry>TX1</entry>
4056 <entry>TX2</entry>
4057 <entry>TX3</entry>
4058 <entry>TX0</entry>
4059 <entry>TX1</entry>
4060 <entry>TX2</entry>
4061 <entry>TX3</entry>
4062 </row>
4063 <row>
4064 <entry spanname="ch0">DDI0</entry>
4065 <entry spanname="ch1">DDI1</entry>
4066 </row>
4067 </tbody>
4068 </tgroup>
4069 </table>
4070 <table id="dpiox1">
eee21566 4071 <title>Single channel PHY (CHV/BXT)</title>
111a9c14
VS
4072 <tgroup cols="4">
4073 <colspec colname="c0" />
4074 <colspec colname="c1" />
4075 <colspec colname="c2" />
4076 <colspec colname="c3" />
4077 <spanspec spanname="ch0" namest="c0" nameend="c3" />
4078 <spanspec spanname="ch0pcs01" namest="c0" nameend="c1" />
4079 <spanspec spanname="ch0pcs23" namest="c2" nameend="c3" />
4080 <thead>
4081 <row>
4082 <entry spanname="ch0">CH0</entry>
4083 </row>
4084 </thead>
4085 <tbody valign="top" align="center">
4086 <row>
4087 <entry spanname="ch0">CMN/PLL/REF</entry>
4088 </row>
4089 <row>
4090 <entry spanname="ch0pcs01">PCS01</entry>
4091 <entry spanname="ch0pcs23">PCS23</entry>
4092 </row>
4093 <row>
4094 <entry>TX0</entry>
4095 <entry>TX1</entry>
4096 <entry>TX2</entry>
4097 <entry>TX3</entry>
4098 </row>
4099 <row>
4100 <entry spanname="ch0">DDI2</entry>
4101 </row>
4102 </tbody>
4103 </tgroup>
4104 </table>
0e767189 4105 </sect2>
aa9145c4
AM
4106
4107 <sect2>
4108 <title>CSR firmware support for DMC</title>
4109!Pdrivers/gpu/drm/i915/intel_csr.c csr support for dmc
4110!Idrivers/gpu/drm/i915/intel_csr.c
4111 </sect2>
3519f70e 4112 </sect1>
2d2ef822 4113
3519f70e
DV
4114 <sect1>
4115 <title>Memory Management and Command Submission</title>
4116 <para>
4117 This sections covers all things related to the GEM implementation in the
4118 i915 driver.
4119 </para>
122b2505
DV
4120 <sect2>
4121 <title>Batchbuffer Parsing</title>
4122!Pdrivers/gpu/drm/i915/i915_cmd_parser.c batch buffer command parser
4123!Idrivers/gpu/drm/i915/i915_cmd_parser.c
493018dc
BV
4124 </sect2>
4125 <sect2>
4126 <title>Batchbuffer Pools</title>
4127!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
4128!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
122b2505 4129 </sect2>
73e4d07f
OM
4130 <sect2>
4131 <title>Logical Rings, Logical Ring Contexts and Execlists</title>
4132!Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and Execlists
4133!Idrivers/gpu/drm/i915/intel_lrc.c
4134 </sect2>
45f8f69a
TU
4135 <sect2>
4136 <title>Global GTT views</title>
4137!Pdrivers/gpu/drm/i915/i915_gem_gtt.c Global GTT views
4138!Idrivers/gpu/drm/i915/i915_gem_gtt.c
a794f62a
DV
4139 </sect2>
4140 <sect2>
3271dca4 4141 <title>GTT Fences and Swizzling</title>
a794f62a 4142!Idrivers/gpu/drm/i915/i915_gem_fence.c
3271dca4
DV
4143 <sect3>
4144 <title>Global GTT Fence Handling</title>
4145!Pdrivers/gpu/drm/i915/i915_gem_fence.c fence register handling
4146 </sect3>
4147 <sect3>
4148 <title>Hardware Tiling and Swizzling Details</title>
4149!Pdrivers/gpu/drm/i915/i915_gem_fence.c tiling swizzling details
4150 </sect3>
4151 </sect2>
4152 <sect2>
4153 <title>Object Tiling IOCTLs</title>
4154!Idrivers/gpu/drm/i915/i915_gem_tiling.c
4155!Pdrivers/gpu/drm/i915/i915_gem_tiling.c buffer object tiling
45f8f69a 4156 </sect2>
7838a63a
DV
4157 <sect2>
4158 <title>Buffer Object Eviction</title>
4159 <para>
eb0b44ad 4160 This section documents the interface functions for evicting buffer
7838a63a
DV
4161 objects to make space available in the virtual gpu address spaces.
4162 Note that this is mostly orthogonal to shrinking buffer objects
4163 caches, which has the goal to make main memory (shared with the gpu
4164 through the unified memory architecture) available.
4165 </para>
4166!Idrivers/gpu/drm/i915/i915_gem_evict.c
4167 </sect2>
eb0b44ad
DV
4168 <sect2>
4169 <title>Buffer Object Memory Shrinking</title>
4170 <para>
4171 This section documents the interface function for shrinking memory
4172 usage of buffer object caches. Shrinking is used to make main memory
4173 available. Note that this is mostly orthogonal to evicting buffer
4174 objects, which has the goal to make space in gpu virtual address
4175 spaces.
4176 </para>
4177!Idrivers/gpu/drm/i915/i915_gem_shrinker.c
4178 </sect2>
3519f70e 4179 </sect1>
198c974d
DCS
4180 <sect1>
4181 <title> Tracing </title>
4182 <para>
4183 This sections covers all things related to the tracepoints implemented in
4184 the i915 driver.
4185 </para>
4186 <sect2>
4187 <title> i915_ppgtt_create and i915_ppgtt_release </title>
4188!Pdrivers/gpu/drm/i915/i915_trace.h i915_ppgtt_create and i915_ppgtt_release tracepoints
4189 </sect2>
4190 <sect2>
4191 <title> i915_context_create and i915_context_free </title>
4192!Pdrivers/gpu/drm/i915/i915_trace.h i915_context_create and i915_context_free tracepoints
4193 </sect2>
4194 <sect2>
4195 <title> switch_mm </title>
4196!Pdrivers/gpu/drm/i915/i915_trace.h switch_mm tracepoint
4197 </sect2>
4198 </sect1>
4199
3519f70e 4200 </chapter>
fca52a55 4201!Cdrivers/gpu/drm/i915/i915_irq.c
3519f70e 4202</part>
2d2ef822 4203</book>