]>
Commit | Line | Data |
---|---|---|
229b4e07 | 1 | .. SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | |
229b4e07 CD |
3 | ============================== |
4 | How To Write Linux PCI Drivers | |
5 | ============================== | |
74da15eb | 6 | |
229b4e07 CD |
7 | :Authors: - Martin Mares <mj@ucw.cz> |
8 | - Grant Grundler <grundler@parisc-linux.org> | |
1da177e4 | 9 | |
74da15eb GG |
10 | The world of PCI is vast and full of (mostly unpleasant) surprises. |
11 | Since each CPU architecture implements different chip-sets and PCI devices | |
12 | have different requirements (erm, "features"), the result is the PCI support | |
13 | in the Linux kernel is not as trivial as one would wish. This short paper | |
14 | tries to introduce all potential driver authors to Linux APIs for | |
15 | PCI device drivers. | |
16 | ||
17 | A more complete resource is the third edition of "Linux Device Drivers" | |
18 | by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman. | |
19 | LDD3 is available for free (under Creative Commons License) from: | |
229b4e07 | 20 | http://lwn.net/Kernel/LDD3/. |
74da15eb GG |
21 | |
22 | However, keep in mind that all documents are subject to "bit rot". | |
23 | Refer to the source code if things are not working as described here. | |
24 | ||
25 | Please send questions/comments/patches about Linux PCI API to the | |
26 | "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list. | |
27 | ||
1da177e4 | 28 | |
229b4e07 CD |
29 | Structure of PCI drivers |
30 | ======================== | |
74da15eb GG |
31 | PCI drivers "discover" PCI devices in a system via pci_register_driver(). |
32 | Actually, it's the other way around. When the PCI generic code discovers | |
33 | a new device, the driver with a matching "description" will be notified. | |
34 | Details on this below. | |
35 | ||
36 | pci_register_driver() leaves most of the probing for devices to | |
37 | the PCI layer and supports online insertion/removal of devices [thus | |
38 | supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver]. | |
39 | pci_register_driver() call requires passing in a table of function | |
40 | pointers and thus dictates the high level structure of a driver. | |
41 | ||
42 | Once the driver knows about a PCI device and takes ownership, the | |
43 | driver generally needs to perform the following initialization: | |
1da177e4 | 44 | |
229b4e07 CD |
45 | - Enable the device |
46 | - Request MMIO/IOP resources | |
47 | - Set the DMA mask size (for both coherent and streaming DMA) | |
48 | - Allocate and initialize shared control data (pci_allocate_coherent()) | |
49 | - Access device configuration space (if needed) | |
50 | - Register IRQ handler (request_irq()) | |
51 | - Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip) | |
52 | - Enable DMA/processing engines | |
74da15eb GG |
53 | |
54 | When done using the device, and perhaps the module needs to be unloaded, | |
55 | the driver needs to take the follow steps: | |
229b4e07 CD |
56 | |
57 | - Disable the device from generating IRQs | |
58 | - Release the IRQ (free_irq()) | |
59 | - Stop all DMA activity | |
60 | - Release DMA buffers (both streaming and coherent) | |
61 | - Unregister from other subsystems (e.g. scsi or netdev) | |
62 | - Release MMIO/IOP resources | |
63 | - Disable the device | |
1da177e4 | 64 | |
74da15eb GG |
65 | Most of these topics are covered in the following sections. |
66 | For the rest look at LDD3 or <linux/pci.h> . | |
1da177e4 LT |
67 | |
68 | If the PCI subsystem is not configured (CONFIG_PCI is not set), most of | |
74da15eb GG |
69 | the PCI functions described below are defined as inline functions either |
70 | completely empty or just returning an appropriate error codes to avoid | |
71 | lots of ifdefs in the drivers. | |
72 | ||
1da177e4 | 73 | |
229b4e07 CD |
74 | pci_register_driver() call |
75 | ========================== | |
1da177e4 | 76 | |
229b4e07 | 77 | PCI device drivers call ``pci_register_driver()`` during their |
74da15eb | 78 | initialization with a pointer to a structure describing the driver |
229b4e07 | 79 | (``struct pci_driver``): |
1da177e4 | 80 | |
229b4e07 CD |
81 | .. kernel-doc:: include/linux/pci.h |
82 | :functions: pci_driver | |
74da15eb | 83 | |
229b4e07 CD |
84 | The ID table is an array of ``struct pci_device_id`` entries ending with an |
85 | all-zero entry. Definitions with static const are generally preferred. | |
1da177e4 | 86 | |
229b4e07 CD |
87 | .. kernel-doc:: include/linux/mod_devicetable.h |
88 | :functions: pci_device_id | |
1da177e4 | 89 | |
229b4e07 | 90 | Most drivers only need ``PCI_DEVICE()`` or ``PCI_DEVICE_CLASS()`` to set up |
74da15eb | 91 | a pci_device_id table. |
1da177e4 | 92 | |
74da15eb | 93 | New PCI IDs may be added to a device driver pci_ids table at runtime |
229b4e07 | 94 | as shown below:: |
1da177e4 | 95 | |
229b4e07 CD |
96 | echo "vendor device subvendor subdevice class class_mask driver_data" > \ |
97 | /sys/bus/pci/drivers/{driver}/new_id | |
74da15eb GG |
98 | |
99 | All fields are passed in as hexadecimal values (no leading 0x). | |
6ba18636 JD |
100 | The vendor and device fields are mandatory, the others are optional. Users |
101 | need pass only as many optional fields as necessary: | |
229b4e07 CD |
102 | |
103 | - subvendor and subdevice fields default to PCI_ANY_ID (FFFFFFFF) | |
104 | - class and classmask fields default to 0 | |
105 | - driver_data defaults to 0UL. | |
74da15eb | 106 | |
b41d6cf3 JD |
107 | Note that driver_data must match the value used by any of the pci_device_id |
108 | entries defined in the driver. This makes the driver_data field mandatory | |
109 | if all the pci_device_id entries have a non-zero driver_data value. | |
110 | ||
74da15eb GG |
111 | Once added, the driver probe routine will be invoked for any unclaimed |
112 | PCI devices listed in its (newly updated) pci_ids list. | |
1da177e4 LT |
113 | |
114 | When the driver exits, it just calls pci_unregister_driver() and the PCI layer | |
115 | automatically calls the remove hook for all devices handled by the driver. | |
116 | ||
74da15eb | 117 | |
229b4e07 CD |
118 | "Attributes" for driver functions/data |
119 | -------------------------------------- | |
74da15eb | 120 | |
1da177e4 LT |
121 | Please mark the initialization and cleanup functions where appropriate |
122 | (the corresponding macros are defined in <linux/init.h>): | |
123 | ||
229b4e07 | 124 | ====== ================================================= |
1da177e4 LT |
125 | __init Initialization code. Thrown away after the driver |
126 | initializes. | |
127 | __exit Exit code. Ignored for non-modular drivers. | |
229b4e07 | 128 | ====== ================================================= |
74da15eb | 129 | |
74da15eb | 130 | Tips on when/where to use the above attributes: |
229b4e07 | 131 | - The module_init()/module_exit() functions (and all |
74da15eb GG |
132 | initialization functions called _only_ from these) |
133 | should be marked __init/__exit. | |
1da177e4 | 134 | |
229b4e07 | 135 | - Do not mark the struct pci_driver. |
1da177e4 | 136 | |
229b4e07 | 137 | - Do NOT mark a function if you are not sure which mark to use. |
74da15eb GG |
138 | Better to not mark the function than mark the function wrong. |
139 | ||
140 | ||
229b4e07 CD |
141 | How to find PCI devices manually |
142 | ================================ | |
74da15eb GG |
143 | |
144 | PCI drivers should have a really good reason for not using the | |
145 | pci_register_driver() interface to search for PCI devices. | |
146 | The main reason PCI devices are controlled by multiple drivers | |
147 | is because one PCI device implements several different HW services. | |
148 | E.g. combined serial/parallel port/floppy controller. | |
149 | ||
150 | A manual search may be performed using the following constructs: | |
1da177e4 | 151 | |
229b4e07 | 152 | Searching by vendor and device ID:: |
1da177e4 LT |
153 | |
154 | struct pci_dev *dev = NULL; | |
155 | while (dev = pci_get_device(VENDOR_ID, DEVICE_ID, dev)) | |
156 | configure_device(dev); | |
157 | ||
229b4e07 | 158 | Searching by class ID (iterate in a similar way):: |
1da177e4 LT |
159 | |
160 | pci_get_class(CLASS_ID, dev) | |
161 | ||
229b4e07 | 162 | Searching by both vendor/device and subsystem vendor/device ID:: |
1da177e4 | 163 | |
74da15eb | 164 | pci_get_subsys(VENDOR_ID,DEVICE_ID, SUBSYS_VENDOR_ID, SUBSYS_DEVICE_ID, dev). |
1da177e4 | 165 | |
74da15eb | 166 | You can use the constant PCI_ANY_ID as a wildcard replacement for |
1da177e4 LT |
167 | VENDOR_ID or DEVICE_ID. This allows searching for any device from a |
168 | specific vendor, for example. | |
169 | ||
74da15eb | 170 | These functions are hotplug-safe. They increment the reference count on |
1da177e4 LT |
171 | the pci_dev that they return. You must eventually (possibly at module unload) |
172 | decrement the reference count on these devices by calling pci_dev_put(). | |
173 | ||
174 | ||
229b4e07 CD |
175 | Device Initialization Steps |
176 | =========================== | |
74da15eb GG |
177 | |
178 | As noted in the introduction, most PCI drivers need the following steps | |
179 | for device initialization: | |
1da177e4 | 180 | |
229b4e07 CD |
181 | - Enable the device |
182 | - Request MMIO/IOP resources | |
183 | - Set the DMA mask size (for both coherent and streaming DMA) | |
184 | - Allocate and initialize shared control data (pci_allocate_coherent()) | |
185 | - Access device configuration space (if needed) | |
186 | - Register IRQ handler (request_irq()) | |
187 | - Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip) | |
188 | - Enable DMA/processing engines. | |
74da15eb GG |
189 | |
190 | The driver can access PCI config space registers at any time. | |
191 | (Well, almost. When running BIST, config space can go away...but | |
192 | that will just result in a PCI Bus Master Abort and config reads | |
193 | will return garbage). | |
194 | ||
195 | ||
229b4e07 CD |
196 | Enable the PCI device |
197 | --------------------- | |
74da15eb GG |
198 | Before touching any device registers, the driver needs to enable |
199 | the PCI device by calling pci_enable_device(). This will: | |
74da15eb | 200 | |
229b4e07 CD |
201 | - wake up the device if it was in suspended state, |
202 | - allocate I/O and memory regions of the device (if BIOS did not), | |
203 | - allocate an IRQ (if BIOS did not). | |
74da15eb | 204 | |
229b4e07 CD |
205 | .. note:: |
206 | pci_enable_device() can fail! Check the return value. | |
207 | ||
208 | .. warning:: | |
209 | OS BUG: we don't check resource allocations before enabling those | |
210 | resources. The sequence would make more sense if we called | |
211 | pci_request_resources() before calling pci_enable_device(). | |
212 | Currently, the device drivers can't detect the bug when when two | |
213 | devices have been allocated the same range. This is not a common | |
214 | problem and unlikely to get fixed soon. | |
215 | ||
216 | This has been discussed before but not changed as of 2.6.19: | |
217 | http://lkml.org/lkml/2006/3/2/194 | |
74da15eb | 218 | |
74da15eb GG |
219 | |
220 | pci_set_master() will enable DMA by setting the bus master bit | |
221 | in the PCI_COMMAND register. It also fixes the latency timer value if | |
6a479079 BH |
222 | it's set to something bogus by the BIOS. pci_clear_master() will |
223 | disable DMA by clearing the bus master bit. | |
74da15eb GG |
224 | |
225 | If the PCI device can use the PCI Memory-Write-Invalidate transaction, | |
1da177e4 LT |
226 | call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval |
227 | and also ensures that the cache line size register is set correctly. | |
74da15eb | 228 | Check the return value of pci_set_mwi() as not all architectures |
694625c0 RD |
229 | or chip-sets may support Memory-Write-Invalidate. Alternatively, |
230 | if Mem-Wr-Inval would be nice to have but is not required, call | |
231 | pci_try_set_mwi() to have the system do its best effort at enabling | |
232 | Mem-Wr-Inval. | |
74da15eb GG |
233 | |
234 | ||
229b4e07 CD |
235 | Request MMIO/IOP resources |
236 | -------------------------- | |
74da15eb GG |
237 | Memory (MMIO), and I/O port addresses should NOT be read directly |
238 | from the PCI device config space. Use the values in the pci_dev structure | |
239 | as the PCI "bus address" might have been remapped to a "host physical" | |
240 | address by the arch/chip-set specific kernel support. | |
1da177e4 | 241 | |
7d3d3254 | 242 | See Documentation/driver-api/io-mapping.rst for how to access device registers |
74da15eb GG |
243 | or device memory. |
244 | ||
245 | The device driver needs to call pci_request_region() to verify | |
246 | no other device is already using the same address resource. | |
247 | Conversely, drivers should call pci_release_region() AFTER | |
1da177e4 | 248 | calling pci_disable_device(). |
74da15eb GG |
249 | The idea is to prevent two devices colliding on the same address range. |
250 | ||
229b4e07 CD |
251 | .. tip:: |
252 | See OS BUG comment above. Currently (2.6.19), The driver can only | |
253 | determine MMIO and IO Port resource availability _after_ calling | |
254 | pci_enable_device(). | |
74da15eb GG |
255 | |
256 | Generic flavors of pci_request_region() are request_mem_region() | |
257 | (for MMIO ranges) and request_region() (for IO Port ranges). | |
258 | Use these for address resources that are not described by "normal" PCI | |
259 | BARs. | |
260 | ||
261 | Also see pci_request_selected_regions() below. | |
262 | ||
263 | ||
229b4e07 CD |
264 | Set the DMA mask size |
265 | --------------------- | |
266 | .. note:: | |
267 | If anything below doesn't make sense, please refer to | |
268 | Documentation/DMA-API.txt. This section is just a reminder that | |
269 | drivers need to indicate DMA capabilities of the device and is not | |
270 | an authoritative source for DMA interfaces. | |
74da15eb GG |
271 | |
272 | While all drivers should explicitly indicate the DMA capability | |
273 | (e.g. 32 or 64 bit) of the PCI bus master, devices with more than | |
274 | 32-bit bus master capability for streaming data need the driver | |
275 | to "register" this capability by calling pci_set_dma_mask() with | |
276 | appropriate parameters. In general this allows more efficient DMA | |
277 | on systems where System RAM exists above 4G _physical_ address. | |
278 | ||
279 | Drivers for all PCI-X and PCIe compliant devices must call | |
280 | pci_set_dma_mask() as they are 64-bit DMA devices. | |
281 | ||
282 | Similarly, drivers must also "register" this capability if the device | |
283 | can directly address "consistent memory" in System RAM above 4G physical | |
284 | address by calling pci_set_consistent_dma_mask(). | |
285 | Again, this includes drivers for all PCI-X and PCIe compliant devices. | |
286 | Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are | |
287 | 64-bit DMA capable for payload ("streaming") data but not control | |
288 | ("consistent") data. | |
289 | ||
290 | ||
229b4e07 CD |
291 | Setup shared control data |
292 | ------------------------- | |
74da15eb GG |
293 | Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared) |
294 | memory. See Documentation/DMA-API.txt for a full description of | |
295 | the DMA APIs. This section is just a reminder that it needs to be done | |
296 | before enabling DMA on the device. | |
297 | ||
298 | ||
229b4e07 CD |
299 | Initialize device registers |
300 | --------------------------- | |
74da15eb GG |
301 | Some drivers will need specific "capability" fields programmed |
302 | or other "vendor specific" register initialized or reset. | |
303 | E.g. clearing pending interrupts. | |
304 | ||
305 | ||
229b4e07 CD |
306 | Register IRQ handler |
307 | -------------------- | |
59c51591 | 308 | While calling request_irq() is the last step described here, |
74da15eb GG |
309 | this is often just another intermediate step to initialize a device. |
310 | This step can often be deferred until the device is opened for use. | |
311 | ||
312 | All interrupt handlers for IRQ lines should be registered with IRQF_SHARED | |
313 | and use the devid to map IRQs to devices (remember that all PCI IRQ lines | |
314 | can be shared). | |
315 | ||
316 | request_irq() will associate an interrupt handler and device handle | |
317 | with an interrupt number. Historically interrupt numbers represent | |
318 | IRQ lines which run from the PCI device to the Interrupt controller. | |
319 | With MSI and MSI-X (more below) the interrupt number is a CPU "vector". | |
320 | ||
321 | request_irq() also enables the interrupt. Make sure the device is | |
322 | quiesced and does not have any interrupts pending before registering | |
323 | the interrupt handler. | |
324 | ||
325 | MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts" | |
326 | which deliver interrupts to the CPU via a DMA write to a Local APIC. | |
327 | The fundamental difference between MSI and MSI-X is how multiple | |
328 | "vectors" get allocated. MSI requires contiguous blocks of vectors | |
329 | while MSI-X can allocate several individual ones. | |
330 | ||
c3cf2c61 CH |
331 | MSI capability can be enabled by calling pci_alloc_irq_vectors() with the |
332 | PCI_IRQ_MSI and/or PCI_IRQ_MSIX flags before calling request_irq(). This | |
333 | causes the PCI support to program CPU vector data into the PCI device | |
334 | capability registers. Many architectures, chip-sets, or BIOSes do NOT | |
335 | support MSI or MSI-X and a call to pci_alloc_irq_vectors with just | |
336 | the PCI_IRQ_MSI and PCI_IRQ_MSIX flags will fail, so try to always | |
337 | specify PCI_IRQ_LEGACY as well. | |
338 | ||
339 | Drivers that have different interrupt handlers for MSI/MSI-X and | |
340 | legacy INTx should chose the right one based on the msi_enabled | |
341 | and msix_enabled flags in the pci_dev structure after calling | |
342 | pci_alloc_irq_vectors. | |
74da15eb GG |
343 | |
344 | There are (at least) two really good reasons for using MSI: | |
229b4e07 | 345 | |
74da15eb GG |
346 | 1) MSI is an exclusive interrupt vector by definition. |
347 | This means the interrupt handler doesn't have to verify | |
348 | its device caused the interrupt. | |
349 | ||
350 | 2) MSI avoids DMA/IRQ race conditions. DMA to host memory is guaranteed | |
351 | to be visible to the host CPU(s) when the MSI is delivered. This | |
352 | is important for both data coherency and avoiding stale control data. | |
353 | This guarantee allows the driver to omit MMIO reads to flush | |
354 | the DMA stream. | |
355 | ||
356 | See drivers/infiniband/hw/mthca/ or drivers/net/tg3.c for examples | |
357 | of MSI/MSI-X usage. | |
358 | ||
359 | ||
229b4e07 CD |
360 | PCI device shutdown |
361 | =================== | |
74da15eb GG |
362 | |
363 | When a PCI device driver is being unloaded, most of the following | |
364 | steps need to be performed: | |
365 | ||
229b4e07 CD |
366 | - Disable the device from generating IRQs |
367 | - Release the IRQ (free_irq()) | |
368 | - Stop all DMA activity | |
369 | - Release DMA buffers (both streaming and consistent) | |
370 | - Unregister from other subsystems (e.g. scsi or netdev) | |
371 | - Disable device from responding to MMIO/IO Port addresses | |
372 | - Release MMIO/IO Port resource(s) | |
74da15eb GG |
373 | |
374 | ||
229b4e07 CD |
375 | Stop IRQs on the device |
376 | ----------------------- | |
74da15eb GG |
377 | How to do this is chip/device specific. If it's not done, it opens |
378 | the possibility of a "screaming interrupt" if (and only if) | |
379 | the IRQ is shared with another device. | |
380 | ||
381 | When the shared IRQ handler is "unhooked", the remaining devices | |
382 | using the same IRQ line will still need the IRQ enabled. Thus if the | |
383 | "unhooked" device asserts IRQ line, the system will respond assuming | |
384 | it was one of the remaining devices asserted the IRQ line. Since none | |
385 | of the other devices will handle the IRQ, the system will "hang" until | |
386 | it decides the IRQ isn't going to get handled and masks the IRQ (100,000 | |
387 | iterations later). Once the shared IRQ is masked, the remaining devices | |
388 | will stop functioning properly. Not a nice situation. | |
389 | ||
390 | This is another reason to use MSI or MSI-X if it's available. | |
391 | MSI and MSI-X are defined to be exclusive interrupts and thus | |
392 | are not susceptible to the "screaming interrupt" problem. | |
393 | ||
394 | ||
229b4e07 CD |
395 | Release the IRQ |
396 | --------------- | |
74da15eb GG |
397 | Once the device is quiesced (no more IRQs), one can call free_irq(). |
398 | This function will return control once any pending IRQs are handled, | |
399 | "unhook" the drivers IRQ handler from that IRQ, and finally release | |
400 | the IRQ if no one else is using it. | |
401 | ||
402 | ||
229b4e07 CD |
403 | Stop all DMA activity |
404 | --------------------- | |
74da15eb GG |
405 | It's extremely important to stop all DMA operations BEFORE attempting |
406 | to deallocate DMA control data. Failure to do so can result in memory | |
407 | corruption, hangs, and on some chip-sets a hard crash. | |
1da177e4 | 408 | |
74da15eb GG |
409 | Stopping DMA after stopping the IRQs can avoid races where the |
410 | IRQ handler might restart DMA engines. | |
411 | ||
412 | While this step sounds obvious and trivial, several "mature" drivers | |
413 | didn't get this step right in the past. | |
414 | ||
415 | ||
229b4e07 CD |
416 | Release DMA buffers |
417 | ------------------- | |
74da15eb GG |
418 | Once DMA is stopped, clean up streaming DMA first. |
419 | I.e. unmap data buffers and return buffers to "upstream" | |
420 | owners if there is one. | |
421 | ||
422 | Then clean up "consistent" buffers which contain the control data. | |
423 | ||
424 | See Documentation/DMA-API.txt for details on unmapping interfaces. | |
425 | ||
426 | ||
229b4e07 CD |
427 | Unregister from other subsystems |
428 | -------------------------------- | |
74da15eb GG |
429 | Most low level PCI device drivers support some other subsystem |
430 | like USB, ALSA, SCSI, NetDev, Infiniband, etc. Make sure your | |
431 | driver isn't losing resources from that other subsystem. | |
432 | If this happens, typically the symptom is an Oops (panic) when | |
433 | the subsystem attempts to call into a driver that has been unloaded. | |
434 | ||
435 | ||
229b4e07 CD |
436 | Disable Device from responding to MMIO/IO Port addresses |
437 | -------------------------------------------------------- | |
74da15eb GG |
438 | io_unmap() MMIO or IO Port resources and then call pci_disable_device(). |
439 | This is the symmetric opposite of pci_enable_device(). | |
440 | Do not access device registers after calling pci_disable_device(). | |
441 | ||
442 | ||
229b4e07 CD |
443 | Release MMIO/IO Port Resource(s) |
444 | -------------------------------- | |
74da15eb GG |
445 | Call pci_release_region() to mark the MMIO or IO Port range as available. |
446 | Failure to do so usually results in the inability to reload the driver. | |
447 | ||
448 | ||
229b4e07 CD |
449 | How to access PCI config space |
450 | ============================== | |
74da15eb | 451 | |
229b4e07 CD |
452 | You can use `pci_(read|write)_config_(byte|word|dword)` to access the config |
453 | space of a device represented by `struct pci_dev *`. All these functions return | |
454 | 0 when successful or an error code (`PCIBIOS_...`) which can be translated to a | |
455 | text string by pcibios_strerror. Most drivers expect that accesses to valid PCI | |
1da177e4 LT |
456 | devices don't fail. |
457 | ||
74da15eb | 458 | If you don't have a struct pci_dev available, you can call |
229b4e07 | 459 | `pci_bus_(read|write)_config_(byte|word|dword)` to access a given device |
1da177e4 LT |
460 | and function on that bus. |
461 | ||
74da15eb | 462 | If you access fields in the standard portion of the config header, please |
1da177e4 LT |
463 | use symbolic names of locations and bits declared in <linux/pci.h>. |
464 | ||
74da15eb | 465 | If you need to access Extended PCI Capability registers, just call |
1da177e4 LT |
466 | pci_find_capability() for the particular capability and it will find the |
467 | corresponding register block for you. | |
468 | ||
469 | ||
229b4e07 CD |
470 | Other interesting functions |
471 | =========================== | |
1da177e4 | 472 | |
229b4e07 | 473 | ============================= ================================================ |
a37bee79 YW |
474 | pci_get_domain_bus_and_slot() Find pci_dev corresponding to given domain, |
475 | bus and slot and number. If the device is | |
476 | found, its reference count is increased. | |
1da177e4 LT |
477 | pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3) |
478 | pci_find_capability() Find specified capability in device's capability | |
479 | list. | |
1da177e4 LT |
480 | pci_resource_start() Returns bus start address for a given PCI region |
481 | pci_resource_end() Returns bus end address for a given PCI region | |
482 | pci_resource_len() Returns the byte length of a PCI region | |
483 | pci_set_drvdata() Set private driver data pointer for a pci_dev | |
484 | pci_get_drvdata() Return private driver data pointer for a pci_dev | |
485 | pci_set_mwi() Enable Memory-Write-Invalidate transactions. | |
486 | pci_clear_mwi() Disable Memory-Write-Invalidate transactions. | |
229b4e07 | 487 | ============================= ================================================ |
1da177e4 LT |
488 | |
489 | ||
229b4e07 CD |
490 | Miscellaneous hints |
491 | =================== | |
74da15eb GG |
492 | |
493 | When displaying PCI device names to the user (for example when a driver wants | |
494 | to tell the user what card has it found), please use pci_name(pci_dev). | |
1da177e4 LT |
495 | |
496 | Always refer to the PCI devices by a pointer to the pci_dev structure. | |
497 | All PCI layer functions use this identification and it's the only | |
498 | reasonable one. Don't use bus/slot/function numbers except for very | |
499 | special purposes -- on systems with multiple primary buses their semantics | |
500 | can be pretty complex. | |
501 | ||
1da177e4 LT |
502 | Don't try to turn on Fast Back to Back writes in your driver. All devices |
503 | on the bus need to be capable of doing it, so this is something which needs | |
504 | to be handled by platform and generic code, not individual drivers. | |
505 | ||
506 | ||
229b4e07 CD |
507 | Vendor and device identifications |
508 | ================================= | |
9b860b8c | 509 | |
37a9c502 MT |
510 | Do not add new device or vendor IDs to include/linux/pci_ids.h unless they |
511 | are shared across multiple drivers. You can add private definitions in | |
512 | your driver if they're helpful, or just use plain hex constants. | |
74da15eb | 513 | |
37a9c502 MT |
514 | The device IDs are arbitrary hex numbers (vendor controlled) and normally used |
515 | only in a single location, the pci_device_id table. | |
74da15eb | 516 | |
6d516d67 RD |
517 | Please DO submit new vendor/device IDs to http://pci-ids.ucw.cz/. |
518 | There are mirrors of the pci.ids file at http://pciids.sourceforge.net/ | |
519 | and https://github.com/pciutils/pciids. | |
74da15eb | 520 | |
9b860b8c | 521 | |
229b4e07 CD |
522 | Obsolete functions |
523 | ================== | |
74da15eb | 524 | |
1da177e4 LT |
525 | There are several functions which you might come across when trying to |
526 | port an old driver to the new PCI interface. They are no longer present | |
527 | in the kernel as they aren't compatible with hotplug or PCI domains or | |
528 | having sane locking. | |
529 | ||
229b4e07 | 530 | ================= =========================================== |
74da15eb GG |
531 | pci_find_device() Superseded by pci_get_device() |
532 | pci_find_subsys() Superseded by pci_get_subsys() | |
a37bee79 YW |
533 | pci_find_slot() Superseded by pci_get_domain_bus_and_slot() |
534 | pci_get_slot() Superseded by pci_get_domain_bus_and_slot() | |
229b4e07 | 535 | ================= =========================================== |
74da15eb GG |
536 | |
537 | The alternative is the traditional PCI device driver that walks PCI | |
538 | device lists. This is still possible but discouraged. | |
539 | ||
540 | ||
229b4e07 CD |
541 | MMIO Space and "Write Posting" |
542 | ============================== | |
74da15eb GG |
543 | |
544 | Converting a driver from using I/O Port space to using MMIO space | |
545 | often requires some additional changes. Specifically, "write posting" | |
546 | needs to be handled. Many drivers (e.g. tg3, acenic, sym53c8xx_2) | |
547 | already do this. I/O Port space guarantees write transactions reach the PCI | |
548 | device before the CPU can continue. Writes to MMIO space allow the CPU | |
549 | to continue before the transaction reaches the PCI device. HW weenies | |
550 | call this "Write Posting" because the write completion is "posted" to | |
551 | the CPU before the transaction has reached its destination. | |
552 | ||
553 | Thus, timing sensitive code should add readl() where the CPU is | |
554 | expected to wait before doing other work. The classic "bit banging" | |
229b4e07 | 555 | sequence works fine for I/O Port space:: |
74da15eb GG |
556 | |
557 | for (i = 8; --i; val >>= 1) { | |
558 | outb(val & 1, ioport_reg); /* write bit */ | |
559 | udelay(10); | |
560 | } | |
561 | ||
229b4e07 | 562 | The same sequence for MMIO space should be:: |
74da15eb GG |
563 | |
564 | for (i = 8; --i; val >>= 1) { | |
565 | writeb(val & 1, mmio_reg); /* write bit */ | |
566 | readb(safe_mmio_reg); /* flush posted write */ | |
567 | udelay(10); | |
568 | } | |
569 | ||
570 | It is important that "safe_mmio_reg" not have any side effects that | |
571 | interferes with the correct operation of the device. | |
572 | ||
573 | Another case to watch out for is when resetting a PCI device. Use PCI | |
574 | Configuration space reads to flush the writel(). This will gracefully | |
575 | handle the PCI master abort on all platforms if the PCI device is | |
576 | expected to not respond to a readl(). Most x86 platforms will allow | |
577 | MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage | |
578 | (e.g. ~0). But many RISC platforms will crash (a.k.a."Hard Fail"). |