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1 The PCI Express Advanced Error Reporting Driver Guide HOWTO
2 T. Long Nguyen <tom.l.nguyen@intel.com>
3 Yanmin Zhang <yanmin.zhang@intel.com>
4 07/29/2006
5
6
71. Overview
8
91.1 About this guide
10
11This guide describes the basics of the PCI Express Advanced Error
12Reporting (AER) driver and provides information on how to use it, as
13well as how to enable the drivers of endpoint devices to conform with
14PCI Express AER driver.
15
89713422 161.2 Copyright (C) Intel Corporation 2006.
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17
181.3 What is the PCI Express AER Driver?
19
20PCI Express error signaling can occur on the PCI Express link itself
21or on behalf of transactions initiated on the link. PCI Express
22defines two error reporting paradigms: the baseline capability and
23the Advanced Error Reporting capability. The baseline capability is
24required of all PCI Express components providing a minimum defined
25set of error reporting requirements. Advanced Error Reporting
26capability is implemented with a PCI Express advanced error reporting
27extended capability structure providing more robust error reporting.
28
29The PCI Express AER driver provides the infrastructure to support PCI
30Express Advanced Error Reporting capability. The PCI Express AER
31driver provides three basic functions:
32
33- Gathers the comprehensive error information if errors occurred.
34- Reports error to the users.
35- Performs error recovery actions.
36
37AER driver only attaches root ports which support PCI-Express AER
38capability.
39
40
412. User Guide
42
432.1 Include the PCI Express AER Root Driver into the Linux Kernel
44
45The PCI Express AER Root driver is a Root Port service driver attached
46to the PCI Express Port Bus driver. If a user wants to use it, the driver
47has to be compiled. Option CONFIG_PCIEAER supports this capability. It
48depends on CONFIG_PCIEPORTBUS, so pls. set CONFIG_PCIEPORTBUS=y and
49CONFIG_PCIEAER = y.
50
512.2 Load PCI Express AER Root Driver
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52
53Some systems have AER support in firmware. Enabling Linux AER support at
54the same time the firmware handles AER may result in unpredictable
55behavior. Therefore, Linux does not handle AER events unless the firmware
56grants AER control to the OS via the ACPI _OSC method. See the PCI FW 3.0
57Specification for details regarding _OSC usage.
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58
592.3 AER error output
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60
61When a PCIe AER error is captured, an error message will be output to
62console. If it's a correctable error, it is output as a warning.
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63Otherwise, it is printed as an error. So users could choose different
64log level to filter out correctable error messages.
65
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66Below shows an example:
670000:50:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, id=0500(Requester ID)
680000:50:00.0: device [8086:0329] error status/mask=00100000/00000000
690000:50:00.0: [20] Unsupported Request (First)
700000:50:00.0: TLP Header: 04000001 00200a03 05010000 00050100
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71
72In the example, 'Requester ID' means the ID of the device who sends
73the error message to root port. Pls. refer to pci express specs for
74other fields.
75
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762.4 AER Statistics / Counters
77
78When PCIe AER errors are captured, the counters / statistics are also exposed
79in the form of sysfs attributes which are documented at
80Documentation/ABI/testing/sysfs-bus-pci-devices-aer_stats
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81
823. Developer Guide
83
84To enable AER aware support requires a software driver to configure
85the AER capability structure within its device and to provide callbacks.
86
87To support AER better, developers need understand how AER does work
88firstly.
89
90PCI Express errors are classified into two types: correctable errors
91and uncorrectable errors. This classification is based on the impacts
92of those errors, which may result in degraded performance or function
93failure.
94
95Correctable errors pose no impacts on the functionality of the
96interface. The PCI Express protocol can recover without any software
97intervention or any loss of data. These errors are detected and
98corrected by hardware. Unlike correctable errors, uncorrectable
99errors impact functionality of the interface. Uncorrectable errors
100can cause a particular transaction or a particular PCI Express link
101to be unreliable. Depending on those error conditions, uncorrectable
102errors are further classified into non-fatal errors and fatal errors.
103Non-fatal errors cause the particular transaction to be unreliable,
104but the PCI Express link itself is fully functional. Fatal errors, on
105the other hand, cause the link to be unreliable.
106
107When AER is enabled, a PCI Express device will automatically send an
89713422 108error message to the PCIe root port above it when the device captures
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109an error. The Root Port, upon receiving an error reporting message,
110internally processes and logs the error message in its PCI Express
111capability structure. Error information being logged includes storing
112the error reporting agent's requestor ID into the Error Source
113Identification Registers and setting the error bits of the Root Error
114Status Register accordingly. If AER error reporting is enabled in Root
115Error Command Register, the Root Port generates an interrupt if an
116error is detected.
117
118Note that the errors as described above are related to the PCI Express
119hierarchy and links. These errors do not include any device specific
120errors because device specific errors will still get sent directly to
121the device driver.
122
1233.1 Configure the AER capability structure
124
125AER aware drivers of PCI Express component need change the device
126control registers to enable AER. They also could change AER registers,
127including mask and severity registers. Helper function
128pci_enable_pcie_error_reporting could be used to enable AER. See
129section 3.3.
130
1313.2. Provide callbacks
132
1333.2.1 callback reset_link to reset pci express link
134
135This callback is used to reset the pci express physical link when a
136fatal error happens. The root port aer service driver provides a
137default reset_link function, but different upstream ports might
138have different specifications to reset pci express link, so all
139upstream ports should provide their own reset_link functions.
140
141In struct pcie_port_service_driver, a new pointer, reset_link, is
142added.
143
144pci_ers_result_t (*reset_link) (struct pci_dev *dev);
145
146Section 3.2.2.2 provides more detailed info on when to call
147reset_link.
148
1493.2.2 PCI error-recovery callbacks
150
151The PCI Express AER Root driver uses error callbacks to coordinate
152with downstream device drivers associated with a hierarchy in question
153when performing error recovery actions.
154
155Data struct pci_driver has a pointer, err_handler, to point to
156pci_error_handlers who consists of a couple of callback function
157pointers. AER driver follows the rules defined in
158pci-error-recovery.txt except pci express specific parts (e.g.
159reset_link). Pls. refer to pci-error-recovery.txt for detailed
160definitions of the callbacks.
161
162Below sections specify when to call the error callback functions.
163
1643.2.2.1 Correctable errors
165
166Correctable errors pose no impacts on the functionality of
167the interface. The PCI Express protocol can recover without any
168software intervention or any loss of data. These errors do not
169require any recovery actions. The AER driver clears the device's
170correctable error status register accordingly and logs these errors.
171
1723.2.2.2 Non-correctable (non-fatal and fatal) errors
173
174If an error message indicates a non-fatal error, performing link reset
175at upstream is not required. The AER driver calls error_detected(dev,
176pci_channel_io_normal) to all drivers associated within a hierarchy in
177question. for example,
178EndPoint<==>DownstreamPort B<==>UpstreamPort A<==>RootPort.
179If Upstream port A captures an AER error, the hierarchy consists of
180Downstream port B and EndPoint.
181
182A driver may return PCI_ERS_RESULT_CAN_RECOVER,
183PCI_ERS_RESULT_DISCONNECT, or PCI_ERS_RESULT_NEED_RESET, depending on
184whether it can recover or the AER driver calls mmio_enabled as next.
185
186If an error message indicates a fatal error, kernel will broadcast
187error_detected(dev, pci_channel_io_frozen) to all drivers within
188a hierarchy in question. Then, performing link reset at upstream is
189necessary. As different kinds of devices might use different approaches
190to reset link, AER port service driver is required to provide the
191function to reset link. Firstly, kernel looks for if the upstream
192component has an aer driver. If it has, kernel uses the reset_link
193callback of the aer driver. If the upstream component has no aer driver
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194and the port is downstream port, we will perform a hot reset as the
195default by setting the Secondary Bus Reset bit of the Bridge Control
196register associated with the downstream port. As for upstream ports,
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197they should provide their own aer service drivers with reset_link
198function. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER and
199reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes
200to mmio_enabled.
201
2023.3 helper functions
203
270c66be 2043.3.1 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
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205pci_enable_pcie_error_reporting enables the device to send error
206messages to root port when an error is detected. Note that devices
207don't enable the error reporting by default, so device drivers need
208call this function to enable it.
209
270c66be 2103.3.2 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
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211pci_disable_pcie_error_reporting disables the device to send error
212messages to root port when an error is detected.
213
270c66be 2143.3.3 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
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215pci_cleanup_aer_uncorrect_error_status cleanups the uncorrectable
216error status register.
217
2183.4 Frequent Asked Questions
219
220Q: What happens if a PCI Express device driver does not provide an
221error recovery handler (pci_driver->err_handler is equal to NULL)?
222
223A: The devices attached with the driver won't be recovered. If the
224error is fatal, kernel will print out warning messages. Please refer
225to section 3 for more information.
226
227Q: What happens if an upstream port service driver does not provide
228callback reset_link?
229
230A: Fatal error recovery will fail if the errors are reported by the
231upstream ports who are attached by the service driver.
232
233Q: How does this infrastructure deal with driver that is not PCI
234Express aware?
235
236A: This infrastructure calls the error callback functions of the
237driver when an error happens. But if the driver is not aware of
238PCI Express, the device might not report its own errors to root
239port.
240
241Q: What modifications will that driver need to make it compatible
242with the PCI Express AER Root driver?
243
244A: It could call the helper functions to enable AER in devices and
245cleanup uncorrectable status register. Pls. refer to section 3.3.
246
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2484. Software error injection
249
89713422 250Debugging PCIe AER error recovery code is quite difficult because it
bfe5a740 251is hard to trigger real hardware errors. Software based error
89713422 252injection can be used to fake various kinds of PCIe errors.
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89713422 254First you should enable PCIe AER software error injection in kernel
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255configuration, that is, following item should be in your .config.
256
257CONFIG_PCIEAER_INJECT=y or CONFIG_PCIEAER_INJECT=m
258
259After reboot with new kernel or insert the module, a device file named
260/dev/aer_inject should be created.
261
262Then, you need a user space tool named aer-inject, which can be gotten
263from:
2eb6a4b2 264 https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
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265
266More information about aer-inject can be found in the document comes
267with its source code.